1# 2# Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH}, aarch64) 10 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 11 # DRAM (if available) or the TZC secured area of DRAM. 12 # TZC secured DRAM is the default. 13 14 ARM_TSP_RAM_LOCATION ?= dram 15 16 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 18 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 19 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 20 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 21 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 22 else 23 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 24 endif 25 26 # Process flags 27 # Process ARM_BL31_IN_DRAM flag 28 ARM_BL31_IN_DRAM := 0 29 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 30 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 31else 32 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 33endif 34 35$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 36 37 38# For the original power-state parameter format, the State-ID can be encoded 39# according to the recommended encoding or zero. This flag determines which 40# State-ID encoding to be parsed. 41ARM_RECOM_STATE_ID_ENC := 0 42 43# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 44# be set. Else throw a build error. 45ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 46 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 47 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 48 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 49 endif 50endif 51 52# Process ARM_RECOM_STATE_ID_ENC flag 53$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 54$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 55 56# Process ARM_DISABLE_TRUSTED_WDOG flag 57# By default, Trusted Watchdog is always enabled unless 58# SPIN_ON_BL1_EXIT or ENABLE_RME is set 59ARM_DISABLE_TRUSTED_WDOG := 0 60ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 61ARM_DISABLE_TRUSTED_WDOG := 1 62endif 63$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 64$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 65 66# Process ARM_CONFIG_CNTACR 67ARM_CONFIG_CNTACR := 1 68$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 69$(eval $(call add_define,ARM_CONFIG_CNTACR)) 70 71# Process ARM_BL31_IN_DRAM flag 72ARM_BL31_IN_DRAM := 0 73$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 74$(eval $(call add_define,ARM_BL31_IN_DRAM)) 75 76# Process ARM_PLAT_MT flag 77ARM_PLAT_MT := 0 78$(eval $(call assert_boolean,ARM_PLAT_MT)) 79$(eval $(call add_define,ARM_PLAT_MT)) 80 81# Use translation tables library v2 by default 82ARM_XLAT_TABLES_LIB_V1 := 0 83$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 84$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 85 86# Don't have the Linux kernel as a BL33 image by default 87ARM_LINUX_KERNEL_AS_BL33 := 0 88$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 89$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 90 91ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 92 ifneq (${ARCH},aarch64) 93 ifneq (${RESET_TO_SP_MIN},1) 94 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.") 95 endif 96 endif 97 ifndef PRELOADED_BL33_BASE 98 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") 99 endif 100 ifeq (${RESET_TO_BL31},1) 101 ifndef ARM_PRELOADED_DTB_BASE 102 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is 103 used with RESET_TO_BL31.") 104 endif 105 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 106 endif 107endif 108 109# Arm Ethos-N NPU SiP service 110ARM_ETHOSN_NPU_DRIVER := 0 111$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER)) 112$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER)) 113 114# Use an implementation of SHA-256 with a smaller memory footprint but reduced 115# speed. 116$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 117 118# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 119# in the FIP if the platform requires. 120ifneq ($(BL32_EXTRA1),) 121$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 122endif 123ifneq ($(BL32_EXTRA2),) 124$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 125endif 126 127# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 128ENABLE_PSCI_STAT := 1 129ENABLE_PMF := 1 130 131# Override the standard libc with optimised libc_asm 132OVERRIDE_LIBC := 1 133ifeq (${OVERRIDE_LIBC},1) 134 include lib/libc/libc_asm.mk 135endif 136 137# On ARM platforms, separate the code and read-only data sections to allow 138# mapping the former as executable and the latter as execute-never. 139SEPARATE_CODE_AND_RODATA := 1 140 141# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 142# and NOBITS sections of BL31 image are adjacent to each other and loaded 143# into Trusted SRAM. 144SEPARATE_NOBITS_REGION := 0 145 146# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 147# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 148# the build to require that ARM_BL31_IN_DRAM is enabled as well. 149ifeq ($(SEPARATE_NOBITS_REGION),1) 150 ifneq ($(ARM_BL31_IN_DRAM),1) 151 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 152 endif 153 ifneq ($(RECLAIM_INIT_CODE),0) 154 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 155 endif 156endif 157 158# Disable ARM Cryptocell by default 159ARM_CRYPTOCELL_INTEG := 0 160$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 161$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 162 163# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 164ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 165 ENABLE_PIE := 1 166endif 167 168# CryptoCell integration relies on coherent buffers for passing data from 169# the AP CPU to the CryptoCell 170ifeq (${ARM_CRYPTOCELL_INTEG},1) 171 ifeq (${USE_COHERENT_MEM},0) 172 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.") 173 endif 174endif 175 176# Disable GPT parser support, use FIP image by default 177ARM_GPT_SUPPORT := 0 178$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 179$(eval $(call add_define,ARM_GPT_SUPPORT)) 180 181# Include necessary sources to parse GPT image 182ifeq (${ARM_GPT_SUPPORT}, 1) 183 BL2_SOURCES += drivers/partition/gpt.c \ 184 drivers/partition/partition.c 185endif 186 187# Enable CRC instructions via extension for ARMv8-A CPUs. 188# For ARMv8.1-A, and onwards CRC instructions are default enabled. 189# Enable HW computed CRC support unconditionally in BL2 component. 190ifeq (${ARM_ARCH_MINOR},0) 191 BL2_CPPFLAGS += -march=armv8-a+crc 192endif 193 194ifeq ($(PSA_FWU_SUPPORT),1) 195 # GPT support is recommended as per PSA FWU specification hence 196 # PSA FWU implementation is tightly coupled with GPT support, 197 # and it does not support other formats. 198 ifneq ($(ARM_GPT_SUPPORT),1) 199 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 200 endif 201 FWU_MK := drivers/fwu/fwu.mk 202 $(info Including ${FWU_MK}) 203 include ${FWU_MK} 204endif 205 206ifeq (${ARCH}, aarch64) 207PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 208endif 209 210PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 211 plat/arm/common/arm_common.c \ 212 plat/arm/common/arm_console.c 213 214ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 215PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 216 lib/xlat_tables/${ARCH}/xlat_tables.c 217else 218ifeq (${XLAT_MPU_LIB_V1}, 1) 219include lib/xlat_mpu/xlat_mpu.mk 220PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS} 221else 222include lib/xlat_tables_v2/xlat_tables.mk 223PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 224endif 225endif 226 227ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 228 plat/arm/common/fconf/arm_fconf_io.c 229ifeq (${SPD},spmd) 230 ifeq (${BL2_ENABLE_SP_LOAD},1) 231 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 232 endif 233endif 234 235BL1_SOURCES += drivers/io/io_fip.c \ 236 drivers/io/io_memmap.c \ 237 drivers/io/io_storage.c \ 238 plat/arm/common/arm_bl1_setup.c \ 239 plat/arm/common/arm_err.c \ 240 ${ARM_IO_SOURCES} 241 242ifdef EL3_PAYLOAD_BASE 243# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 244# their holding pen 245BL1_SOURCES += plat/arm/common/arm_pm.c 246endif 247 248BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 249 drivers/delay_timer/generic_delay_timer.c \ 250 drivers/io/io_fip.c \ 251 drivers/io/io_memmap.c \ 252 drivers/io/io_storage.c \ 253 plat/arm/common/arm_bl2_setup.c \ 254 plat/arm/common/arm_err.c \ 255 common/tf_crc32.c \ 256 ${ARM_IO_SOURCES} 257 258# Firmware Configuration Framework sources 259include lib/fconf/fconf.mk 260 261# Add `libfdt` and Arm common helpers required for Dynamic Config 262include lib/libfdt/libfdt.mk 263 264DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 265 plat/arm/common/arm_dyn_cfg_helpers.c \ 266 common/uuid.c 267 268DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 269 270BL1_SOURCES += ${DYN_CFG_SOURCES} 271BL2_SOURCES += ${DYN_CFG_SOURCES} 272 273ifeq (${BL2_AT_EL3},1) 274BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 275endif 276 277# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 278# the AArch32 descriptors. 279ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 280BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 281else 282ifeq ($(filter ${TARGET_PLATFORM}, fpga fvp),) 283BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 284endif 285endif 286BL2_SOURCES += plat/arm/common/arm_image_load.c \ 287 common/desc_image_load.c 288ifeq (${SPD},opteed) 289BL2_SOURCES += lib/optee/optee_utils.c 290endif 291 292BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 293 drivers/delay_timer/generic_delay_timer.c \ 294 plat/arm/common/arm_bl2u_setup.c 295 296BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 297 plat/arm/common/arm_pm.c \ 298 plat/arm/common/arm_topology.c \ 299 plat/common/plat_psci_common.c 300 301ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),) 302ARM_SVC_HANDLER_SRCS := 303 304ifeq (${ENABLE_PMF},1) 305ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 306endif 307 308ifeq (${ARM_ETHOSN_NPU_DRIVER},1) 309ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 310 drivers/delay_timer/delay_timer.c \ 311 drivers/arm/ethosn/ethosn_smc.c 312endif 313 314ifeq (${ARCH}, aarch64) 315BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 316 plat/arm/common/arm_sip_svc.c \ 317 ${ARM_SVC_HANDLER_SRCS} 318else 319BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 320 ${ARM_SVC_HANDLER_SRCS} 321endif 322endif 323 324ifeq (${EL3_EXCEPTION_HANDLING},1) 325BL31_SOURCES += plat/common/aarch64/plat_ehf.c 326endif 327 328ifeq (${SDEI_SUPPORT},1) 329BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 330ifeq (${SDEI_IN_FCONF},1) 331BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 332endif 333endif 334 335# RAS sources 336ifeq (${RAS_EXTENSION},1) 337BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 338 lib/extensions/ras/ras_common.c 339endif 340 341# Pointer Authentication sources 342ifeq (${ENABLE_PAUTH}, 1) 343PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \ 344 lib/extensions/pauth/pauth_helpers.S 345endif 346 347ifeq (${SPD},spmd) 348BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 349 common/uuid.c \ 350 ${LIBFDT_SRCS} 351 352BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 353endif 354 355ifneq (${TRUSTED_BOARD_BOOT},0) 356 357 # Include common TBB sources 358 AUTH_SOURCES := drivers/auth/auth_mod.c \ 359 drivers/auth/crypto_mod.c \ 360 drivers/auth/img_parser_mod.c \ 361 lib/fconf/fconf_tbbr_getter.c 362 363 # Include the selected chain of trust sources. 364 ifeq (${COT},tbbr) 365 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 366 drivers/auth/tbbr/tbbr_cot_bl1.c 367 ifneq (${COT_DESC_IN_DTB},0) 368 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 369 else 370 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 371 drivers/auth/tbbr/tbbr_cot_bl2.c 372 endif 373 else ifeq (${COT},dualroot) 374 AUTH_SOURCES += drivers/auth/dualroot/cot.c 375 else 376 $(error Unknown chain of trust ${COT}) 377 endif 378 379 BL1_SOURCES += ${AUTH_SOURCES} \ 380 bl1/tbbr/tbbr_img_desc.c \ 381 plat/arm/common/arm_bl1_fwu.c \ 382 plat/common/tbbr/plat_tbbr.c 383 384 BL2_SOURCES += ${AUTH_SOURCES} \ 385 plat/common/tbbr/plat_tbbr.c 386 387 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 388 389 # We expect to locate the *.mk files under the directories specified below 390ifeq (${ARM_CRYPTOCELL_INTEG},0) 391 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 392else 393 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 394endif 395 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 396 397 $(info Including ${CRYPTO_LIB_MK}) 398 include ${CRYPTO_LIB_MK} 399 400 $(info Including ${IMG_PARSER_LIB_MK}) 401 include ${IMG_PARSER_LIB_MK} 402 403endif 404 405ifeq (${RECLAIM_INIT_CODE}, 1) 406 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 407 $(error "To reclaim init code xlat tables v2 must be used") 408 endif 409endif 410 411ifeq (${MEASURED_BOOT},1) 412 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 413 $(info Including ${MEASURED_BOOT_MK}) 414 include ${MEASURED_BOOT_MK} 415endif 416