feat(guid-partition): platform hook to log corrupted GPT

Notification of the GPT corruption can be beneficial,
using the handoff structure from BL2 to
BL32 for logging the GPT corruption information

feat(guid-partition): platform hook to log corrupted GPT

Notification of the GPT corruption can be beneficial,
using the handoff structure from BL2 to
BL32 for logging the GPT corruption information

Change-Id: Ie1af7eb6d97ec76f3f6d1cffad292782bdedda21
Signed-off-by: Xialin Liu <xialin.liu@arm.com>

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fix(platforms): typedef operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a

fix(platforms): typedef operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I1ed3b7fc1866b34f1086e449ffe648f53c33b008
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change

fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: I8a98d35a4db1494120eaf39bc0f2315deed81664
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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fix(platforms): add essential bool type

This corrects the MISRA violation C2012-14.4:
The value 1 does not have an essentially boolean type, it's an integer
constant. Therefore using 'true' from std

fix(platforms): add essential bool type

This corrects the MISRA violation C2012-14.4:
The value 1 does not have an essentially boolean type, it's an integer
constant. Therefore using 'true' from stdbool.h resolves the issue.

Change-Id: If40cb8f583f8eb549dadaa744976741b30ee7d42
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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fix(platforms): fix misra violation 10.1

This corrects the MISRA violation C2012-10.1:
Operands shall not be of an inappropriate essential type.
The condition is explicitly checked against boolean v

fix(platforms): fix misra violation 10.1

This corrects the MISRA violation C2012-10.1:
Operands shall not be of an inappropriate essential type.
The condition is explicitly checked against boolean value.
In this scenario, using 'false' rather than '0'resolves the issue.

Change-Id: Icf3d37784181a65d00f6602e8f5e2bf4c65ac9cb
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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feat(spmd): get spmc manifest from xferlist

When TRANSFER_LIST build option is used, arg0 doesn't pass the
SPMC manifest. but it should be passed to load SPMC.

For this, adds the spmc manifest entr

feat(spmd): get spmc manifest from xferlist

When TRANSFER_LIST build option is used, arg0 doesn't pass the
SPMC manifest. but it should be passed to load SPMC.

For this, adds the spmc manifest entry in the transfer list
with TL_TAG_DT_SPMC_MANIFEST tag and
let spmd load the spmc manifest from transfer list.

Change-Id: I3b84c3d8a17bba4ac94afe00e1e19044449360b0
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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fix(common): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.Enclosed statement body

fix(common): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.Enclosed statement body within the curly
braces.

Change-Id: I24a73929c589e67f9ef9ef6d756d5c451a8b9219
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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Merge changes I61d77211,I9cb5c1fa,I8e8a92fd into integration

* changes:
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
fix(gicv3): remove plat_gicv3_base.c
ref

Merge changes I61d77211,I9cb5c1fa,I8e8a92fd into integration

* changes:
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
fix(gicv3): remove plat_gicv3_base.c
refactor(versal-net): use the generic GIC driver

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fix(gicv3): remove plat_gicv3_base.c

All platforms that used to use plat_gicv3_base.c have been ported to
USE_GIC_DRIVER=3 so this file is now unused. As USE_GIC_DRIVER is based
on plat_gicv3_base.c

fix(gicv3): remove plat_gicv3_base.c

All platforms that used to use plat_gicv3_base.c have been ported to
USE_GIC_DRIVER=3 so this file is now unused. As USE_GIC_DRIVER is based
on plat_gicv3_base.c and includes its own hooks, platforms should use
USE_GIC_DRIVER instead.

Change-Id: I9cb5c1fa881e7aed3de272d4482039bf112e60d8
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change

fix(platforms): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: Ifa48fa64e87481bb43a877f39f48108fd2e13c42
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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feat(smccc): add SoC name support to SMCCC_ARCH_SOC_ID

This patch adds support for getting the SoC name string
using the SMCCC_ARCH_SOC_ID interface. The SoC name query
was introduced in SMCCC versi

feat(smccc): add SoC name support to SMCCC_ARCH_SOC_ID

This patch adds support for getting the SoC name string
using the SMCCC_ARCH_SOC_ID interface. The SoC name query
was introduced in SMCCC version 1.6. It is available only
through SMC64 calls.

A new function ID, SMCCC_GET_SOC_NAME, is added. It returns
the SoC name as a null-terminated ASCII string, spread across
registers X1 to X17 in little endian order.
The total length is 136 bytes, including the null byte.
Any space after the null terminator is filled
with zeros.

A platform hook plat_get_soc_name() is added to return the
SoC name. A weak default version is also provided that returns
SMC_ARCH_CALL_NOT_SUPPORTED for platforms that do not support
this feature.

The name should follow the SMCCC rule that it must not expose
any information that is not already reported
by the SoC version and revision calls.

Reference: https://developer.arm.com/documentation/den0028/latest/

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Idc69997c509bcbfb1cecb38ed1003b29627ade4b

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build(handoff)!: switch to LibTL submodule

Removes in-tree Transfer List implementation and updates all references
to use the external LibTL submodule. Updates include paths, Makefile
macros, and pl

build(handoff)!: switch to LibTL submodule

Removes in-tree Transfer List implementation and updates all references
to use the external LibTL submodule. Updates include paths, Makefile
macros, and platform integration logic to link with LibTL as a static
library.

If you cloned TF-A without the `--recurse-submodules` flag, you can
ensure that this submodule is present by running:

git submodule update --init --recursive

BREAKING-CHANGE: LibTL is now included in TF-A as a submodule.
Please run `git submodule update --init --recursive` if you encounter
issues after migrating to the latest version of TF-A.

Change-Id: I1fa31f7b730066c27985d968698e553b00b07c38
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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feat(gicv5): add a barebones GICv5 driver

This is the absolute minimum that's needed to compile an NS-only build
end exit out of EL3. The GIC is not used and/or configured in any way
but all the nec

feat(gicv5): add a barebones GICv5 driver

This is the absolute minimum that's needed to compile an NS-only build
end exit out of EL3. The GIC is not used and/or configured in any way
but all the necessary hooks are populated.

Notably, SCR_EL3.FIQ becomes RES1 as GICv5 behaves in a similar manner
to a GICv3 with FIQ set.

Change-Id: Idae52b9df97f4ca2996b2dcd1e5efc45478a43f2
Co-developed-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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feat(gicv5): add support for building with gicv5

The Generic Interrupt Controller v5 (GICv5) is the next generation of
Arm interrupt controllers. It is a clean slate design and has native
support fo

feat(gicv5): add support for building with gicv5

The Generic Interrupt Controller v5 (GICv5) is the next generation of
Arm interrupt controllers. It is a clean slate design and has native
support for the latest Armv9 features. As such it is entirely backwards
incompatible with GICv3/v4.

This patch adds the necessary boilerplate to select a build with GICv5.
The GIC has always had two parts. BL31 deals directly with the CPU
interface while platform code is responsible for managing the IRI. In v5
this split is formalised and the CPU interface, FEAT_GCIE, may be
implemented on its own. So reflect this split in our code with
ENABLE_FEAT_GCIE which only affects BL31 and the GICv5 IRI lies in the
generic GIC driver.

No actual functionality yet.

Change-Id: I97a0c3ba708877c213e50e7ef148e3412aa2af90
Co-developed-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor: make arm_gicv2.c and arm_gicv3.c common

These files were meant to be platform specific, but they are generic
enough that a range of platforms find them useful. However, refactoring
them is

refactor: make arm_gicv2.c and arm_gicv3.c common

These files were meant to be platform specific, but they are generic
enough that a range of platforms find them useful. However, refactoring
them is difficult as their use is platform specific. So copy them to a
generic place and redirect platforms to them.

The new copies will remain for compatibility for platforms that don't
want to or can't take up upcoming refactors and the old copies can be
drastically refactored to make them more widely applicable.

Change-Id: I056c8710cdda4d8a81b324d392762c29e02cdae1
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(platforms): remove platform_core_pos_helper()

Its last user was removed some time ago so it is no longer necessary.

Change-Id: I28264367abd2902ed0d3f207f686538a82a44eba
Signed-off-by: Boyan Kar

fix(platforms): remove platform_core_pos_helper()

Its last user was removed some time ago so it is no longer necessary.

Change-Id: I28264367abd2902ed0d3f207f686538a82a44eba
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(platforms): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store

fix(platforms): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: I9c2ca05b506a6ac35b24966fc5fdd5e88e65770d
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(platforms): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement b

fix(platforms): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.
Enclosed statement body within the curly braces.

Change-Id: I1327a206782ccd341c0c7eaa3f26078150458ed0
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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perf(psci): get PMF timestamps with no cache flushes if possible

Whenever we have HW_ASSISTED_COHERENCY, caches are enabled early and we
let the cores do the cache maintenance on our behalf. This is

perf(psci): get PMF timestamps with no cache flushes if possible

Whenever we have HW_ASSISTED_COHERENCY, caches are enabled early and we
let the cores do the cache maintenance on our behalf. This is true for
the PSCI stat timestamp capture and used to be the case. However, a
model bug required us to do the cache maintenance manually. That has
been fixed so we can revert back.

Change-Id: Id315a8fea500fb5e2433d3786b2be5a9084300a7
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(bl32): flush before console switch state

Move console_switch_state(CONSOLE_FLAG_RUNTIME) to sp_min_main() so
that this becomes the last call before bl32/sp_min exits. This also
ensures that

refactor(bl32): flush before console switch state

Move console_switch_state(CONSOLE_FLAG_RUNTIME) to sp_min_main() so
that this becomes the last call before bl32/sp_min exits. This also
ensures that console_flush() is called before switching console state
to runtime.

This patch mimics the behavior of console_switch_state() call in BL31
per this patch
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/26771/4.

Change-Id: I5b562d02706b19bb8b14154be97b6e9ef4e2fd3b
Signed-off-by: Salman Nabi <salman.nabi@arm.com>

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feat(handoff): common API for TPM event log handoff

Create a common BL2 API to add a TE for TPM event log.

Change-Id: I459e70f40069aa9ea0625977e0bad8ec316439e6
Signed-off-by: Raymond Mao <raymond.m

feat(handoff): common API for TPM event log handoff

Create a common BL2 API to add a TE for TPM event log.

Change-Id: I459e70f40069aa9ea0625977e0bad8ec316439e6
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>

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feat(bl): add plat handler for image loading

In case of load error, platform may need to try another instance, either
from another storage, or from the same storage in case of PSA FWU. On
MTD device

feat(bl): add plat handler for image loading

In case of load error, platform may need to try another instance, either
from another storage, or from the same storage in case of PSA FWU. On
MTD devices such as NAND, it is required to define backup partitions.
A new function plat_setup_try_img_ops() should be called by platform
code to register handlers (plat_try_images_ops) to manage loading
other images.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ideaecaf296c0037a26fb4e6680f33e507111378a

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refactor(bl)!: remove unused plat_try_next_boot_source

The plat_try_next_boot_source() API is not used by any upstream platform
and not used by platforms that asked for this API. It is then removed.

refactor(bl)!: remove unused plat_try_next_boot_source

The plat_try_next_boot_source() API is not used by any upstream platform
and not used by platforms that asked for this API. It is then removed.
It will be replaced with a more generic interface in next patch.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I298c7acace8c5efb3c66422d8d9280ecd08e5ade

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