refactor(arm): replace hard-coded HW_CONFIG DT sizeEnsure consistency across all Arm platforms, even those that may alreadyhave an existing macro for this purpose.Change-Id: I07cd4cfcacf2c991717
refactor(arm): replace hard-coded HW_CONFIG DT sizeEnsure consistency across all Arm platforms, even those that may alreadyhave an existing macro for this purpose.Change-Id: I07cd4cfcacf2c991717f4c115cb0babd2c614d6fSigned-off-by: Harrison Mutai <harrison.mutai@arm.com>
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refactor(plat/arm): replace FIP base and size macro with a generic nameReplaced PLAT_ARM_FIP_BASE and PLAT_ARM_FIP_MAX_SIZE macro with ageneric name PLAT_ARM_FLASH_IMAGE_BASE and PLAT_ARM_FLASH_IM
refactor(plat/arm): replace FIP base and size macro with a generic nameReplaced PLAT_ARM_FIP_BASE and PLAT_ARM_FIP_MAX_SIZE macro with ageneric name PLAT_ARM_FLASH_IMAGE_BASE and PLAT_ARM_FLASH_IMAGE_MAX_SIZEso that these macros can be reused in the subsequent GPT based supportchanges.Change-Id: I88fdbd53e1966578af4f1e8e9d5fef42c27b1173Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
plat/arm: Move fconf population after the enablement of MMUIn BL2, fw_config's population happened before the cache getsenabled.Hence to boost the performance, moved fw_config's populationafter
plat/arm: Move fconf population after the enablement of MMUIn BL2, fw_config's population happened before the cache getsenabled.Hence to boost the performance, moved fw_config's populationafter cache gets enabled (i.e. after MMU gets enabled).Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>Change-Id: I2e75cabd76b1cb7a660f6b72f409ab40d2877284
fconf: Clean confused naming between TB_FW and FW_CONFIGCleaned up confused naming between TB_FW and FW_CONFIG.Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>Signed-off-by: Manish V B
fconf: Clean confused naming between TB_FW and FW_CONFIGCleaned up confused naming between TB_FW and FW_CONFIG.Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>Change-Id: I9e9f6e6ca076d38fee0388f97d370431ae067f08
Create separate header for ARM specific SMCCC definesMoved SMCCC defines from plat_arm.h to new <smccc_def.h> headerand include this header in all ARM platforms.Signed-off-by: Manish V Badarkhe
Create separate header for ARM specific SMCCC definesMoved SMCCC defines from plat_arm.h to new <smccc_def.h> headerand include this header in all ARM platforms.Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>Change-Id: I4cbc69c7b9307461de87b7c7bf200dd9b810e485
Unify type of "cpu_idx" across PSCI module.NOTE for platform integrators: API `plat_psci_stat_get_residency()` third argument `last_cpu_idx` is changed from "signed int" to the "unsigned i
Unify type of "cpu_idx" across PSCI module.NOTE for platform integrators: API `plat_psci_stat_get_residency()` third argument `last_cpu_idx` is changed from "signed int" to the "unsigned int" type.Issue / Trouble points1. cpu_idx is used as mix of `unsigned int` and `signed int` in codewith typecasting at some places leading to coverity issues.2. Underlying platform API's return cpu_idx as `unsigned int`and comparison is performed with platform specific defines`PLAFORM_xxx` which is not consistentMisra Rule 10.4:The value of a complex expression of integer type may only be cast toa type that is narrower and of the same signedness as the underlyingtype of the expression.Based on above points, cpu_idx is kept as `unsigned int` to matchthe API's and low-level functions and platform defines are updatedwhere ever requiredSigned-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c
Switch AARCH32/AARCH64 to __aarch64__NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.All common C compilers pre-define the same macros to signal whicharchitecture the cod
Switch AARCH32/AARCH64 to __aarch64__NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.All common C compilers pre-define the same macros to signal whicharchitecture the code is being compiled for: __arm__ for AArch32 (orearlier versions) and __aarch64__ for AArch64. There's no need for TF-Ato define its own custom macros for this. In order to unify code withthe export headers (which use __aarch64__ to avoid another dependency),let's deprecate the AARCH32 and AARCH64 macros and switch the code baseover to the pre-defined standard macro. (Since it is somewhatunintuitive that __arm__ only means AArch32, let's standardize on onlyusing __aarch64__.)Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200Signed-off-by: Julius Werner <jwerner@chromium.org>
n1sdp: add code for DDR ECC enablement and BL33 copy to DDRN1SDP platform supports RDIMMs with ECC capability. To use the ECCcapability, the entire DDR memory space has to be zeroed out beforeena
n1sdp: add code for DDR ECC enablement and BL33 copy to DDRN1SDP platform supports RDIMMs with ECC capability. To use the ECCcapability, the entire DDR memory space has to be zeroed out beforeenabling the ECC bits in DMC620. Zeroing out several gigabytes ofmemory from SCP is quite time consuming so functions are added thatzeros out the DDR memory from application processor which ismuch faster compared to SCP. BL33 binary cannot be copied to DDR memorybefore enabling ECC so this is also done by TF-A from IOFPGA-DDR3memory to main DDR4 memory after ECC is enabled.Original PLAT_PHY_ADDR_SPACE_SIZE was limited to 36-bits with whichthe entire DDR space cannot be accessed as DRAM2 starts in base0x8080000000. So these macros are redefined for all ARM platforms.Change-Id: If09524fb65b421b7a368b1b9fc52c49f2ddb7846Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Add option for defining platform DRAM2 baseThe default DRAM2 base address for Arm platformsis 0x880000000. However, on some platforms thefirmware may want to move the start address toa different
Add option for defining platform DRAM2 baseThe default DRAM2 base address for Arm platformsis 0x880000000. However, on some platforms thefirmware may want to move the start address toa different value.To support this introduce PLAT_ARM_DRAM2_BASE thatdefaults to 0x880000000; but can be overridden bya platform (e.g. in platform_def.h).Change-Id: I0d81195e06070bc98f376444b48ada2db1666e28Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
plat/arm: Introduce FVP Versatile Express platform.This patch adds support for Versatile express FVP (Fast models).Versatile express is a family of platforms that are based on ARM v7.Currently th
plat/arm: Introduce FVP Versatile Express platform.This patch adds support for Versatile express FVP (Fast models).Versatile express is a family of platforms that are based on ARM v7.Currently this port has only been tested on Cortex A7, although itshould work with other ARM V7 cores that support LPAE, generic timers,VFP and hardware divide. Future patches will support othercores like Cortex A5 that dont support features like LPAEand hardware divide. This platform is tested on and only expected towork on single core models.Change-Id: I10893af65b8bb64da7b3bd851cab8231718e61ddSigned-off-by: Usama Arif <usama.arif@arm.com>