1 /* 2 * Copyright (C) 2018 Marvell International Ltd. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * https://spdx.org/licenses 6 */ 7 8 #include <plat_marvell.h> 9 10 11 /* MMU entry for internal (register) space access */ 12 #define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \ 13 DEVICE0_SIZE, \ 14 MT_DEVICE | MT_RW | MT_SECURE) 15 16 /* 17 * Table of regions for various BL stages to map using the MMU. 18 */ 19 #if IMAGE_BL1 20 const mmap_region_t plat_marvell_mmap[] = { 21 MARVELL_MAP_SHARED_RAM, 22 MAP_DEVICE0, 23 {0} 24 }; 25 #endif 26 #if IMAGE_BL2 27 const mmap_region_t plat_marvell_mmap[] = { 28 MARVELL_MAP_SHARED_RAM, 29 MAP_DEVICE0, 30 MARVELL_MAP_DRAM, 31 {0} 32 }; 33 #endif 34 35 #if IMAGE_BL2U 36 const mmap_region_t plat_marvell_mmap[] = { 37 MAP_DEVICE0, 38 {0} 39 }; 40 #endif 41 42 #if IMAGE_BLE 43 const mmap_region_t plat_marvell_mmap[] = { 44 MAP_DEVICE0, 45 {0} 46 }; 47 #endif 48 49 #if IMAGE_BL31 50 const mmap_region_t plat_marvell_mmap[] = { 51 MARVELL_MAP_SHARED_RAM, 52 MAP_DEVICE0, 53 MARVELL_MAP_DRAM, 54 {0} 55 }; 56 #endif 57 #if IMAGE_BL32 58 const mmap_region_t plat_marvell_mmap[] = { 59 MAP_DEVICE0, 60 {0} 61 }; 62 #endif 63 64 MARVELL_CASSERT_MMAP; 65