xref: /rk3399_ARM-atf/bl2/aarch64/bl2_el3_entrypoint.S (revision 5b33ad174a03a5ccdcd6321c64d69167361dc21a)
1/*
2 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <common/bl_common.h>
10#include <el3_common_macros.S>
11
12	.globl	bl2_entrypoint
13	.globl	bl2_el3_run_image
14	.globl	bl2_run_next_image
15
16func bl2_entrypoint
17	/* Save arguments x0-x3 from previous Boot loader */
18	mov	x20, x0
19	mov	x21, x1
20	mov	x22, x2
21	mov	x23, x3
22
23	el3_entrypoint_common                                   \
24		_init_sctlr=1                                   \
25		_warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS  \
26		_secondary_cold_boot=!COLD_BOOT_SINGLE_CPU      \
27		_init_memory=1                                  \
28		_init_c_runtime=1                               \
29		_exception_vectors=bl2_el3_exceptions		\
30		_pie_fixup_size=0
31
32	/* ---------------------------------------------
33	 * Restore parameters of boot rom
34	 * ---------------------------------------------
35	 */
36	mov	x0, x20
37	mov	x1, x21
38	mov	x2, x22
39	mov	x3, x23
40
41	/* ---------------------------------------------
42	 * Perform BL2 setup
43	 * ---------------------------------------------
44	 */
45	bl	bl2_el3_setup
46
47#if ENABLE_PAUTH
48	/* ---------------------------------------------
49	 * Program APIAKey_EL1 and enable pointer authentication.
50	 * ---------------------------------------------
51	 */
52	bl	pauth_init_enable_el3
53#endif /* ENABLE_PAUTH */
54
55	/* ---------------------------------------------
56	 * Jump to main function.
57	 * ---------------------------------------------
58	 */
59	bl	bl2_main
60
61	/* ---------------------------------------------
62	 * Should never reach this point.
63	 * ---------------------------------------------
64	 */
65	no_ret	plat_panic_handler
66endfunc bl2_entrypoint
67
68func bl2_run_next_image
69	mov	x20,x0
70	/* ---------------------------------------------
71	 * MMU needs to be disabled because both BL2 and BL31 execute
72	 * in EL3, and therefore share the same address space.
73	 * BL31 will initialize the address space according to its
74	 * own requirement.
75	 * ---------------------------------------------
76	 */
77	bl	disable_mmu_icache_el3
78	tlbi	alle3
79	bl	bl2_el3_plat_prepare_exit
80
81#if ENABLE_PAUTH
82	/* ---------------------------------------------
83	 * Disable pointer authentication before jumping
84	 * to next boot image.
85	 * ---------------------------------------------
86	 */
87	bl	pauth_disable_el3
88#endif /* ENABLE_PAUTH */
89
90	ldp	x0, x1, [x20, #ENTRY_POINT_INFO_PC_OFFSET]
91	msr	elr_el3, x0
92	msr	spsr_el3, x1
93
94	ldp	x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)]
95	ldp	x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)]
96	ldp	x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)]
97	ldp	x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)]
98	eret
99endfunc bl2_run_next_image
100