| 69715ce9 | 25-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_gpio: move definitions to source file
Moves macros and structures definitions from stm32_gpio.h header file to the driver source file as these definition do not need to be visible fro
drivers: stm32_gpio: move definitions to source file
Moves macros and structures definitions from stm32_gpio.h header file to the driver source file as these definition do not need to be visible from other drivers thank to pin control abstraction.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 9ef7a09c | 25-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_i2c: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
drivers: stm32_i2c: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| def163ea | 25-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_uart: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
drivers: stm32_uart: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 2c2f848f | 25-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_gpio: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
drivers: stm32_gpio: remove cases when CFG_DRIVERS_PINCTRL is disabled
Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1 platform configuration enforces the switch is enabled.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 73ba32eb | 23-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_i2c: support CFG_DRIVERS_PINCTRL
Updates stm32_i2c driver for when CFG_DRIVERS_PINCTRL is enabled making I2C driver to get pin control configuration using the generic pin control fram
drivers: stm32_i2c: support CFG_DRIVERS_PINCTRL
Updates stm32_i2c driver for when CFG_DRIVERS_PINCTRL is enabled making I2C driver to get pin control configuration using the generic pin control framework. When enabled, stm32_i2c driver get the active and sleep pin control configuration from the device tree. Sleep pinctrl configuration is optional.
SE050 and STM32MP1 PMIC drivers that use the stm32_i2c bus are both updated accordingly.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 5b84bbd5 | 23-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_uart: support CFG_DRIVERS_PINCTRL
Updates stm32_uart driver for when CFG_DRIVERS_PINCTRL is enabled making UART driver to get pin control configuration using the generic pin control f
drivers: stm32_uart: support CFG_DRIVERS_PINCTRL
Updates stm32_uart driver for when CFG_DRIVERS_PINCTRL is enabled making UART driver to get pin control configuration using the generic pin control framework.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 7f823a77 | 26-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_gpio: add helper function stm32_pinctrl_set_secure_cfg()
Adds helper function stm32_pinctrl_set_secure_cfg() to set the GPIO pin secure state (secure or non-secure) for each pin refer
drivers: stm32_gpio: add helper function stm32_pinctrl_set_secure_cfg()
Adds helper function stm32_pinctrl_set_secure_cfg() to set the GPIO pin secure state (secure or non-secure) for each pin referenced by a pin control state.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 70ac0db5 | 26-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_gpio: add helper function stm32_gpio_pinctrl_bank_pin()
Adds helper function stm32_gpio_pinctrl_bank_pin() to get an array of bank and pin IDs related to a pin control state.
Acked-b
drivers: stm32_gpio: add helper function stm32_gpio_pinctrl_bank_pin()
Adds helper function stm32_gpio_pinctrl_bank_pin() to get an array of bank and pin IDs related to a pin control state.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b38386fb | 02-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_gpio: support CFG_DRIVERS_PINCTRL
Changes stm32_gpio driver to support generic pin control framework (CFG_DRIVERS_PINCTRL=y).
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.c
drivers: stm32_gpio: support CFG_DRIVERS_PINCTRL
Changes stm32_gpio driver to support generic pin control framework (CFG_DRIVERS_PINCTRL=y).
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 12438b45 | 19-Dec-2022 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
riscv: driver: implement platform-level interrupt controller (PLIC) driver
An initial implementation of RISC-V PLIC driver conforming to the specification. CFG_RISCV_PLIC flag allows building it or
riscv: driver: implement platform-level interrupt controller (PLIC) driver
An initial implementation of RISC-V PLIC driver conforming to the specification. CFG_RISCV_PLIC flag allows building it or not for platforms with custom PLIC IP.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 893a762d | 23-Jun-2023 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
drivers: stm32_bsec: implement the get otp by phandle
Add a new interface stm32_bsec_find_otp_by_phandle() to retrieve localization of an OTP from a given node phandle.
When the node phandle is abs
drivers: stm32_bsec: implement the get otp by phandle
Add a new interface stm32_bsec_find_otp_by_phandle() to retrieve localization of an OTP from a given node phandle.
When the node phandle is absent in the NVMEM node, layout_cell->phandle = 0 and reference to this OTP with this API function is not possible.
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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| 9f007225 | 12-Dec-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
drivers: stm32_bsec: add support for bits property in the DT
Adds the possibility to specify the number of managed bit in the NVMEM cell device tree description, using the optional bits property and
drivers: stm32_bsec: add support for bits property in the DT
Adds the possibility to specify the number of managed bit in the NVMEM cell device tree description, using the optional bits property and removes restriction on aligned NVMEM cell on 32-bit word by supporting bit offset in stm32_bsec_find_otp_in_nvmem_layout().
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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| 38df614f | 11-Jul-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
drivers: stm32_bsec: keep stm32_bsec_permanent_lock_otp() under flag
Keep the function to access the OTP lock under the CFG_STM32_BSEC_WRITE flag to align with the write function.
Reviewed-by: Etie
drivers: stm32_bsec: keep stm32_bsec_permanent_lock_otp() under flag
Keep the function to access the OTP lock under the CFG_STM32_BSEC_WRITE flag to align with the write function.
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
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| 3aa677d3 | 05-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_etzpc: register to dt_driver as simple bus
Registers stm32_etzpc driver to dt_drver as simple bus as expected by forth coming update of STM32MP13 SoC variant DTSI files.
Removes stm3
drivers: stm32_etzpc: register to dt_driver as simple bus
Registers stm32_etzpc driver to dt_drver as simple bus as expected by forth coming update of STM32MP13 SoC variant DTSI files.
Removes stm32_etzpc_init() that is not used by the platform.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 812f8b29 | 08-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: pinctrl: fix line breaks in propotypes
Fixes pin ctrl.h header file prototype declaration as per preferred by toolchains as clang.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Sign
drivers: pinctrl: fix line breaks in propotypes
Fixes pin ctrl.h header file prototype declaration as per preferred by toolchains as clang.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b357d34f | 06-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: dt_driver: swap TEE_result and retrieved device reference
Changes dt_driver callback function to return a TEE_Result value and pass retrieved device reference by a output argument rather than
core: dt_driver: swap TEE_result and retrieved device reference
Changes dt_driver callback function to return a TEE_Result value and pass retrieved device reference by a output argument rather than the opposite.
This change updates dt_driver.c, dt_driver.h and all drivers implementing related dt_driver callback function.
As a consequence, this change removes all type definition related to device specific callback handler function types which are useless as all these now comply with type dt_driver_probe_func defined in dt_driver.h.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 1001585e | 26-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_gpio: remove GPIO access specific API functions
Removes stm32_gpio API functions to access GPIOs as the driver has moved to the generic GPIO framework and consumer driver should use t
drivers: stm32_gpio: remove GPIO access specific API functions
Removes stm32_gpio API functions to access GPIOs as the driver has moved to the generic GPIO framework and consumer driver should use the generic API to access GPIOs. The driver now expects CFG_DRIVERS_GPIO is enabled.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8fd620f7 | 22-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: rename dt_driver_phandle_args to dt_pargs
Renames struct dt_driver_phandle_args to struct dt_pargs to shorten the label and prevent ugly line breaks in function signatures.
Acked-by: Jens Wik
core: rename dt_driver_phandle_args to dt_pargs
Renames struct dt_driver_phandle_args to struct dt_pargs to shorten the label and prevent ugly line breaks in function signatures.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 24b364c8 | 26-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: gpio: add operation inline description
Adds few inline description comment to GPIO operators.
Acked-by: Thomas Perrot <thomas.perrot@bootlin.com> Signed-off-by: Etienne Carriere <etienne.c
drivers: gpio: add operation inline description
Adds few inline description comment to GPIO operators.
Acked-by: Thomas Perrot <thomas.perrot@bootlin.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 83f24981 | 26-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: gpio: add put operation handle
Adds a put operation handler for a GPIO consumer driver to be able to release the GPIO resources it has allocated when getting its GPIO. This is needed for ex
drivers: gpio: add put operation handle
Adds a put operation handler for a GPIO consumer driver to be able to release the GPIO resources it has allocated when getting its GPIO. This is needed for example, when such a consumer driver must defer its probe sequence and will get again its GPIO making gpio_dt_alloc_pin() to be called again.
Acked-by: Thomas Perrot <thomas.perrot@bootlin.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 36844e78 | 23-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_gpio: fix driver header file guards
Fixes the names of the macro used as stm32_gpio.h header file guard.
Acked-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne
drivers: stm32_gpio: fix driver header file guards
Fixes the names of the macro used as stm32_gpio.h header file guard.
Acked-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| d7c41fc3 | 25-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: pinctrl: fix stubbed pinctrl_free_state()
Fixes pinctrl_free_state() when CFG_DRIVERS_PINCTRL is disabled as the API function has no return value.
The issue is reported by GCC with an erro
drivers: pinctrl: fix stubbed pinctrl_free_state()
Fixes pinctrl_free_state() when CFG_DRIVERS_PINCTRL is disabled as the API function has no return value.
The issue is reported by GCC with an error trace like the below:
core/include/drivers/pinctrl.h: In function ‘pinctrl_free_state’: lib/libutee/include/tee_api_defines.h:117:43: error: ‘return’ with a value, in function returning void [-Werror=return-type] 117 | #define TEE_ERROR_NOT_SUPPORTED 0xFFFF000A | ^~~~~~~~~~ core/include/drivers/pinctrl.h:158:16: note: in expansion of macro ‘TEE_ERROR_NOT_SUPPORTED’ 158 | return TEE_ERROR_NOT_SUPPORTED; | ^~~~~~~~~~~~~~~~~~~~~~~ In file included from core/include/drivers/stm32_uart.h:10, from core/arch/arm/plat-stm32mp1/main.c:14: core/include/drivers/pinctrl.h:156:6: note: declared here 156 | void pinctrl_free_state(struct pinctrl_state *state __unused) | ^~~~~~~~~~~~~~~~~~
Fixes: 9aec039ec0d7 ("drivers: pinctrl: add pinctrl support") Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 0ee3f52e | 16-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: gic: factorize call to gic_init() or gic_init_base_addr()
Platforms call either gic_init() or gic_init_base_addr() depending on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This chang
drivers: gic: factorize call to gic_init() or gic_init_base_addr()
Platforms call either gic_init() or gic_init_base_addr() depending on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This change factorize this logic from gic_init() implementation and makes gic_init_base_addr() local to gic.c.
For that purpose functions gic_init_base_address() and gic_dt_get_irq() are moved inside gic.c source file. source file.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 67e55c51 | 16-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: define main interrupt controller data from its driver
All but one platforms define CPU core interrupt controller from their platform main.c source file next to its main interrupt handler. This
core: define main interrupt controller data from its driver
All but one platforms define CPU core interrupt controller from their platform main.c source file next to its main interrupt handler. This change factorize these implementation by moving the definition of the controller data instance straight in the controller driver source file. This change makes each controller driver to implement straight itr_core_handler() function, preventing a extra branch on interrupt execution. Interrupt controller driver initialization function now straight calls itr_core_init().
This changes treats case when CFG_CORE_WORKAROUND_ARM_NMFI is enable to not conflict with core/arch/arm/kernel/thread.c that already overrides itr_core_handler() weak implementation.
With this change, the main controller initialization function (gic_init(), gic_init_base_addr(), gic_cpu_init() and hfic_init()) no more gets the controller data as input argument.
As a consequence, definition of struct hfic_data and struct gic_data moves from their respective driver header file to the respective driver source file.
As a consequence, gic_dump() no more requires an argument.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 9aec039e | 22-Feb-2022 |
Clément Léger <clement.leger@bootlin.com> |
drivers: pinctrl: add pinctrl support
Add support for pinctrl support using device-tree. The device-tree "pinctrl-<x>" and "pinctrl-names" properties are supported and allows to apply a pinctrl conf
drivers: pinctrl: add pinctrl support
Add support for pinctrl support using device-tree. The device-tree "pinctrl-<x>" and "pinctrl-names" properties are supported and allows to apply a pinctrl configuration based on this. This support also includes a way to register pin muxing controllers that can apply these states. A few properties of the pinctrl nodes are supported such as "bias-disable", "bias-pull-up" and "bias-pull-down".
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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