xref: /optee_os/core/arch/arm/plat-totalcompute/main.c (revision 67e55c51c9149ea549664b3981ad9032dcf4ce7f)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2021, Arm Limited. All rights reserved.
4  */
5 
6 #include <arm.h>
7 #include <console.h>
8 #include <drivers/gic.h>
9 #include <drivers/pl011.h>
10 #include <initcall.h>
11 #include <kernel/boot.h>
12 #include <kernel/misc.h>
13 #include <kernel/panic.h>
14 
15 #include <mm/core_mmu.h>
16 #include <platform_config.h>
17 
18 static struct pl011_data console_data __nex_bss;
19 
20 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
21 #ifndef CFG_CORE_SEL2_SPMC
22 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE);
23 #endif
24 
25 register_ddr(DRAM0_BASE, DRAM0_SIZE);
26 register_ddr(DRAM1_BASE, DRAM1_SIZE);
27 
28 #ifndef CFG_CORE_SEL2_SPMC
29 void main_init_gic(void)
30 {
31 	/*
32 	 * On ARMv8, GIC configuration is initialized in ARM-TF
33 	 * gicd base address is same as gicc_base.
34 	 */
35 	gic_init_base_addr(GIC_BASE + GICC_OFFSET, GIC_BASE + GICC_OFFSET);
36 }
37 #endif
38 
39 void console_init(void)
40 {
41 	pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ,
42 		   CONSOLE_UART_BAUDRATE);
43 	register_serial_console(&console_data.chip);
44 }
45