1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2017-2023, STMicroelectronics 4 */ 5 6 #ifndef DRIVERS_STM32_GPIO_H 7 #define DRIVERS_STM32_GPIO_H 8 9 #include <assert.h> 10 #include <compiler.h> 11 #include <drivers/pinctrl.h> 12 #include <stdbool.h> 13 #include <stdint.h> 14 #include <stddef.h> 15 16 #define GPIO_MODE_INPUT 0x0 17 #define GPIO_MODE_OUTPUT 0x1 18 #define GPIO_MODE_ALTERNATE 0x2 19 #define GPIO_MODE_ANALOG 0x3 20 21 #define GPIO_OTYPE_PUSH_PULL 0x0 22 #define GPIO_OTYPE_OPEN_DRAIN 0x1 23 24 #define GPIO_OSPEED_LOW 0x0 25 #define GPIO_OSPEED_MEDIUM 0x1 26 #define GPIO_OSPEED_HIGH 0x2 27 #define GPIO_OSPEED_VERY_HIGH 0x3 28 29 #define GPIO_PUPD_NO_PULL 0x0 30 #define GPIO_PUPD_PULL_UP 0x1 31 #define GPIO_PUPD_PULL_DOWN 0x2 32 33 #define GPIO_OD_LEVEL_LOW 0x0 34 #define GPIO_OD_LEVEL_HIGH 0x1 35 36 struct pinctrl_state; 37 38 /* 39 * GPIO configuration description structured as single 16bit word 40 * for efficient save/restore when GPIO pin suspends or resumes. 41 * 42 * @mode: One of GPIO_MODE_* 43 * @otype: One of GPIO_OTYPE_* 44 * @ospeed: One of GPIO_OSPEED_* 45 * @pupd: One of GPIO_PUPD_* 46 * @od: One of GPIO_OD_* 47 * @af: Alternate function numerical ID between 0 and 15 48 */ 49 struct gpio_cfg { 50 uint16_t mode: 2; 51 uint16_t otype: 1; 52 uint16_t ospeed: 2; 53 uint16_t pupd: 2; 54 uint16_t od: 1; 55 uint16_t af: 4; 56 }; 57 58 /* 59 * Description of a pin and its muxing 60 * 61 * @bank: GPIO bank identifier as assigned by the platform 62 * @pin: Pin number in the GPIO bank 63 * @cfg: Pin configuration 64 */ 65 struct stm32_pinctrl { 66 uint8_t bank; 67 uint8_t pin; 68 struct gpio_cfg cfg; 69 }; 70 71 #ifdef CFG_STM32_GPIO 72 /* 73 * Configure pin muxing access permission: can be secure or not 74 * 75 * @bank: GPIO bank identifier as assigned by the platform 76 * @pin: Pin number in the GPIO bank 77 * @secure: True if pin is secure, false otherwise 78 */ 79 void stm32_gpio_set_secure_cfg(unsigned int bank, unsigned int pin, 80 bool secure); 81 82 /* 83 * Get the number of GPIO pins supported by a target GPIO bank 84 * 85 * @fdt: device tree reference 86 * @pinctrl_node: pinctrl node which GPIO bank node belongs to 87 * @bank: target GPIO bank ID 88 * Return number of GPIO pins (>= 0) or a negative value on error 89 */ 90 int stm32_get_gpio_count(void *fdt, int pinctrl_node, unsigned int bank); 91 92 /* 93 * Configure pin muxing access permission: can be secure or not 94 * 95 * @pinctrl: Pin control state where STM32_GPIO pin are to configure 96 * @secure: True if pin is secure, false otherwise 97 */ 98 void stm32_pinctrl_set_secure_cfg(struct pinctrl_state *pinctrl, bool secure); 99 100 /* 101 * Get the bank and pin indices related to a pin control state 102 * @pinctrl: Pinctrl state 103 * @bank: Output bank indices array or NULL 104 * @pin: Output pin indices array or NULL 105 * @count: [in] Number of cells of @bank and @pin, [out] pin count in @pinctrl 106 */ 107 void stm32_gpio_pinctrl_bank_pin(struct pinctrl_state *pinctrl, 108 unsigned int *bank, unsigned int *pin, 109 unsigned int *count); 110 #else 111 static inline void 112 stm32_pinctrl_set_secure_cfg(struct pinctrl_state *pinctrl __unused, 113 bool secure __unused) 114 { 115 } 116 117 static inline void stm32_gpio_pinctrl_bank_pin(struct pinctrl_state *p __unused, 118 unsigned int *bank __unused, 119 unsigned int *pin __unused, 120 unsigned int *count __unused) 121 { 122 } 123 #endif /*CFG_STM32_GPIO*/ 124 #endif /*DRIVERS_STM32_GPIO_H*/ 125