drivers: qcom: ramblur: configure pIMEM access

Configure memory access to enable execution of Trusted Applications.

OP-TEE and its Trusted Applications execute from pIMEM, a region protected
by the

drivers: qcom: ramblur: configure pIMEM access

Configure memory access to enable execution of Trusted Applications.

OP-TEE and its Trusted Applications execute from pIMEM, a region protected
by the RAMBLUR IP block.

RAMBLUR provides anti-rollback protection as well as confidentiality and
integrity guarantees for the memory region under its control.

Any agent accessing the pIMEM-protected region performs normal reads or
writes to the pIMEM address range in the SNoC. The SNoC routes these
transactions to the pIMEM slave port, and pIMEM remasters them to DDR.

For write transactions, pIMEM applies the required cryptographic
operations before committing data to DDR.

For read transactions, pIMEM applies the corresponding cryptographic
operations before returning the data from DDR to the requesting master.

The reserved DDR region used by pIMEM to store cryptographically
processed data and associated cryptographic state is referred to as the
pIMEM vault.

With the current U-Boot (tag 2026.01-rc3), the pIMEM Vault DDR
reservation is derived from the TZ node in U-Boot’s built-in device tree
(specifically the trusted_apps_mem reserved-memory node).

U-Boot uses this node to construct the EFI memory map that is later
passed to the kernel.

A future update will remove this dependency on the built-in device tree.
Instead, U-Boot will obtain the memory configuration directly from SMEM.
Because of this transition, the current version of the driver does not
generate a DT overlay for U-Boot to consume.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Tony Hamilton <tonyh@qti.qualcomm.com>

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drivers: imx_mu: add support for i.MX943

Enable MU driver support for i.MX943

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Rouven Czerwinski <rouven.czerwinski@linaro.org>
Acked

drivers: imx_mu: add support for i.MX943

Enable MU driver support for i.MX943

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Rouven Czerwinski <rouven.czerwinski@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: stm32_i2c: fallback to interrupt access when no bottom half

Change stm32_i2c driver to allow I2C transfers in interrupt context
before bottom half thread is initialized and after it's relea

drivers: stm32_i2c: fallback to interrupt access when no bottom half

Change stm32_i2c driver to allow I2C transfers in interrupt context
before bottom half thread is initialized and after it's released.

This can be needed by PMIC driver to handle PMCI interrupt events
when bottom half thread is not supported by normal wold.
In that case, PMIC driver would need to register its interrupt to
stm32_i2c driver.

Thread accesses to the bus still start by locking the I2C bus mutex.
Before using the bus, the sequence now masks the PMIC interrupt and
polls (with timeout) on I2C bus access atomic lock. This lock
may be held by an I2C transfer currently executing in an interrupt
context. A 100ms timeout is short enough to also allow
debug console traces in the interrupt sequence. Masking the interrupt
before polling the lock ensures no new pending interrupt will interrupt
us (and execute a I2C transfer) while the thread context accesses the
I2C bus.

Interrupt accesses to the bus atomically set/clear the I2C bus access
lock while executing the interrupt sequence.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: imx: mu: add support for imx95

Add MU driver support for imx95

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

core: drivers: introduce Qualcomm GENI UART driver

Introduce a driver for the GENI UART found on modern Qualcomm platforms.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens W

core: drivers: introduce Qualcomm GENI UART driver

Introduce a driver for the GENI UART found on modern Qualcomm platforms.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Rouven Czerwinski <rouven.czerwinski@linaro.org>
[SG: cleaned up the driver]
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

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drivers: regulator: DT property regulator-enable-ramp-delay

Implement regulator DT property regulator-enable-ramp-delay.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by

drivers: regulator: DT property regulator-enable-ramp-delay

Implement regulator DT property regulator-enable-ramp-delay.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: regulator: DT property regulator-ramp-delay

Implement regulator DT property regulator-ramp-delay.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Thomas Bourg

drivers: regulator: DT property regulator-ramp-delay

Implement regulator DT property regulator-ramp-delay.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: regulator: DT properties over-current-protection

Define regulator property flags for the regulator DT binding
properties regulator-over-current-protection and
regulator-active-discharge.

S

drivers: regulator: DT properties over-current-protection

Define regulator property flags for the regulator DT binding
properties regulator-over-current-protection and
regulator-active-discharge.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: rockchip: extract OTP driver from rk3588 platform

The OTP handling is useful outside the rk3588 platform implementation.
For example, the fuses for secure boot are accessible via the OTP.

drivers: rockchip: extract OTP driver from rk3588 platform

The OTP handling is useful outside the rk3588 platform implementation.
For example, the fuses for secure boot are accessible via the OTP.

Extract the OTP write and read support to a separate driver to make it
available for other modules.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Etienne Carriere <etienne.carriere@st.com>

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dt-bindings: shared bindings between STM32MP25x and STM32MP23x boards

As the STM32MP23 SoC family is a derivative of the STM32MP25 SoC family,
the device tree bindings can be shared as they are comp

dt-bindings: shared bindings between STM32MP25x and STM32MP23x boards

As the STM32MP23 SoC family is a derivative of the STM32MP25 SoC family,
the device tree bindings can be shared as they are compatible.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: gpio: add new ops configure to initialize gpio

Add the new ops configure to initialize the GPIO resource based on
dt_flags. This new ops is require to support the modification of dt_flag
do

drivers: gpio: add new ops configure to initialize gpio

Add the new ops configure to initialize the GPIO resource based on
dt_flags. This new ops is require to support the modification of dt_flag
done by caller after gpio_dt_init_by_index() and before call of
gpio_configure().

It is done by example in driver of regulator fixed and gpio.

The new ops is called only in gpio_dt_cfg_by_index() or in
gpio_configure() so usage of one of this API is manadatory after
this patch.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: gpio: add configure functions

Align the OP-TEE GPIO driver with GPIO lib (devm_gpiod_get_index with
enum gpiod_flags) and add a way to select the GPIO configuration directly
during request

drivers: gpio: add configure functions

Align the OP-TEE GPIO driver with GPIO lib (devm_gpiod_get_index with
enum gpiod_flags) and add a way to select the GPIO configuration directly
during request with the new function, gpio_dt_cfg_by_index().

This patch remove assumption on GPIO direction (gpio input was assumed in
GPIO driver) or output level when the GPIO is requested by consumer.
with this patch it must be requested explicitly with:
- GPIO_IN: configure the input GPIO
- GPIO_ASIS: direction is managed by caller later with gpio_set_value()
call.
- GPIO_OUT_LOW / GPIO_OUT_HIGH: output GPIO at expected level,
the sequence for GPIO have the correct order to avoid glitch by using
the gpio function at the correct order.

This patch is a preliminary step for the introduction of ops configure.
The API gpio_dt_get_by_index() is keep for backward compatibility but
should be used with gpio_configure() or replaced by gpio_dt_cfg_by_index().

Now gpio_configure() is only used in the 2 drivers, regulator_fixed and
regulator_gpio, because in these drivers the flags gpio->dt_flags are
modified after call of gpio_dt_get_by_index().

For get_voltage_level_gpio(), GPIO_OUT_HIGH is used by default as it is
done in Linux function of_get_gpio_regulator_config().

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: gpio: support gpio suffix in device tree

Align the OP-TEE GPIO driver on the Linux GPIO lib behavior for the gpio
properties in device tree: search "gpios" or "gpio" when gpio_name is
omit

drivers: gpio: support gpio suffix in device tree

Align the OP-TEE GPIO driver on the Linux GPIO lib behavior for the gpio
properties in device tree: search "gpios" or "gpio" when gpio_name is
omitted and "foo-gpios" or "foo-gpio" when and if the gpio_name="foo".

This patch allows use of the function gpio_dt_get_by_index()
by GPIO consumers for all supported bindings.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: rtc: add support of alarm in RTC API

Add set_alarm and read_alarm to the RTC API to set and read an alarm.

In parallel three others functions are added:
- `enable_alarm()`: Enable or not t

drivers: rtc: add support of alarm in RTC API

Add set_alarm and read_alarm to the RTC API to set and read an alarm.

In parallel three others functions are added:
- `enable_alarm()`: Enable or not the alarm
- `wait_alarm()`: This function is called by the non-secure world and waits
until an alarm happens. The wait alarm caller is blocked until an
asynchronous notification arrives.
- `set_alarm_wakeup_status()`: Allow to disable or not the wakeup
capability of the alarm in low power mode

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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clk: stm32mp21: introduce STM32MP21 clock driver

As the STM32MP25 clock driver, this driver is based on the
clk-stm32-core API to manage STM32 gates, dividers, and multiplexer.

Signed-off-by: Yann

clk: stm32mp21: introduce STM32MP21 clock driver

As the STM32MP25 clock driver, this driver is based on the
clk-stm32-core API to manage STM32 gates, dividers, and multiplexer.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: add STM32MP21 clocks and resets bindings

Add stm32mp21-clks.h, stm32mp21-clksrc.h & stm32mp21-resets.h DT
bindings files for STM32MP21.

Signed-off-by: Yann Gautier <yann.gautier@foss.s

dt-bindings: add STM32MP21 clocks and resets bindings

Add stm32mp21-clks.h, stm32mp21-clksrc.h & stm32mp21-resets.h DT
bindings files for STM32MP21.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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dt-bindings: add stm32 TAMP support

Add device tree bindings for the TAMP hardware block stm32mpxx
platforms. These bindings permit the description of the configuration
of tamper events.

Signed-off

dt-bindings: add stm32 TAMP support

Add device tree bindings for the TAMP hardware block stm32mpxx
platforms. These bindings permit the description of the configuration
of tamper events.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rtc: add time stamping feature support

Support the time stamping features of the RTC. It is useful to generate
a timestamp whenever a particular event occurs.

Signed-off-by: Gatien C

drivers: stm32_rtc: add time stamping feature support

Support the time stamping features of the RTC. It is useful to generate
a timestamp whenever a particular event occurs.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_gpio: add stm32_gpio_get_bank_id() helper

Add stm32_gpio_get_bank_id() helper function to get the STM32
GPIO bank ID related to its GPIO chip

Signed-off-by: Gatien Chevallier <gatien

drivers: stm32_gpio: add stm32_gpio_get_bank_id() helper

Add stm32_gpio_get_bank_id() helper function to get the STM32
GPIO bank ID related to its GPIO chip

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: add STM32MP21x shared bindings

Adds STM32MP21x SoC family bindings that share STM32MP25
RISAF bindings.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by:

dt-bindings: add STM32MP21x shared bindings

Adds STM32MP21x SoC family bindings that share STM32MP25
RISAF bindings.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: wdt: add implementation of SMCWD_GET_TIMELEFT

Implement watchdog SMC service SMCWD_GET_TIMELEFT that is optional
and allows non-secure world to get information on watchdog state.
The servic

drivers: wdt: add implementation of SMCWD_GET_TIMELEFT

Implement watchdog SMC service SMCWD_GET_TIMELEFT that is optional
and allows non-secure world to get information on watchdog state.
The service is supported by new watchdog driver operation handler
get_timeleft.

Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_iwdg: remove OTP access in driver

Now we know if the watchdog is running by reading the hardware,
there is no need to read the OTP fuses related to the watchdog.
This allows removing

drivers: stm32_iwdg: remove OTP access in driver

Now we know if the watchdog is running by reading the hardware,
there is no need to read the OTP fuses related to the watchdog.
This allows removing platform function stm32_get_iwdg_otp_config()
and consequently stm32_iwdg.h header file.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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core: drivers: support SiFive UART

Add sifive uart support.

Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Zong Li <zo

core: drivers: support SiFive UART

Add sifive uart support.

Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Acked-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: scmi-msg: support performance domains for DVFS

Implement some of the SCMI performance domain management messages
in scmi-msg drivers to support basic DVFS scenario.

Co-developed-by: Etienn

drivers: scmi-msg: support performance domains for DVFS

Implement some of the SCMI performance domain management messages
in scmi-msg drivers to support basic DVFS scenario.

Co-developed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: add stm32 CPU DVFS driver

drivers/cpu_opp.c implements dynamic voltage and frequency
scaling for the CPU.
It is used at boot time to set an higher operating point than
the one used to boot.

drivers: add stm32 CPU DVFS driver

drivers/cpu_opp.c implements dynamic voltage and frequency
scaling for the CPU.
It is used at boot time to set an higher operating point than
the one used to boot.
It will be used by the SCMI performance service.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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