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Searched refs:bank_num (Results 1 – 25 of 27) sorted by relevance

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/rk3399_rockchip-uboot/drivers/pinctrl/rockchip/
H A Dpinctrl-rk3576.c23 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rk3576_set_mux()
35 if ((bank->bank_num == 0) && (pin >= RK_PB4) && (pin <= RK_PB7)) in rk3576_set_mux()
63 if (bank->bank_num == 0 && pin_num < 12) in rk3576_calc_drv_reg_and_bit()
65 else if (bank->bank_num == 0) in rk3576_calc_drv_reg_and_bit()
67 else if (bank->bank_num == 1) in rk3576_calc_drv_reg_and_bit()
69 else if (bank->bank_num == 2) in rk3576_calc_drv_reg_and_bit()
71 else if (bank->bank_num == 3) in rk3576_calc_drv_reg_and_bit()
73 else if (bank->bank_num == 4 && pin_num < 16) in rk3576_calc_drv_reg_and_bit()
75 else if (bank->bank_num == 4 && pin_num < 24) in rk3576_calc_drv_reg_and_bit()
77 else if (bank->bank_num == 4) in rk3576_calc_drv_reg_and_bit()
[all …]
H A Dpinctrl-rk3308.c18 .bank_num = 0,
25 .bank_num = 1,
32 .bank_num = 4,
39 .bank_num = 0,
46 .bank_num = 3,
53 .bank_num = 1,
60 .bank_num = 1,
67 .bank_num = 1,
74 .bank_num = 1,
81 .bank_num = 1,
[all …]
H A Dpinctrl-rk322x.c17 .bank_num = 0,
24 .bank_num = 3,
31 .bank_num = 0,
38 .bank_num = 0,
45 .bank_num = 0,
52 .bank_num = 1,
59 .bank_num = 3,
66 .bank_num = 1,
73 .bank_num = 1,
80 .bank_num = 3,
[all …]
H A Dpinctrl-rk3328.c84 .bank_num = 1,
91 .bank_num = 2,
98 .bank_num = 1,
105 .bank_num = 1,
112 .bank_num = 2,
119 .bank_num = 1,
126 .bank_num = 3,
133 .bank_num = 1,
140 .bank_num = 3,
147 .bank_num = 2,
[all …]
H A Dpinctrl-rk3506.c29 if (bank->bank_num == 0) { in rockchip_set_rmio()
34 } else if (bank->bank_num == 1) { in rockchip_set_rmio()
48 bank->bank_num, function); in rockchip_set_rmio()
71 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rk3506_set_mux()
82 if (bank->bank_num == 1) in rk3506_set_mux()
84 else if (bank->bank_num == 4) in rk3506_set_mux()
121 switch (bank->bank_num) { in rk3506_calc_drv_reg_and_bit()
178 debug("unsupported bank_num %d pin_num %d\n", bank->bank_num, pin_num); in rk3506_calc_drv_reg_and_bit()
206 if ((bank->bank_num == 0 && pin_num == 24) || bank->bank_num == 4) { in rk3506_set_drive()
235 switch (bank->bank_num) { in rk3506_calc_pull_reg_and_bit()
[all …]
H A Dpinctrl-rk3399.c17 .bank_num = 4,
24 .bank_num = 4,
31 .bank_num = 4,
38 .bank_num = 2,
45 .bank_num = 4,
87 if (bank->bank_num == 0 || bank->bank_num == 1) { in rk3399_calc_pull_reg_and_bit()
91 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
98 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
142 if (bank->bank_num == 0 || bank->bank_num == 1) in rk3399_calc_drv_reg_and_bit()
H A Dpinctrl-rk3128.c51 .bank_num = 1,
58 .bank_num = 1,
65 .bank_num = 0,
72 .bank_num = 1,
79 .bank_num = 0,
86 .bank_num = 1,
93 .bank_num = 2,
140 *reg += bank->bank_num * RK3128_PULL_BANK_STRIDE; in rk3128_calc_pull_reg_and_bit()
H A Dpinctrl-rv1126b.c23 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rv1126b_set_mux()
57 switch (bank->bank_num) { in rv1126b_calc_drv_reg_and_bit()
72 *reg = RV1126B_DRV_GPIO_OFFSET(bank->bank_num); in rv1126b_calc_drv_reg_and_bit()
76 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1126b_calc_drv_reg_and_bit()
123 switch (bank->bank_num) { in rv1126b_calc_pull_reg_and_bit()
138 *reg = RV1126B_PULL_GPIO_OFFSET(bank->bank_num); in rv1126b_calc_pull_reg_and_bit()
142 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1126b_calc_pull_reg_and_bit()
199 switch (bank->bank_num) { in rv1126b_calc_schmitt_reg_and_bit()
214 *reg = RV1126B_SMT_GPIO_OFFSET(bank->bank_num); in rv1126b_calc_schmitt_reg_and_bit()
218 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1126b_calc_schmitt_reg_and_bit()
H A Dpinctrl-rk3288.c16 .bank_num = 7,
23 .bank_num = 7,
49 if (bank->bank_num == 0) { in rk3288_set_mux()
73 if (bank->bank_num == 0) { in rk3288_calc_pull_reg_and_bit()
82 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3288_calc_pull_reg_and_bit()
111 if (bank->bank_num == 0) { in rk3288_set_pull()
135 if (bank->bank_num == 0) { in rk3288_calc_drv_reg_and_bit()
144 *reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE; in rk3288_calc_drv_reg_and_bit()
169 if (bank->bank_num == 0) { in rk3288_set_drive()
H A Dpinctrl-rk1808.c17 .bank_num = 3,
24 .bank_num = 1,
31 .bank_num = 4,
38 .bank_num = 2,
45 .bank_num = 3,
62 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rk1808_set_mux()
107 if (bank->bank_num == 0) { in rk1808_calc_pull_reg_and_bit()
133 if (bank->bank_num == 0) { in rk1808_calc_drv_reg_and_bit()
158 if (bank->bank_num == 0) { in rk1808_calc_schmitt_reg_and_bit()
164 *reg += (bank->bank_num - 1) * RK1808_SCHMITT_BANK_STRIDE; in rk1808_calc_schmitt_reg_and_bit()
H A Dpinctrl-rv1103b.c23 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rv1103b_set_mux()
25 if (bank->bank_num == 2 && pin >= 12) in rv1103b_set_mux()
64 switch (bank->bank_num) { in rv1103b_calc_drv_reg_and_bit()
104 dev_err(info->dev, "unsupported bank_num %d pin_num %d\n", bank->bank_num, pin_num); in rv1103b_calc_drv_reg_and_bit()
132 if (bank->bank_num == 2 && pin_num >= 12) { in rv1103b_set_drive()
162 switch (bank->bank_num) { in rv1103b_calc_pull_reg_and_bit()
202 dev_err(info->dev, "unsupported bank_num %d pin_num %d\n", bank->bank_num, pin_num); in rv1103b_calc_pull_reg_and_bit()
230 if (bank->bank_num == 2 && pin_num >= 12) in rv1103b_set_pull()
267 switch (bank->bank_num) { in rv1103b_calc_schmitt_reg_and_bit()
307 dev_err(info->dev, "unsupported bank_num %d pin_num %d\n", bank->bank_num, pin_num); in rv1103b_calc_schmitt_reg_and_bit()
[all …]
H A Dpinctrl-rk3588.c23 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rk3588_set_mux()
32 if (bank->bank_num == 0) { in rk3588_set_mux()
66 } else if (bank->bank_num > 0) { in rk3588_set_mux()
194 u8 bank_num = bank->bank_num; in rk3588_calc_pull_reg_and_bit() local
195 u32 pin = bank_num * 32 + pin_num; in rk3588_calc_pull_reg_and_bit()
220 u8 bank_num = bank->bank_num; in rk3588_calc_drv_reg_and_bit() local
221 u32 pin = bank_num * 32 + pin_num; in rk3588_calc_drv_reg_and_bit()
246 u8 bank_num = bank->bank_num; in rk3588_calc_schmitt_reg_and_bit() local
247 u32 pin = bank_num * 32 + pin_num; in rk3588_calc_schmitt_reg_and_bit()
H A Dpinctrl-rk3562.c23 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rk3562_set_mux()
36 if (bank->bank_num == 1) { in rk3562_set_mux()
68 switch (bank->bank_num) { in rk3562_calc_drv_reg_and_bit()
91 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3562_calc_drv_reg_and_bit()
134 switch (bank->bank_num) { in rk3562_calc_pull_reg_and_bit()
157 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3562_calc_pull_reg_and_bit()
210 switch (bank->bank_num) { in rk3562_calc_schmitt_reg_and_bit()
233 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3562_calc_schmitt_reg_and_bit()
H A Dpinctrl-rk3568.c119 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rk3568_set_mux()
151 if (bank->bank_num == 0) { in rk3568_calc_pull_reg_and_bit()
154 *reg += bank->bank_num * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
158 *reg += (bank->bank_num - 1) * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
179 if (bank->bank_num == 0) { in rk3568_calc_drv_reg_and_bit()
185 *reg += (bank->bank_num - 1) * RK3568_DRV_BANK_STRIDE; in rk3568_calc_drv_reg_and_bit()
205 if (bank->bank_num == 0) { in rk3568_calc_schmitt_reg_and_bit()
211 *reg += (bank->bank_num - 1) * RK3568_SCHMITT_BANK_STRIDE; in rk3568_calc_schmitt_reg_and_bit()
278 if (bank->bank_num == 1 && pin_num == 21) in rk3568_set_drive()
280 else if (bank->bank_num == 2 && pin_num == 2) in rk3568_set_drive()
[all …]
H A Dpinctrl-rockchip.h287 u8 bank_num; member
297 .bank_num = id, \
310 .bank_num = id, \
325 .bank_num = id, \
342 .bank_num = id, \
359 .bank_num = id, \
380 .bank_num = id, \
399 .bank_num = id, \
425 .bank_num = id, \
447 .bank_num = id, \
[all …]
H A Dpinctrl-rk3528.c23 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rk3528_set_mux()
57 switch (bank->bank_num) { in rk3528_calc_drv_reg_and_bit()
80 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3528_calc_drv_reg_and_bit()
123 switch (bank->bank_num) { in rk3528_calc_pull_reg_and_bit()
146 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3528_calc_pull_reg_and_bit()
199 switch (bank->bank_num) { in rk3528_calc_schmitt_reg_and_bit()
222 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3528_calc_schmitt_reg_and_bit()
H A Dpinctrl-rv1106.c23 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rv1106_set_mux()
61 switch (bank->bank_num) { in rv1106_calc_drv_reg_and_bit()
90 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1106_calc_drv_reg_and_bit()
133 switch (bank->bank_num) { in rv1106_calc_pull_reg_and_bit()
162 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1106_calc_pull_reg_and_bit()
215 switch (bank->bank_num) { in rv1106_calc_schmitt_reg_and_bit()
244 dev_err(priv->dev, "unsupported bank_num %d\n", bank->bank_num); in rv1106_calc_schmitt_reg_and_bit()
H A Dpinctrl-rv1108.c115 if (bank->bank_num == 0) { in rv1108_calc_pull_reg_and_bit()
123 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rv1108_calc_pull_reg_and_bit()
169 if (bank->bank_num == 0) { in rv1108_calc_drv_reg_and_bit()
178 *reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE; in rv1108_calc_drv_reg_and_bit()
224 if (bank->bank_num == 0) { in rv1108_calc_schmitt_reg_and_bit()
232 *reg += (bank->bank_num - 1) * RV1108_SCHMITT_BANK_STRIDE; in rv1108_calc_schmitt_reg_and_bit()
H A Dpinctrl-rk3368.c48 if (bank->bank_num == 0) { in rk3368_calc_pull_reg_and_bit()
57 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3368_calc_pull_reg_and_bit()
103 if (bank->bank_num == 0) { in rk3368_calc_drv_reg_and_bit()
112 *reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE; in rk3368_calc_drv_reg_and_bit()
H A Dpinctrl-rockchip-core.c50 if (data->num == bank->bank_num && in rockchip_get_recalced_mux()
74 if (data->bank_num == bank->bank_num && in rockchip_get_mux_route()
210 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rockchip_set_mux()
283 debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num, in rockchip_set_drive_perpin()
329 debug("setting pull of GPIO%d-%d to %d\n", bank->bank_num, in rockchip_set_pull()
344 debug("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num, in rockchip_set_schmitt()
650 if (ctrl->iomux_recalced[j].num == bank->bank_num) {
660 if (ctrl->iomux_routes[j].bank_num == bank->bank_num) {
H A Dpinctrl-rv1126.c152 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rv1126_set_mux()
198 if (bank->bank_num == 0) { in rv1126_calc_pull_reg_and_bit()
212 *reg += (bank->bank_num - 1) * RV1126_PULL_BANK_STRIDE; in rv1126_calc_pull_reg_and_bit()
261 if (bank->bank_num == 0) { in rv1126_calc_drv_reg_and_bit()
276 *reg += (bank->bank_num - 1) * RV1126_DRV_BANK_STRIDE; in rv1126_calc_drv_reg_and_bit()
315 if (bank->bank_num == 0) { in rv1126_calc_schmitt_reg_and_bit()
330 *reg += (bank->bank_num - 1) * RV1126_SCHMITT_BANK_STRIDE; in rv1126_calc_schmitt_reg_and_bit()
H A Dpinctrl-rk3188.c48 if (bank->bank_num == 0 && pin_num < 12) { in rk3188_calc_pull_reg_and_bit()
61 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3188_calc_pull_reg_and_bit()
/rk3399_rockchip-uboot/drivers/gpio/
H A Dzynq_gpio.c164 unsigned int *bank_num, in zynq_gpio_get_bank_pin() argument
174 *bank_num = bank; in zynq_gpio_get_bank_pin()
183 *bank_num = 0; in zynq_gpio_get_bank_pin()
207 unsigned int bank_num, bank_pin_num; in zynq_gpio_get_value() local
213 zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num, dev); in zynq_gpio_get_value()
216 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); in zynq_gpio_get_value()
223 unsigned int reg_offset, bank_num, bank_pin_num; in zynq_gpio_set_value() local
229 zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num, dev); in zynq_gpio_set_value()
234 reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num); in zynq_gpio_set_value()
236 reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num); in zynq_gpio_set_value()
[all …]
H A Drk_gpio.c164 if (bank->bank_num != id) { in rockchip_gpio_probe()
169 priv->bank = bank->bank_num; in rockchip_gpio_probe()
/rk3399_rockchip-uboot/drivers/pinctrl/
H A Dpinctrl-rockchip.c135 u8 bank_num; member
145 .bank_num = id, \
158 .bank_num = id, \
173 .bank_num = id, \
186 .bank_num = id, \
207 .bank_num = id, \
233 .bank_num = id, \
255 .bank_num = id, \
283 .bank_num = id, \
306 .bank_num = ID, \
[all …]

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