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/rk3399_ARM-atf/docs/design_documents/
H A Dmeasured_boot_poc.rst300 NOTICE: Booting Trusted Firmware
301 NOTICE: BL1: v2.5(release):v2.5
302 NOTICE: BL1: Built : 10:41:20, Jul 2 2021
303 NOTICE: BL1: Booting BL2
304 NOTICE: BL2: v2.5(release):v2.5
305 NOTICE: BL2: Built : 10:41:20, Jul 2 2021
306 NOTICE: TCG_EfiSpecIDEvent:
307 NOTICE: PCRIndex : 0
308 NOTICE: EventType : 3
309 NOTICE: Digest : 00
[all …]
/rk3399_ARM-atf/bl1/
H A Dbl1_main.c77 NOTICE(FIRMWARE_WELCOME_STR); in PMF_REGISTER_SERVICE()
78 NOTICE("BL1: %s\n", build_version_string); in PMF_REGISTER_SERVICE()
79 NOTICE("BL1: %s\n", build_message); in PMF_REGISTER_SERVICE()
138 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); in PMF_REGISTER_SERVICE()
198 NOTICE("BL1: Booting BL2\n"); in bl1_load_bl2()
209 NOTICE("BL1: Booting BL31\n"); in bl1_print_next_bl_ep_info()
211 NOTICE("BL1: Booting BL32\n"); in bl1_print_next_bl_ep_info()
219 NOTICE("BL1: Debug loop, spinning forever\n"); in print_debug_loop_message()
220 NOTICE("BL1: Please connect the debugger to continue\n"); in print_debug_loop_message()
/rk3399_ARM-atf/docs/plat/
H A Drz-g2.rst176 NOTICE: BL2: RZ/G2 Initial Program Loader(CA57) Rev.2.0.6
177 NOTICE: BL2: PRR is RZ/G2M Ver.1.3
178 NOTICE: BL2: Board is HiHope RZ/G2M Rev.4.0
179 NOTICE: BL2: Boot device is QSPI Flash(40MHz)
180 NOTICE: BL2: LCM state is unknown
181 NOTICE: BL2: DDR3200(rev.0.40)
182 NOTICE: BL2: [COLD_BOOT]
183 NOTICE: BL2: DRAM Split is 2ch
184 NOTICE: BL2: QoS is default setting(rev.0.19)
185 NOTICE: BL2: DRAM refresh interval 1.95 usec
[all …]
H A Drcar-gen3.rst207 NOTICE: BL2: PRR is R-Car H3 Ver.1.1
208 NOTICE: BL2: Board is Salvator-X Rev.1.0
209 NOTICE: BL2: Boot device is HyperFlash(80MHz)
210 NOTICE: BL2: LCM state is CM
211 NOTICE: AVS setting succeeded. DVFS_SetVID=0x53
212 NOTICE: BL2: DDR1600(rev.0.33)NOTICE: [COLD_BOOT]NOTICE: ..0
213 NOTICE: BL2: DRAM Split is 4ch
214 NOTICE: BL2: QoS is default setting(rev.0.37)
215 NOTICE: BL2: Lossy Decomp areas
216 NOTICE: Entry 0: DCMPAREACRAx:0x80000540 DCMPAREACRBx:0x570
[all …]
/rk3399_ARM-atf/plat/renesas/rzg/
H A Dbl2_plat_setup.c163 NOTICE("BL2: Cannot create FCNL node (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
170 NOTICE("BL2: Cannot add FCNL compat string %s (ret=%i)\n", in bl2_lossy_gen_fdt()
178 NOTICE("BL2: Cannot append FCNL compat string %s (ret=%i)\n", in bl2_lossy_gen_fdt()
185 NOTICE("BL2: Cannot add FCNL reg prop (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
191 NOTICE("BL2: Cannot append FCNL reg size prop (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
197 NOTICE("BL2: Cannot add FCNL no-map prop (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
203 NOTICE("BL2: Cannot add FCNL formats prop (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
230 NOTICE(" Entry %d: DCMPAREACRAx:0x%x DCMPAREACRBx:0x%x\n", no, in bl2_lossy_setting()
456 NOTICE("BL2: Cannot set compatible string, board unsupported\n"); in bl2_populate_compatible_string()
462 NOTICE("BL2: Cannot set compatible string (ret=%i)\n", ret); in bl2_populate_compatible_string()
[all …]
/rk3399_ARM-atf/plat/nuvoton/npcm845x/
H A Dnpcm845x_psci.c79 NOTICE("%s() nuvoton_psci\n", __func__); in npcm845x_validate_ns_entrypoint()
101 NOTICE("%s() nuvoton_psci\n", __func__); in npcm845x_cpu_standby()
166 NOTICE("%s() nuvoton_psci\n", __func__); in npcm845x_pwr_domain_suspend()
175 NOTICE("%s() Out of suspend\n", __func__); in npcm845x_pwr_domain_suspend()
186 NOTICE("%s() nuvoton_psci\n", __func__); in npcm845x_pwr_domain_on_finish()
208 NOTICE("%s() nuvoton_psci\n", __func__); in npcm845x_pwr_domain_suspend_finish()
228 NOTICE("%s() nuvoton_psci\n", __func__); in npcm845x_system_reset()
261 NOTICE("%s() nuvoton_psci\n", __func__); in npcm845x_validate_power_state()
304 NOTICE("%s() nuvoton_psci\n", __func__); in npcm845x_get_sys_suspend_power_state()
365 NOTICE("%s() nuvoton_psci\n", __func__); in npcm845x_pwr_domain_off()
/rk3399_ARM-atf/drivers/renesas/rcar/qos/H3/
H A Dqos_init_h3_v10.c24 NOTICE("BL2: DRAM Split is 4ch\n"); in qos_init_h3_v10()
33 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_h3_v10()
42 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_h3_v10()
47 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_h3_v10()
99 NOTICE("BL2: QoS is None\n"); in qos_init_h3_v10()
H A Dqos_init_h3_v30.c121 NOTICE("BL2: DRAM Split is 4ch(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3_v30()
131 NOTICE("BL2: DRAM Split is 2ch(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3_v30()
142 NOTICE("BL2: DRAM Split is OFF(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3_v30()
147 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_h3_v30()
151 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_h3_v30()
153 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_h3_v30()
157 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_h3_v30()
232 NOTICE("BL2: QoS is None\n"); in qos_init_h3_v30()
H A Dqos_init_h3_v20.c114 NOTICE("BL2: DRAM Split is 4ch\n"); in qos_init_h3_v20()
123 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_h3_v20()
132 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_h3_v20()
137 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_h3_v20()
141 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_h3_v20()
143 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_h3_v20()
147 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_h3_v20()
230 NOTICE("BL2: QoS is None\n"); in qos_init_h3_v20()
H A Dqos_init_h3n_v30.c125 NOTICE("BL2: DRAM Split is 2ch(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3n_v30()
136 NOTICE("BL2: DRAM Split is OFF(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3n_v30()
141 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_h3n_v30()
145 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_h3n_v30()
147 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_h3n_v30()
151 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_h3n_v30()
226 NOTICE("BL2: QoS is None\n"); in qos_init_h3n_v30()
/rk3399_ARM-atf/plat/brcm/board/stingray/src/
H A Dbl2_setup.c229 NOTICE("ihost_uvolts: %duv, vddc_uvolts: %duv\n", in set_ihost_vddc_swreg()
334 NOTICE("Switching on the Regulator idx: %u\n", in set_swreg_based_on_otp()
354 NOTICE("ddrc_uvolts: %duv\n", ddrc_uvolts); in set_swreg_based_on_otp()
593 NOTICE("pr0: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG0)); in dump_persistent_regs()
594 NOTICE("pr1: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG1)); in dump_persistent_regs()
595 NOTICE("pr2: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG2)); in dump_persistent_regs()
596 NOTICE("pr3: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG3)); in dump_persistent_regs()
597 NOTICE("pr4: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG4)); in dump_persistent_regs()
598 NOTICE("pr5: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG5)); in dump_persistent_regs()
599 NOTICE("pr6: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG6)); in dump_persistent_regs()
[all …]
/rk3399_ARM-atf/plat/renesas/rcar/
H A Dbl2_plat_setup.c167 NOTICE("BL2: Cannot create FCNL node (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
174 NOTICE("BL2: Cannot add FCNL compat string (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
181 NOTICE("BL2: Cannot append FCNL compat string (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
187 NOTICE("BL2: Cannot add FCNL reg prop (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
193 NOTICE("BL2: Cannot append FCNL reg size prop (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
199 NOTICE("BL2: Cannot add FCNL no-map prop (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
205 NOTICE("BL2: Cannot add FCNL formats prop (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
232 NOTICE(" Entry %d: DCMPAREACRAx:0x%x DCMPAREACRBx:0x%x\n", no, in bl2_lossy_setting()
243 NOTICE("BL2: Cannot create reserved mem node (ret=%i)\n", in bl2_create_reserved_memory()
250 NOTICE("BL2: Cannot add FCNL ranges prop (ret=%i)\n", ret); in bl2_create_reserved_memory()
[all …]
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2E/
H A Dqos_init_g2e_v10.c86 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_g2e_v10()
91 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2e_v10()
95 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2e_v10()
97 NOTICE("BL2: DRAM refresh interval 7.8 usec\n"); in qos_init_g2e_v10()
136 NOTICE("BL2: QoS is None\n"); in qos_init_g2e_v10()
/rk3399_ARM-atf/drivers/renesas/rcar/qos/E3/
H A Dqos_init_e3_v10.c87 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_e3_v10()
92 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_e3_v10()
96 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_e3_v10()
98 NOTICE("BL2: DRAM refresh interval 7.8 usec\n"); in qos_init_e3_v10()
138 NOTICE("BL2: QoS is None\n"); in qos_init_e3_v10()
/rk3399_ARM-atf/plat/marvell/armada/common/mss/
H A Dmss_scp_bootloader.c113 NOTICE("%s Loading MSS FW from addr. 0x%x Size 0x%x to MSS at 0x%lx\n", in mss_image_load()
154 NOTICE("CP MSS startup is postponed\n"); in mss_image_load()
165 NOTICE("Done\n"); in mss_image_load()
221 NOTICE("SCP Image doesn't contain PM firmware\n"); in mss_ap_load_image()
236 NOTICE("Load image to AP%d MSS\n", ap_idx); in load_img_to_cm3()
259 NOTICE("Skipping MSS CP%d related image\n", in load_img_to_cm3()
264 NOTICE("Load image to CP%d MSS AP%d\n", in load_img_to_cm3()
282 NOTICE("Skipping MG CP%d related image\n", in load_img_to_cm3()
286 NOTICE("Load image to CP%d MG\n", cp_index); in load_img_to_cm3()
330 NOTICE("SCP_BL2 contains %d concatenated images\n", in split_and_load_bl2_image()
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2M/
H A Dqos_init_g2m_v30.c118 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_g2m_v30()
126 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_g2m_v30()
131 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2m_v30()
135 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2m_v30()
137 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2m_v30()
141 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_g2m_v30()
206 NOTICE("BL2: QoS is None\n"); in qos_init_g2m_v30()
H A Dqos_init_g2m_v11.c118 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_g2m_v11()
126 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_g2m_v11()
131 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2m_v11()
135 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2m_v11()
137 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2m_v11()
141 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_g2m_v11()
214 NOTICE("BL2: QoS is None\n"); in qos_init_g2m_v11()
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2H/
H A Dqos_init_g2h_v30.c117 NOTICE("BL2: DRAM Split is 2ch(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_g2h_v30()
127 NOTICE("BL2: DRAM Split is OFF(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_g2h_v30()
132 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2h_v30()
136 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2h_v30()
138 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2h_v30()
142 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_g2h_v30()
213 NOTICE("BL2: QoS is None\n"); in qos_init_g2h_v30()
/rk3399_ARM-atf/drivers/renesas/rcar/qos/M3/
H A Dqos_init_m3_v30.c120 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_m3_v30()
129 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_m3_v30()
134 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_m3_v30()
138 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_m3_v30()
140 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_m3_v30()
144 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_m3_v30()
205 NOTICE("BL2: QoS is None\n"); in qos_init_m3_v30()
H A Dqos_init_m3_v11.c120 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_m3_v11()
129 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_m3_v11()
134 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_m3_v11()
138 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_m3_v11()
140 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_m3_v11()
144 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_m3_v11()
219 NOTICE("BL2: QoS is None\n"); in qos_init_m3_v11()
/rk3399_ARM-atf/plat/marvell/armada/a8k/common/
H A Dplat_ble_setup.c293 NOTICE("AVS request to step %s by 0x%x from old 0x%x\n", in avs_update_from_eeprom()
322 NOTICE("== SVC test build ==\n"); in avs_update_from_eeprom()
323 NOTICE("EEPROM holds values 0x%x, 0x%x and 0x%x\n", in avs_update_from_eeprom()
339 NOTICE("Ignore BAD AVS Override value in EEPROM!\n"); in avs_update_from_eeprom()
341 NOTICE("Override AVS by EEPROM value 0x%x\n", new_wp); in avs_update_from_eeprom()
389 NOTICE("SVC: SW Revision 0x%x. SVC is not supported\n", sw_ver); in ble_plat_svc_config()
391 NOTICE("SVC_TEST: AVS bypassed\n"); in ble_plat_svc_config()
450 NOTICE("SVC: DEV ID: %s, FREQ Mode: 0x%x\n", in ble_plat_svc_config()
481 NOTICE("SVC: DEV ID: %s, FREQ Mode: 0x%x\n", in ble_plat_svc_config()
535 NOTICE("7040 1600Mhz, avs = 0x%x\n", in ble_plat_svc_config()
[all …]
/rk3399_ARM-atf/drivers/nxp/flexspi/nor/
H A Dtest_fspi.c33 NOTICE("-------------------------- %d----------------------------------\n", count++); in fspi_test()
50 NOTICE("[%d]: Success Erase: data in buffer[%d] 0x%08x\n", __LINE__, i-3, buffer[i-3]); in fspi_test()
70 NOTICE("[%d]: Success IpWrite with IP READ in buffer[%d] 0x%08x\n", __LINE__, i-3, buffer[i-3]); in fspi_test()
86 …NOTICE("[%d]: Success IpWrite with AHB OR IP READ on buffer[%d] 0x%08x\n", __LINE__, i-3, buffer[i… in fspi_test()
/rk3399_ARM-atf/drivers/renesas/rcar/qos/M3N/
H A Dqos_init_m3n_v10.c119 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_m3n_v10()
124 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_m3n_v10()
128 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_m3n_v10()
130 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_m3n_v10()
134 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_m3n_v10()
199 NOTICE("BL2: QoS is None\n"); in qos_init_m3n_v10()
/rk3399_ARM-atf/plat/imx/imx8ulp/upower/
H A Dupower_hal.c63 NOTICE("%s: soc=%x\n", __func__, soc); in user_upwr_rdy_callb()
64 NOTICE("%s: RAM version:%d.%d\n", __func__, vmajor, vminor); in user_upwr_rdy_callb()
77 NOTICE("%s: start uPower RAM service\n", __func__); in upower_init()
82 NOTICE("%s: upower init failure\n", __func__); in upower_init()
107 NOTICE("%s failed: ret: %d, pwr_on: %d\n", __func__, ret, pwr_on); in upower_pwm()
114 NOTICE("Failure %d, %s\n", ret, __func__); in upower_pwm()
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2N/
H A Dqos_init_g2n_v10.c118 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_g2n_v10()
123 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2n_v10()
127 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2n_v10()
129 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2n_v10()
133 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_g2n_v10()
192 NOTICE("BL2: QoS is None\n"); in qos_init_g2n_v10()

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