Merge "fix(rcar3): add missing image_base/size assignment to BL33 image loading path" into integration

fix(rcar3): add missing image_base/size assignment to BL33 image loading path

Align BL33 image loading behavior in BL2 with BL3x image
loading behavior. BL31/BL32 image load already assigns
bl_mem_p

fix(rcar3): add missing image_base/size assignment to BL33 image loading path

Align BL33 image loading behavior in BL2 with BL3x image
loading behavior. BL31/BL32 image load already assigns
bl_mem_params->image_info.image_base and
bl_mem_params->image_info.image_size, but this assignment
is missing for BL33 image load.

This assignment is essential after retrieving the destination
address and size via rcar_get_dest_addr_from_cert(), so that
the parameters are passed correctly to the next stage. Without
this assignment, the BL33 image might not be loaded or validated
properly.

This change is not considered a vulnerability fix, but rather
a correction to ensure consistency and completeness in the BL2
image load logic.

Fixes: 4f7e0fa38fdb ("fix(rcar3): fix load address range check")
Signed-off-by: Hieu Nguyen <hieu.nguyen.dn@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Commit message update
Change-Id: I3c7c70f7f8d64b53e8c0f5ed61c71031b99fcde0

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Merge "feat(rcar3): populate kaslr-seed in next stage DT" into integration

feat(rcar3): populate kaslr-seed in next stage DT

The SCEG CC6.3S which contains TRNG is only accessible from secure
world. Pull 8 random bytes out of the TRNG and pass them to the next
stage via DT

feat(rcar3): populate kaslr-seed in next stage DT

The SCEG CC6.3S which contains TRNG is only accessible from secure
world. Pull 8 random bytes out of the TRNG and pass them to the next
stage via DT fragment as /chosen/kaslr-seed property, so Linux can
use those random bytes to initialize KASLR in case it is compiled
with CONFIG_RANDOMIZE_BASE .

Linux before this patch prints early on boot:
KASLR disabled due to lack of seed

Linux after this patch prints early on boot:
KASLR enabled

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: Ie05473e4e15d348febaca208247541e8a1532534

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Merge changes Ib481fade,Id4070b46,I4ac997cd into integration

* changes:
feat(rcar3): update IPL and Secure Monitor Rev.4.0.0
feat(rcar3): add cache operations to boot process
feat(rcar3): chan

Merge changes Ib481fade,Id4070b46,I4ac997cd into integration

* changes:
feat(rcar3): update IPL and Secure Monitor Rev.4.0.0
feat(rcar3): add cache operations to boot process
feat(rcar3): change MMU configurations

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feat(rcar3): add cache operations to boot process

Add cache operations because BL2 disabled MMU at the end of the boot
process, but did not clean/invalidate for the cache used by MMU.

Signed-off-by

feat(rcar3): add cache operations to boot process

Add cache operations because BL2 disabled MMU at the end of the boot
process, but did not clean/invalidate for the cache used by MMU.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Id4070b46103ca2b50788b3a99f6961a35df24418

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feat(rcar3): change MMU configurations

Always enable MMU and control access protection.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yosh

feat(rcar3): change MMU configurations

Always enable MMU and control access protection.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I4ac997cda2985746b2bf97ab9e4e5ace600f43ca

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Merge changes I038dc2bf,Iade15431 into integration

* changes:
fix(rcar3): change RAM protection configurations
fix(rcar3): fix load address range check

fix(rcar3): change RAM protection configurations

Change RAM protection control not to overwrite the images by DSMAC.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-o

fix(rcar3): change RAM protection configurations

Change RAM protection control not to overwrite the images by DSMAC.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I038dc2bf90e721692d392ea4de5441647aa62029
---
Marek: - Move axi DRAM out and merge AXI_SPTCR15 setting into it
- Set AXI_SPTCR1 from 0x0E000E0EU to 0x0E000000U to let
TEE pick TFA DT

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fix(rcar3): fix load address range check

Fixed the check of the address range which the program is loaded to.
Use the addresses and sizes in the BL31 and BL32 certificates to check
that they are wit

fix(rcar3): fix load address range check

Fixed the check of the address range which the program is loaded to.
Use the addresses and sizes in the BL31 and BL32 certificates to check
that they are within the range of the target address and size
defined inside the TF-A.
It also uses the addresses and sizes in the BL33x certificates to check
that they are outside the protected area defined inside the TF-A.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Code clean up
Change-Id: Iade15431fc86587489fb0ca9106f6baaf7e926e2

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Merge "fix(rcar): add mandatory fields in 'reserved-memory' node" into integration

Merge changes I1bfa797e,I0ec7a70e into integration

* changes:
fix(tree): correct some typos
fix(rockchip): use semicolon instead of comma

fix(tree): correct some typos

found using codespell (https://github.com/codespell-project/codespell).

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6

fix(tree): correct some typos

found using codespell (https://github.com/codespell-project/codespell).

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373

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fix(rcar): add mandatory fields in 'reserved-memory' node

On the R-Car Gen3 boards, u-boot will apply this reserved-memory node
directly on the Linux device-tree.

The linux kernel requires that the

fix(rcar): add mandatory fields in 'reserved-memory' node

On the R-Car Gen3 boards, u-boot will apply this reserved-memory node
directly on the Linux device-tree.

The linux kernel requires that the ranges, #address-cells
and #size-cells values must be set in the reserved-memory node.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Change-Id: Ic9b9bd3f2177a224d0931f6a4f4818a87904a493

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Merge "fix(rcar3): fix RPC-IF device node name" into integration

fix(rcar3): fix RPC-IF device node name

According to the Generic Names Recommendation in the Devicetree
Specification Release v0.3, and the DT Bindings for the Renesas Reduced
Pin Count Interface, t

fix(rcar3): fix RPC-IF device node name

According to the Generic Names Recommendation in the Devicetree
Specification Release v0.3, and the DT Bindings for the Renesas Reduced
Pin Count Interface, the node name for a Renesas RPC-IF device should be
"spi". The node name matters, as the node is enabled by passing a DT
fragment from TF-A to subsequent software.

Fix this by renaming the device node in the passed DT fragment from
"rpc" to "spi".

Fixes: 12c75c8886a0ee69 ("feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Change-Id: Idb43353947607611331abc344f8c8ae932a20408

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Merge "fix: libc: use long for 64-bit types on aarch64" into integration

fix: libc: use long for 64-bit types on aarch64

Use long instead of long long on aarch64 for 64_t stdint types.
Introduce inttypes.h to properly support printf format specifiers for
fixed width type

fix: libc: use long for 64-bit types on aarch64

Use long instead of long long on aarch64 for 64_t stdint types.
Introduce inttypes.h to properly support printf format specifiers for
fixed width types for such change.

Change-Id: I0bca594687a996fde0a9702d7a383055b99f10a1
Signed-off-by: Scott Branden <scott.branden@broadcom.com>

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Merge changes Ie7c0eaf2,I11d882f3,I3f173ac4,If1fa12bf,I3e3a202f, ... into integration

* changes:
feat(plat/rcar3): keep RWDT enabled
feat(drivers/rcar3): add extra offset if booting B-side
fea

Merge changes Ie7c0eaf2,I11d882f3,I3f173ac4,If1fa12bf,I3e3a202f, ... into integration

* changes:
feat(plat/rcar3): keep RWDT enabled
feat(drivers/rcar3): add extra offset if booting B-side
feat(plat/rcar3): modify LifeC register setting for R-Car D3
feat(plat/rcar3): modify SWDT counter setting for R-Car D3
feat(plat/rcar3): update DDR setting for R-Car D3
feat(plat/rcar3): remove access to RMSTPCRn registers in R-Car D3
feat(plat/rcar3): add process of SSCG setting for R-Car D3
feat(plat/rcar3): add process to back up X6 and X7 register's value
feat(plat/rcar3): modify operation register from SYSCISR to SYSCISCR
feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up
feat(plat/rcar3): change the memory map for OP-TEE
feat(plat/rcar3): use PRR cut to determine DRAM size on M3
feat(plat/rcar3): apply ERRATA_A53_1530924 and ERRATA_A57_1319537
fix(plat/rcar3): fix disabling MFIS write protection for R-Car D3
fix(plat/rcar3): fix eMMC boot support for R-Car D3
fix(plat/rcar3): fix version judgment for R-Car D3
fix(plat/rcar3): fix source file to make about GICv2
fix(drivers/rcar3): console: fix a return value of console_rcar_init

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feat(plat/rcar3): add process of SSCG setting for R-Car D3

- Added the condition where output the SSCG (MD12) setting
to log for R-Car D3.
- Added the process to switching the bit rate of SCIF by

feat(plat/rcar3): add process of SSCG setting for R-Car D3

- Added the condition where output the SSCG (MD12) setting
to log for R-Car D3.
- Added the process to switching the bit rate of SCIF by the
SSCG (MD12) setting value for R-Car D3.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Iaf07fa4df12dc233af0b57569ee4fa9329f670a9

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feat(plat/rcar3): use PRR cut to determine DRAM size on M3

The new M3 DRAM size can be determined by the PRR cut version.
Read the PRR cut version, and if it is older than cut 30, use
legacy DRAM si

feat(plat/rcar3): use PRR cut to determine DRAM size on M3

The new M3 DRAM size can be determined by the PRR cut version.
Read the PRR cut version, and if it is older than cut 30, use
legacy DRAM size scheme, else report 8GB in 2GBx4 2ch split.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # Fix DRAM size judgment by PRR register, reword commit message
Change-Id: Ib83176d0d09cab5cae0119ba462e42c66c642798

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fix(plat/rcar3): fix disabling MFIS write protection for R-Car D3

Fix disabling MFIS write protection for R-Car D3.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by:

fix(plat/rcar3): fix disabling MFIS write protection for R-Car D3

Fix disabling MFIS write protection for R-Car D3.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I8bb5787c09c53dff55d6de89adfcb71157533976

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fix(plat/rcar3): fix eMMC boot support for R-Car D3

Fix to support of booting from eMMC (50MHz x 8) on
Draak board for R-Car D3.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed

fix(plat/rcar3): fix eMMC boot support for R-Car D3

Fix to support of booting from eMMC (50MHz x 8) on
Draak board for R-Car D3.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I0ab2b5c7f8075acbf5f4a69694fb535dddc1a4c8

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fix(plat/rcar3): fix version judgment for R-Car D3

Added the process of judgment and logging for R-Car D3 Ver.1.1 and Ver.1.0.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-o

fix(plat/rcar3): fix version judgment for R-Car D3

Added the process of judgment and logging for R-Car D3 Ver.1.1 and Ver.1.0.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I326aa42374b70b6a4a71893561a7eaa0b6eddef0

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Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration

* changes:
feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked
feat(plat/rcar3): add a DRAM siz

Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration

* changes:
feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked
feat(plat/rcar3): add a DRAM size setting for M3N
feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.0
feat(plat/rcar3): add new board revision for Salvator-XS/H3ULCB
feat(drivers/rcar3): ddr: add function to judge a DDR rank
fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N
fix(drivers/rcar3): i2c_dvfs: fix I2C operation
fix(drivers/rcar3): fix CPG registers redefinition
fix(drivers/rcar3): emmc: remove CPG_CPGWPR redefinition
fix(plat/rcar3): generate two memory nodes for larger than 2 GiB channel 0
refactor(plat/rcar3): factor out DT memory node generation
feat(plat/rcar3): add optional support for gzip-compressed BL33

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