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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dste-dbx5x0-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "ste-nomadik-pinctrl.dtsi"
17 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
28 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
32 pins = "GPIO1_AJ3"; /* RTS */
36 pins = "GPIO3_AH3"; /* TXD */
49 pins = "GPIO4_AH6"; /* RXD */
53 pins = "GPIO5_AG6"; /* TXD */
60 pins = "GPIO4_AH6"; /* RXD */
[all …]
H A Drk3288-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
11 hdmi_gpio: hdmi-gpio {
12 rockchip,pins =
17 hdmi_cec_c0: hdmi-cec-c0 {
18 rockchip,pins =
22 hdmi_cec_c7: hdmi-cec-c7 {
23 rockchip,pins =
27 hdmi_ddc: hdmi-ddc {
[all …]
H A Dexynos4412-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4412 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4412 SoCs pin-mux and pin-config optiosn are listed as device
12 #include <dt-bindings/pinctrl/samsung.h>
16 samsung,pins = #_pin; \
17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
23 gpio-controller;
24 #gpio-cells = <2>;
26 interrupt-controller;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/
H A Dmsm8916-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 blsp1_uart1_default: blsp1-uart1-default {
10 pins = "gpio0", "gpio1", "gpio2", "gpio3";
13 drive-strength = <16>;
14 bias-disable;
17 blsp1_uart1_sleep: blsp1-uart1-sleep {
18 pins = "gpio0", "gpio1", "gpio2", "gpio3";
21 drive-strength = <2>;
22 bias-pull-down;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/thermal/thermal.h>
50 #include <dt-bindings/clock/sun4i-a10-pll2.h>
51 #include <dt-bindings/dma/sun4i-a10.h>
52 #include <dt-bindings/pinctrl/sun4i-a10.h>
55 interrupt-parent = <&gic>;
62 #address-cells = <1>;
63 #size-cells = <1>;
[all …]
H A Dsama5d3.dtsi2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
21 interrupt-parent = <&aic>;
44 #address-cells = <1>;
45 #size-cells = <0>;
48 compatible = "arm,cortex-a5";
[all …]
H A Dat91sam9n12.dtsi2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
20 interrupt-parent = <&aic>;
41 #address-cells = <0>;
42 #size-cells = <0>;
45 compatible = "arm,arm926ej-s";
[all …]
H A Dat91sam9261.dtsi2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
18 interrupt-parent = <&aic>;
37 #address-cells = <0>;
38 #size-cells = <0>;
41 compatible = "arm,arm926ej-s";
[all …]
H A Drv1126-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
11 a7m0_pins: a7m0-pins {
12 rockchip,pins =
18 a7m1_pins: a7m1-pins {
19 rockchip,pins =
27 acodec_pins: acodec-pins {
28 rockchip,pins =
46 auddsm_pins: auddsm-pins {
[all …]
H A Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun4i-a10-pll2.h>
49 #include <dt-bindings/dma/sun4i-a10.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&intc>;
60 #address-cells = <1>;
61 #size-cells = <1>;
65 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer";
[all …]
H A Dat91sam9260.dtsi2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
20 interrupt-parent = <&aic>;
40 #address-cells = <0>;
41 #size-cells = <0>;
44 compatible = "arm,arm926ej-s";
[all …]
H A Dat91sam9x5.dtsi2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
22 interrupt-parent = <&aic>;
44 #address-cells = <0>;
45 #size-cells = <0>;
48 compatible = "arm,arm926ej-s";
[all …]
H A Dat91sam9rl.dtsi2 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/pwm/pwm.h>
19 interrupt-parent = <&aic>;
41 #address-cells = <0>;
42 #size-cells = <0>;
[all …]
H A Dat91sam9263.dtsi2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
18 interrupt-parent = <&aic>;
39 #address-cells = <0>;
40 #size-cells = <0>;
43 compatible = "arm,arm926ej-s";
[all …]
H A Dsun5i-gr8.dtsi4 * Mylène Josserand <mylene.josserand@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun4i-a10-pll2.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/pinctrl/sun4i-a10.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
56 #size-cells = <0>;
[all …]
H A Dat91sam9g45.dtsi2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
22 interrupt-parent = <&aic>;
44 #address-cells = <0>;
45 #size-cells = <0>;
48 compatible = "arm,arm926ej-s";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3308bs-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 pcfg_pull_none_0_4ma: pcfg-pull-none-0-4ma {
9 bias-disable;
10 drive-strength-s = <4>;
12 pcfg_pull_none_0_4ma_smt: pcfg-pull-none-0-4ma-smt {
13 bias-disable;
14 drive-strength-s = <4>;
15 input-schmitt-enable;
17 pcfg_pull_up_0_4ma: pcfg-pull-up-0-4ma {
18 bias-pull-up;
[all …]
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/img/
H A Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dimx8mq-evk.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 /dts-v1/;
13 compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pcie0_refclk: pcie0-refclk {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <100000000>;
30 reg_usdhc2_vmmc: regulator-vsd-3v3 {
[all …]
H A Dimx8mq-librem5-devkit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "dt-bindings/pwm/pwm.h"
11 #include "dt-bindings/usb/pd.h"
16 compatible = "purism,librem5-devkit", "fsl,imx8mq";
18 backlight_dsi: backlight-dsi {
19 compatible = "pwm-backlight";
[all …]
H A Dimx8mq-hummingboard-pulse.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
6 /dts-v1/;
8 #include "dt-bindings/usb/pd.h"
9 #include "imx8mq-sr-som.dtsi"
13 compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";
16 stdout-path = &uart1;
19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
20 compatible = "regulator-fixed";
21 pinctrl-names = "default";
[all …]
H A Dimx8mm-beacon-baseboard.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 compatible = "gpio-leds";
13 default-state = "off";
19 default-state = "off";
25 default-state = "off";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_led3>;
33 linux,default-trigger = "heartbeat";
37 reg_audio: regulator-audio {
38 compatible = "regulator-fixed";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
25 stdout-path = "serial0:115200n8";
31 proc-supply = <&mt6380_vcpu_reg>;
32 sram-supply = <&mt6380_vm_reg>;
36 proc-supply = <&mt6380_vcpu_reg>;
37 sram-supply = <&mt6380_vm_reg>;
[all …]
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
16 model = "Bananapi BPI-R64";
17 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
24 stdout-path = "serial0:115200n8";
30 proc-supply = <&mt6380_vcpu_reg>;
31 sram-supply = <&mt6380_vm_reg>;
35 proc-supply = <&mt6380_vcpu_reg>;
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk.h>
23 #include <linux/pinctrl/pinconf-generic.h>
33 #include "../pinctrl-utils.h"
34 #include "pinctrl-stm32.h"
86 struct clk *clk; member
113 struct stm32_desc_pin *pins; member
145 return function - 1; in stm32_gpio_get_alt()
156 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_VAL); in stm32_gpio_backup_value()
157 bank->pin_backup[offset] |= value << STM32_GPIO_BKP_VAL; in stm32_gpio_backup_value()
[all …]

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