xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2013 Linaro Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include "ste-nomadik-pinctrl.dtsi"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun&pinctrl {
9*4882a593Smuzhiyun	/* Settings for all UART default and sleep states */
10*4882a593Smuzhiyun	uart0 {
11*4882a593Smuzhiyun		u0_a_1_default: u0_a_1_default {
12*4882a593Smuzhiyun			default_mux {
13*4882a593Smuzhiyun				function = "u0";
14*4882a593Smuzhiyun				groups = "u0_a_1";
15*4882a593Smuzhiyun			};
16*4882a593Smuzhiyun			default_cfg1 {
17*4882a593Smuzhiyun				pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
18*4882a593Smuzhiyun				ste,config = <&in_pu>;
19*4882a593Smuzhiyun			};
20*4882a593Smuzhiyun			default_cfg2 {
21*4882a593Smuzhiyun				pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
22*4882a593Smuzhiyun				ste,config = <&out_hi>;
23*4882a593Smuzhiyun			};
24*4882a593Smuzhiyun		};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		u0_a_1_sleep: u0_a_1_sleep {
27*4882a593Smuzhiyun			sleep_cfg1 {
28*4882a593Smuzhiyun				pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
29*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
30*4882a593Smuzhiyun			};
31*4882a593Smuzhiyun			sleep_cfg2 {
32*4882a593Smuzhiyun				pins = "GPIO1_AJ3"; /* RTS */
33*4882a593Smuzhiyun				ste,config = <&slpm_out_hi_wkup_pdis>;
34*4882a593Smuzhiyun			};
35*4882a593Smuzhiyun			sleep_cfg3 {
36*4882a593Smuzhiyun				pins = "GPIO3_AH3"; /* TXD */
37*4882a593Smuzhiyun				ste,config = <&slpm_out_wkup_pdis>;
38*4882a593Smuzhiyun			};
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	uart1 {
43*4882a593Smuzhiyun		u1rxtx_a_1_default: u1rxtx_a_1_default {
44*4882a593Smuzhiyun			default_mux {
45*4882a593Smuzhiyun				function = "u1";
46*4882a593Smuzhiyun				groups = "u1rxtx_a_1";
47*4882a593Smuzhiyun			};
48*4882a593Smuzhiyun			default_cfg1 {
49*4882a593Smuzhiyun				pins = "GPIO4_AH6"; /* RXD */
50*4882a593Smuzhiyun				ste,config = <&in_pu>;
51*4882a593Smuzhiyun			};
52*4882a593Smuzhiyun			default_cfg2 {
53*4882a593Smuzhiyun				pins = "GPIO5_AG6"; /* TXD */
54*4882a593Smuzhiyun				ste,config = <&out_hi>;
55*4882a593Smuzhiyun			};
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun		u1rxtx_a_1_sleep: u1rxtx_a_1_sleep {
59*4882a593Smuzhiyun			sleep_cfg1 {
60*4882a593Smuzhiyun				pins = "GPIO4_AH6"; /* RXD */
61*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
62*4882a593Smuzhiyun			};
63*4882a593Smuzhiyun			sleep_cfg2 {
64*4882a593Smuzhiyun				pins = "GPIO5_AG6"; /* TXD */
65*4882a593Smuzhiyun				ste,config = <&slpm_out_wkup_pdis>;
66*4882a593Smuzhiyun			};
67*4882a593Smuzhiyun		};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun		u1ctsrts_a_1_default: u1ctsrts_a_1_default {
70*4882a593Smuzhiyun			default_mux {
71*4882a593Smuzhiyun				function = "u1";
72*4882a593Smuzhiyun				groups = "u1ctsrts_a_1";
73*4882a593Smuzhiyun			};
74*4882a593Smuzhiyun			default_cfg1 {
75*4882a593Smuzhiyun				pins = "GPIO6_AF6"; /* CTS */
76*4882a593Smuzhiyun				ste,config = <&in_pu>;
77*4882a593Smuzhiyun			};
78*4882a593Smuzhiyun			default_cfg2 {
79*4882a593Smuzhiyun				pins = "GPIO7_AG5"; /* RTS */
80*4882a593Smuzhiyun				ste,config = <&out_hi>;
81*4882a593Smuzhiyun			};
82*4882a593Smuzhiyun		};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		u1ctsrts_a_1_sleep: u1ctsrts_a_1_sleep {
85*4882a593Smuzhiyun			sleep_cfg1 {
86*4882a593Smuzhiyun				pins = "GPIO6_AF6"; /* CTS */
87*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
88*4882a593Smuzhiyun			};
89*4882a593Smuzhiyun			sleep_cfg2 {
90*4882a593Smuzhiyun				pins = "GPIO7_AG5"; /* RTS */
91*4882a593Smuzhiyun				ste,config = <&slpm_out_hi_wkup_pdis>;
92*4882a593Smuzhiyun			};
93*4882a593Smuzhiyun		};
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	uart2 {
97*4882a593Smuzhiyun		u2rxtx_c_1_default: u2rxtx_c_1_default {
98*4882a593Smuzhiyun			default_mux {
99*4882a593Smuzhiyun				function = "u2";
100*4882a593Smuzhiyun				groups = "u2rxtx_c_1";
101*4882a593Smuzhiyun			};
102*4882a593Smuzhiyun			default_cfg1 {
103*4882a593Smuzhiyun				pins = "GPIO29_W2"; /* RXD */
104*4882a593Smuzhiyun				ste,config = <&in_pu>;
105*4882a593Smuzhiyun			};
106*4882a593Smuzhiyun			default_cfg2 {
107*4882a593Smuzhiyun				pins = "GPIO30_W3"; /* TXD */
108*4882a593Smuzhiyun				ste,config = <&out_hi>;
109*4882a593Smuzhiyun			};
110*4882a593Smuzhiyun		};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun		u2rxtx_c_1_sleep: u2rxtx_c_1_sleep {
113*4882a593Smuzhiyun			sleep_cfg1 {
114*4882a593Smuzhiyun				pins = "GPIO29_W2"; /* RXD */
115*4882a593Smuzhiyun				ste,config = <&in_wkup_pdis>;
116*4882a593Smuzhiyun			};
117*4882a593Smuzhiyun			sleep_cfg2 {
118*4882a593Smuzhiyun				pins = "GPIO30_W3"; /* TXD */
119*4882a593Smuzhiyun				ste,config = <&out_wkup_pdis>;
120*4882a593Smuzhiyun			};
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun	};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun	/* Settings for all I2C default and sleep states */
125*4882a593Smuzhiyun	i2c0 {
126*4882a593Smuzhiyun		i2c0_a_1_default: i2c0_a_1_default {
127*4882a593Smuzhiyun			default_mux {
128*4882a593Smuzhiyun				function = "i2c0";
129*4882a593Smuzhiyun				groups = "i2c0_a_1";
130*4882a593Smuzhiyun			};
131*4882a593Smuzhiyun			default_cfg1 {
132*4882a593Smuzhiyun				pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
133*4882a593Smuzhiyun				ste,config = <&in_nopull>;
134*4882a593Smuzhiyun			};
135*4882a593Smuzhiyun		};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun		i2c0_a_1_sleep: i2c0_a_1_sleep {
138*4882a593Smuzhiyun			sleep_cfg1 {
139*4882a593Smuzhiyun				pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
140*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
141*4882a593Smuzhiyun			};
142*4882a593Smuzhiyun		};
143*4882a593Smuzhiyun	};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun	i2c1 {
146*4882a593Smuzhiyun		i2c1_b_2_default: i2c1_b_2_default {
147*4882a593Smuzhiyun			default_mux {
148*4882a593Smuzhiyun				function = "i2c1";
149*4882a593Smuzhiyun				groups = "i2c1_b_2";
150*4882a593Smuzhiyun			};
151*4882a593Smuzhiyun			default_cfg1 {
152*4882a593Smuzhiyun				pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
153*4882a593Smuzhiyun				ste,config = <&in_nopull>;
154*4882a593Smuzhiyun			};
155*4882a593Smuzhiyun		};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun		i2c1_b_2_sleep: i2c1_b_2_sleep {
158*4882a593Smuzhiyun			sleep_cfg1 {
159*4882a593Smuzhiyun				pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
160*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
161*4882a593Smuzhiyun			};
162*4882a593Smuzhiyun		};
163*4882a593Smuzhiyun	};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun	i2c2 {
166*4882a593Smuzhiyun		i2c2_b_2_default: i2c2_b_2_default {
167*4882a593Smuzhiyun			default_mux {
168*4882a593Smuzhiyun				function = "i2c2";
169*4882a593Smuzhiyun				groups = "i2c2_b_2";
170*4882a593Smuzhiyun			};
171*4882a593Smuzhiyun			default_cfg1 {
172*4882a593Smuzhiyun				pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
173*4882a593Smuzhiyun				ste,config = <&in_nopull>;
174*4882a593Smuzhiyun			};
175*4882a593Smuzhiyun		};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun		i2c2_b_2_sleep: i2c2_b_2_sleep {
178*4882a593Smuzhiyun			sleep_cfg1 {
179*4882a593Smuzhiyun				pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
180*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
181*4882a593Smuzhiyun			};
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun	};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun	i2c3 {
186*4882a593Smuzhiyun		i2c3_c_2_default: i2c3_c_2_default {
187*4882a593Smuzhiyun			default_mux {
188*4882a593Smuzhiyun				function = "i2c3";
189*4882a593Smuzhiyun				groups = "i2c3_c_2";
190*4882a593Smuzhiyun			};
191*4882a593Smuzhiyun			default_cfg1 {
192*4882a593Smuzhiyun				pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
193*4882a593Smuzhiyun				ste,config = <&in_nopull>;
194*4882a593Smuzhiyun			};
195*4882a593Smuzhiyun		};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun		i2c3_c_2_sleep: i2c3_c_2_sleep {
198*4882a593Smuzhiyun			sleep_cfg1 {
199*4882a593Smuzhiyun				pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
200*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
201*4882a593Smuzhiyun			};
202*4882a593Smuzhiyun		};
203*4882a593Smuzhiyun	};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun	/*
206*4882a593Smuzhiyun	 * Activating I2C4 will conflict with UART1 about the same pins so do not
207*4882a593Smuzhiyun	 * enable I2C4 and UART1 at the same time.
208*4882a593Smuzhiyun	 */
209*4882a593Smuzhiyun	i2c4 {
210*4882a593Smuzhiyun		i2c4_b_1_default: i2c4_b_1_default {
211*4882a593Smuzhiyun			default_mux {
212*4882a593Smuzhiyun				function = "i2c4";
213*4882a593Smuzhiyun				groups = "i2c4_b_1";
214*4882a593Smuzhiyun			};
215*4882a593Smuzhiyun			default_cfg1 {
216*4882a593Smuzhiyun				pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
217*4882a593Smuzhiyun				ste,config = <&in_nopull>;
218*4882a593Smuzhiyun			};
219*4882a593Smuzhiyun		};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun		i2c4_b_1_sleep: i2c4_b_1_sleep {
222*4882a593Smuzhiyun			sleep_cfg1 {
223*4882a593Smuzhiyun				pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
224*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
225*4882a593Smuzhiyun			};
226*4882a593Smuzhiyun		};
227*4882a593Smuzhiyun	};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun	/* Settings for all MMC/SD/SDIO default and sleep states */
230*4882a593Smuzhiyun	sdi0 {
231*4882a593Smuzhiyun		/* This is the external SD card slot, 4 bits wide */
232*4882a593Smuzhiyun		mc0_a_1_default: mc0_a_1_default {
233*4882a593Smuzhiyun			default_mux {
234*4882a593Smuzhiyun				function = "mc0";
235*4882a593Smuzhiyun				groups = "mc0_a_1";
236*4882a593Smuzhiyun			};
237*4882a593Smuzhiyun			default_cfg1 {
238*4882a593Smuzhiyun				pins =
239*4882a593Smuzhiyun				"GPIO18_AC2", /* CMDDIR */
240*4882a593Smuzhiyun				"GPIO19_AC1", /* DAT0DIR */
241*4882a593Smuzhiyun				"GPIO20_AB4"; /* DAT2DIR */
242*4882a593Smuzhiyun				ste,config = <&out_hi>;
243*4882a593Smuzhiyun			};
244*4882a593Smuzhiyun			default_cfg2 {
245*4882a593Smuzhiyun				pins = "GPIO22_AA3"; /* FBCLK */
246*4882a593Smuzhiyun				ste,config = <&in_nopull>;
247*4882a593Smuzhiyun			};
248*4882a593Smuzhiyun			default_cfg3 {
249*4882a593Smuzhiyun				pins = "GPIO23_AA4"; /* CLK */
250*4882a593Smuzhiyun				ste,config = <&out_lo>;
251*4882a593Smuzhiyun			};
252*4882a593Smuzhiyun			default_cfg4 {
253*4882a593Smuzhiyun				pins =
254*4882a593Smuzhiyun				"GPIO24_AB2", /* CMD */
255*4882a593Smuzhiyun				"GPIO25_Y4", /* DAT0 */
256*4882a593Smuzhiyun				"GPIO26_Y2", /* DAT1 */
257*4882a593Smuzhiyun				"GPIO27_AA2", /* DAT2 */
258*4882a593Smuzhiyun				"GPIO28_AA1"; /* DAT3 */
259*4882a593Smuzhiyun				ste,config = <&in_pu>;
260*4882a593Smuzhiyun			};
261*4882a593Smuzhiyun		};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun		mc0_a_1_sleep: mc0_a_1_sleep {
264*4882a593Smuzhiyun			sleep_cfg1 {
265*4882a593Smuzhiyun				pins =
266*4882a593Smuzhiyun				"GPIO18_AC2", /* CMDDIR */
267*4882a593Smuzhiyun				"GPIO19_AC1", /* DAT0DIR */
268*4882a593Smuzhiyun				"GPIO20_AB4"; /* DAT2DIR */
269*4882a593Smuzhiyun				ste,config = <&slpm_out_hi_wkup_pdis>;
270*4882a593Smuzhiyun			};
271*4882a593Smuzhiyun			sleep_cfg2 {
272*4882a593Smuzhiyun				pins =
273*4882a593Smuzhiyun				"GPIO22_AA3", /* FBCLK */
274*4882a593Smuzhiyun				"GPIO24_AB2", /* CMD */
275*4882a593Smuzhiyun				"GPIO25_Y4", /* DAT0 */
276*4882a593Smuzhiyun				"GPIO26_Y2", /* DAT1 */
277*4882a593Smuzhiyun				"GPIO27_AA2", /* DAT2 */
278*4882a593Smuzhiyun				"GPIO28_AA1"; /* DAT3 */
279*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
280*4882a593Smuzhiyun			};
281*4882a593Smuzhiyun			sleep_cfg3 {
282*4882a593Smuzhiyun				pins = "GPIO23_AA4"; /* CLK */
283*4882a593Smuzhiyun				ste,config = <&slpm_out_lo_wkup_pdis>;
284*4882a593Smuzhiyun			};
285*4882a593Smuzhiyun		};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun		mc0_a_2_default: mc0_a_2_default {
288*4882a593Smuzhiyun			default_mux {
289*4882a593Smuzhiyun				function = "mc0";
290*4882a593Smuzhiyun				groups = "mc0_a_2";
291*4882a593Smuzhiyun			};
292*4882a593Smuzhiyun			default_cfg1 {
293*4882a593Smuzhiyun				pins = "GPIO22_AA3"; /* FBCLK */
294*4882a593Smuzhiyun				ste,config = <&in_nopull>;
295*4882a593Smuzhiyun			};
296*4882a593Smuzhiyun			default_cfg2 {
297*4882a593Smuzhiyun				pins = "GPIO23_AA4"; /* CLK */
298*4882a593Smuzhiyun				ste,config = <&out_lo>;
299*4882a593Smuzhiyun			};
300*4882a593Smuzhiyun			default_cfg3 {
301*4882a593Smuzhiyun				pins =
302*4882a593Smuzhiyun				"GPIO24_AB2", /* CMD */
303*4882a593Smuzhiyun				"GPIO25_Y4", /* DAT0 */
304*4882a593Smuzhiyun				"GPIO26_Y2", /* DAT1 */
305*4882a593Smuzhiyun				"GPIO27_AA2", /* DAT2 */
306*4882a593Smuzhiyun				"GPIO28_AA1"; /* DAT3 */
307*4882a593Smuzhiyun				ste,config = <&in_pu>;
308*4882a593Smuzhiyun			};
309*4882a593Smuzhiyun		};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun		mc0_a_2_sleep: mc0_a_2_sleep {
312*4882a593Smuzhiyun			sleep_cfg1 {
313*4882a593Smuzhiyun				pins =
314*4882a593Smuzhiyun				"GPIO22_AA3", /* FBCLK */
315*4882a593Smuzhiyun				"GPIO24_AB2", /* CMD */
316*4882a593Smuzhiyun				"GPIO25_Y4", /* DAT0 */
317*4882a593Smuzhiyun				"GPIO26_Y2", /* DAT1 */
318*4882a593Smuzhiyun				"GPIO27_AA2", /* DAT2 */
319*4882a593Smuzhiyun				"GPIO28_AA1"; /* DAT3 */
320*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
321*4882a593Smuzhiyun			};
322*4882a593Smuzhiyun			sleep_cfg2 {
323*4882a593Smuzhiyun				pins = "GPIO23_AA4"; /* CLK */
324*4882a593Smuzhiyun				ste,config = <&slpm_out_lo_wkup_pdis>;
325*4882a593Smuzhiyun			};
326*4882a593Smuzhiyun		};
327*4882a593Smuzhiyun	};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun	sdi1 {
330*4882a593Smuzhiyun		/* This is the WLAN SDIO 4 bits wide */
331*4882a593Smuzhiyun		mc1_a_1_default: mc1_a_1_default {
332*4882a593Smuzhiyun			default_mux {
333*4882a593Smuzhiyun				function = "mc1";
334*4882a593Smuzhiyun				groups = "mc1_a_1";
335*4882a593Smuzhiyun			};
336*4882a593Smuzhiyun			default_cfg1 {
337*4882a593Smuzhiyun				pins = "GPIO208_AH16"; /* CLK */
338*4882a593Smuzhiyun				ste,config = <&out_lo>;
339*4882a593Smuzhiyun			};
340*4882a593Smuzhiyun			default_cfg2 {
341*4882a593Smuzhiyun				pins = "GPIO209_AG15"; /* FBCLK */
342*4882a593Smuzhiyun				ste,config = <&in_nopull>;
343*4882a593Smuzhiyun			};
344*4882a593Smuzhiyun			default_cfg3 {
345*4882a593Smuzhiyun				pins =
346*4882a593Smuzhiyun				"GPIO210_AJ15", /* CMD */
347*4882a593Smuzhiyun				"GPIO211_AG14", /* DAT0 */
348*4882a593Smuzhiyun				"GPIO212_AF13", /* DAT1 */
349*4882a593Smuzhiyun				"GPIO213_AG13", /* DAT2 */
350*4882a593Smuzhiyun				"GPIO214_AH15"; /* DAT3 */
351*4882a593Smuzhiyun				ste,config = <&in_pu>;
352*4882a593Smuzhiyun			};
353*4882a593Smuzhiyun		};
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun		mc1_a_1_sleep: mc1_a_1_sleep {
356*4882a593Smuzhiyun			sleep_cfg1 {
357*4882a593Smuzhiyun				pins = "GPIO208_AH16"; /* CLK */
358*4882a593Smuzhiyun				ste,config = <&slpm_out_lo_wkup_pdis>;
359*4882a593Smuzhiyun			};
360*4882a593Smuzhiyun			sleep_cfg2 {
361*4882a593Smuzhiyun				pins =
362*4882a593Smuzhiyun				"GPIO209_AG15", /* FBCLK */
363*4882a593Smuzhiyun				"GPIO210_AJ15", /* CMD */
364*4882a593Smuzhiyun				"GPIO211_AG14", /* DAT0 */
365*4882a593Smuzhiyun				"GPIO212_AF13", /* DAT1 */
366*4882a593Smuzhiyun				"GPIO213_AG13", /* DAT2 */
367*4882a593Smuzhiyun				"GPIO214_AH15"; /* DAT3 */
368*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
369*4882a593Smuzhiyun			};
370*4882a593Smuzhiyun		};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun		mc1_a_2_default: mc1_a_2_default {
373*4882a593Smuzhiyun			default_mux {
374*4882a593Smuzhiyun				function = "mc1";
375*4882a593Smuzhiyun				groups = "mc1_a_2";
376*4882a593Smuzhiyun			};
377*4882a593Smuzhiyun			default_cfg1 {
378*4882a593Smuzhiyun				pins = "GPIO208_AH16"; /* CLK */
379*4882a593Smuzhiyun				ste,config = <&out_lo>;
380*4882a593Smuzhiyun			};
381*4882a593Smuzhiyun			default_cfg2 {
382*4882a593Smuzhiyun				pins =
383*4882a593Smuzhiyun				"GPIO210_AJ15", /* CMD */
384*4882a593Smuzhiyun				"GPIO211_AG14", /* DAT0 */
385*4882a593Smuzhiyun				"GPIO212_AF13", /* DAT1 */
386*4882a593Smuzhiyun				"GPIO213_AG13", /* DAT2 */
387*4882a593Smuzhiyun				"GPIO214_AH15"; /* DAT3 */
388*4882a593Smuzhiyun				ste,config = <&in_pu>;
389*4882a593Smuzhiyun			};
390*4882a593Smuzhiyun		};
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun		mc1_a_2_sleep: mc1_a_2_sleep {
393*4882a593Smuzhiyun			sleep_cfg1 {
394*4882a593Smuzhiyun				pins = "GPIO208_AH16"; /* CLK */
395*4882a593Smuzhiyun				ste,config = <&slpm_out_lo_wkup_pdis>;
396*4882a593Smuzhiyun			};
397*4882a593Smuzhiyun			sleep_cfg2 {
398*4882a593Smuzhiyun				pins =
399*4882a593Smuzhiyun				"GPIO210_AJ15", /* CMD */
400*4882a593Smuzhiyun				"GPIO211_AG14", /* DAT0 */
401*4882a593Smuzhiyun				"GPIO212_AF13", /* DAT1 */
402*4882a593Smuzhiyun				"GPIO213_AG13", /* DAT2 */
403*4882a593Smuzhiyun				"GPIO214_AH15"; /* DAT3 */
404*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
405*4882a593Smuzhiyun			};
406*4882a593Smuzhiyun		};
407*4882a593Smuzhiyun	};
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun	sdi2 {
410*4882a593Smuzhiyun		/* This is the eMMC 8 bits wide, usually PoP eMMC */
411*4882a593Smuzhiyun		mc2_a_1_default: mc2_a_1_default {
412*4882a593Smuzhiyun			default_mux {
413*4882a593Smuzhiyun				function = "mc2";
414*4882a593Smuzhiyun				groups = "mc2_a_1";
415*4882a593Smuzhiyun			};
416*4882a593Smuzhiyun			default_cfg1 {
417*4882a593Smuzhiyun				pins = "GPIO128_A5"; /* CLK */
418*4882a593Smuzhiyun				ste,config = <&out_lo>;
419*4882a593Smuzhiyun			};
420*4882a593Smuzhiyun			default_cfg2 {
421*4882a593Smuzhiyun				pins = "GPIO130_C8"; /* FBCLK */
422*4882a593Smuzhiyun				ste,config = <&in_nopull>;
423*4882a593Smuzhiyun			};
424*4882a593Smuzhiyun			default_cfg3 {
425*4882a593Smuzhiyun				pins =
426*4882a593Smuzhiyun				"GPIO129_B4", /* CMD */
427*4882a593Smuzhiyun				"GPIO131_A12", /* DAT0 */
428*4882a593Smuzhiyun				"GPIO132_C10", /* DAT1 */
429*4882a593Smuzhiyun				"GPIO133_B10", /* DAT2 */
430*4882a593Smuzhiyun				"GPIO134_B9", /* DAT3 */
431*4882a593Smuzhiyun				"GPIO135_A9", /* DAT4 */
432*4882a593Smuzhiyun				"GPIO136_C7", /* DAT5 */
433*4882a593Smuzhiyun				"GPIO137_A7", /* DAT6 */
434*4882a593Smuzhiyun				"GPIO138_C5"; /* DAT7 */
435*4882a593Smuzhiyun				ste,config = <&in_pu>;
436*4882a593Smuzhiyun			};
437*4882a593Smuzhiyun		};
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun		mc2_a_1_sleep: mc2_a_1_sleep {
440*4882a593Smuzhiyun			sleep_cfg1 {
441*4882a593Smuzhiyun				pins = "GPIO128_A5"; /* CLK */
442*4882a593Smuzhiyun				ste,config = <&out_lo_wkup_pdis>;
443*4882a593Smuzhiyun			};
444*4882a593Smuzhiyun			sleep_cfg2 {
445*4882a593Smuzhiyun				pins =
446*4882a593Smuzhiyun				"GPIO130_C8", /* FBCLK */
447*4882a593Smuzhiyun				"GPIO129_B4"; /* CMD */
448*4882a593Smuzhiyun				ste,config = <&in_wkup_pdis_en>;
449*4882a593Smuzhiyun			};
450*4882a593Smuzhiyun			sleep_cfg3 {
451*4882a593Smuzhiyun				pins =
452*4882a593Smuzhiyun				"GPIO131_A12", /* DAT0 */
453*4882a593Smuzhiyun				"GPIO132_C10", /* DAT1 */
454*4882a593Smuzhiyun				"GPIO133_B10", /* DAT2 */
455*4882a593Smuzhiyun				"GPIO134_B9", /* DAT3 */
456*4882a593Smuzhiyun				"GPIO135_A9", /* DAT4 */
457*4882a593Smuzhiyun				"GPIO136_C7", /* DAT5 */
458*4882a593Smuzhiyun				"GPIO137_A7", /* DAT6 */
459*4882a593Smuzhiyun				"GPIO138_C5"; /* DAT7 */
460*4882a593Smuzhiyun				ste,config = <&in_wkup_pdis>;
461*4882a593Smuzhiyun			};
462*4882a593Smuzhiyun		};
463*4882a593Smuzhiyun	};
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun	sdi4 {
466*4882a593Smuzhiyun		/* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
467*4882a593Smuzhiyun		mc4_a_1_default: mc4_a_1_default {
468*4882a593Smuzhiyun			default_mux {
469*4882a593Smuzhiyun				function = "mc4";
470*4882a593Smuzhiyun				groups = "mc4_a_1";
471*4882a593Smuzhiyun			};
472*4882a593Smuzhiyun			default_cfg1 {
473*4882a593Smuzhiyun				pins = "GPIO203_AE23"; /* CLK */
474*4882a593Smuzhiyun				ste,config = <&out_lo>;
475*4882a593Smuzhiyun			};
476*4882a593Smuzhiyun			default_cfg2 {
477*4882a593Smuzhiyun				pins = "GPIO202_AF25"; /* FBCLK */
478*4882a593Smuzhiyun				ste,config = <&in_nopull>;
479*4882a593Smuzhiyun			};
480*4882a593Smuzhiyun			default_cfg3 {
481*4882a593Smuzhiyun				pins =
482*4882a593Smuzhiyun				"GPIO201_AF24", /* CMD */
483*4882a593Smuzhiyun				"GPIO200_AH26", /* DAT0 */
484*4882a593Smuzhiyun				"GPIO199_AH23", /* DAT1 */
485*4882a593Smuzhiyun				"GPIO198_AG25", /* DAT2 */
486*4882a593Smuzhiyun				"GPIO197_AH24", /* DAT3 */
487*4882a593Smuzhiyun				"GPIO207_AJ23", /* DAT4 */
488*4882a593Smuzhiyun				"GPIO206_AG24", /* DAT5 */
489*4882a593Smuzhiyun				"GPIO205_AG23", /* DAT6 */
490*4882a593Smuzhiyun				"GPIO204_AF23"; /* DAT7 */
491*4882a593Smuzhiyun				ste,config = <&in_pu>;
492*4882a593Smuzhiyun			};
493*4882a593Smuzhiyun		};
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun		mc4_a_1_sleep: mc4_a_1_sleep {
496*4882a593Smuzhiyun			sleep_cfg1 {
497*4882a593Smuzhiyun				pins = "GPIO203_AE23"; /* CLK */
498*4882a593Smuzhiyun				ste,config = <&out_lo_wkup_pdis>;
499*4882a593Smuzhiyun			};
500*4882a593Smuzhiyun			sleep_cfg2 {
501*4882a593Smuzhiyun				pins =
502*4882a593Smuzhiyun				"GPIO202_AF25", /* FBCLK */
503*4882a593Smuzhiyun				"GPIO201_AF24", /* CMD */
504*4882a593Smuzhiyun				"GPIO200_AH26", /* DAT0 */
505*4882a593Smuzhiyun				"GPIO199_AH23", /* DAT1 */
506*4882a593Smuzhiyun				"GPIO198_AG25", /* DAT2 */
507*4882a593Smuzhiyun				"GPIO197_AH24", /* DAT3 */
508*4882a593Smuzhiyun				"GPIO207_AJ23", /* DAT4 */
509*4882a593Smuzhiyun				"GPIO206_AG24", /* DAT5 */
510*4882a593Smuzhiyun				"GPIO205_AG23", /* DAT6 */
511*4882a593Smuzhiyun				"GPIO204_AF23"; /* DAT7 */
512*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis>;
513*4882a593Smuzhiyun			};
514*4882a593Smuzhiyun		};
515*4882a593Smuzhiyun	};
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun	/*
518*4882a593Smuzhiyun	 * Multi-rate serial ports (MSPs) - MSP3 output is internal and
519*4882a593Smuzhiyun	 * cannot be muxed onto any pins.
520*4882a593Smuzhiyun	 */
521*4882a593Smuzhiyun	msp0 {
522*4882a593Smuzhiyun		msp0txrxtfstck_a_1_default: msp0txrxtfstck_a_1_default {
523*4882a593Smuzhiyun			default_msp0_mux {
524*4882a593Smuzhiyun				function = "msp0";
525*4882a593Smuzhiyun				groups = "msp0txrx_a_1", "msp0tfstck_a_1";
526*4882a593Smuzhiyun			};
527*4882a593Smuzhiyun			default_msp0_cfg {
528*4882a593Smuzhiyun				pins =
529*4882a593Smuzhiyun				"GPIO12_AC4", /* TXD */
530*4882a593Smuzhiyun				"GPIO15_AC3", /* RXD */
531*4882a593Smuzhiyun				"GPIO13_AF3", /* TFS */
532*4882a593Smuzhiyun				"GPIO14_AE3"; /* TCK */
533*4882a593Smuzhiyun				ste,config = <&in_nopull>;
534*4882a593Smuzhiyun			};
535*4882a593Smuzhiyun		};
536*4882a593Smuzhiyun	};
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun	msp1 {
539*4882a593Smuzhiyun		msp1txrx_a_1_default: msp1txrx_a_1_default {
540*4882a593Smuzhiyun			default_mux {
541*4882a593Smuzhiyun				function = "msp1";
542*4882a593Smuzhiyun				groups = "msp1txrx_a_1", "msp1_a_1";
543*4882a593Smuzhiyun			};
544*4882a593Smuzhiyun			default_cfg1 {
545*4882a593Smuzhiyun				pins = "GPIO33_AF2";
546*4882a593Smuzhiyun				ste,config = <&out_lo>;
547*4882a593Smuzhiyun			};
548*4882a593Smuzhiyun			default_cfg2 {
549*4882a593Smuzhiyun				pins =
550*4882a593Smuzhiyun				"GPIO34_AE1",
551*4882a593Smuzhiyun				"GPIO35_AE2",
552*4882a593Smuzhiyun				"GPIO36_AG2";
553*4882a593Smuzhiyun				ste,config = <&in_nopull>;
554*4882a593Smuzhiyun			};
555*4882a593Smuzhiyun		};
556*4882a593Smuzhiyun	};
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun	msp2 {
559*4882a593Smuzhiyun		msp2_a_1_default: msp2_a_1_default {
560*4882a593Smuzhiyun			/* MSP2 usually used for HDMI audio */
561*4882a593Smuzhiyun			default_mux {
562*4882a593Smuzhiyun				function = "msp2";
563*4882a593Smuzhiyun				groups = "msp2_a_1";
564*4882a593Smuzhiyun			};
565*4882a593Smuzhiyun			default_cfg1 {
566*4882a593Smuzhiyun				pins =
567*4882a593Smuzhiyun				"GPIO193_AH27", /* TXD */
568*4882a593Smuzhiyun				"GPIO194_AF27", /* TCK */
569*4882a593Smuzhiyun				"GPIO195_AG28"; /* TFS */
570*4882a593Smuzhiyun				ste,config = <&in_pd>;
571*4882a593Smuzhiyun			};
572*4882a593Smuzhiyun			default_cfg2 {
573*4882a593Smuzhiyun				pins = "GPIO196_AG26"; /* RXD */
574*4882a593Smuzhiyun				ste,config = <&out_lo>;
575*4882a593Smuzhiyun			};
576*4882a593Smuzhiyun		};
577*4882a593Smuzhiyun	};
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun	musb {
580*4882a593Smuzhiyun		usb_a_1_default: usb_a_1_default {
581*4882a593Smuzhiyun			default_mux {
582*4882a593Smuzhiyun				function = "usb";
583*4882a593Smuzhiyun				groups = "usb_a_1";
584*4882a593Smuzhiyun			};
585*4882a593Smuzhiyun			default_cfg1 {
586*4882a593Smuzhiyun				pins =
587*4882a593Smuzhiyun				"GPIO256_AF28", /* NXT */
588*4882a593Smuzhiyun				"GPIO258_AD29", /* XCLK */
589*4882a593Smuzhiyun				"GPIO259_AC29", /* DIR */
590*4882a593Smuzhiyun				"GPIO260_AD28", /* DAT7 */
591*4882a593Smuzhiyun				"GPIO261_AD26", /* DAT6 */
592*4882a593Smuzhiyun				"GPIO262_AE26", /* DAT5 */
593*4882a593Smuzhiyun				"GPIO263_AG29", /* DAT4 */
594*4882a593Smuzhiyun				"GPIO264_AE27", /* DAT3 */
595*4882a593Smuzhiyun				"GPIO265_AD27", /* DAT2 */
596*4882a593Smuzhiyun				"GPIO266_AC28", /* DAT1 */
597*4882a593Smuzhiyun				"GPIO267_AC27"; /* DAT0 */
598*4882a593Smuzhiyun				ste,config = <&in_nopull>;
599*4882a593Smuzhiyun			};
600*4882a593Smuzhiyun			default_cfg2 {
601*4882a593Smuzhiyun				pins = "GPIO257_AE29"; /* STP */
602*4882a593Smuzhiyun				ste,config = <&out_hi>;
603*4882a593Smuzhiyun			};
604*4882a593Smuzhiyun		};
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun		usb_a_1_sleep: usb_a_1_sleep {
607*4882a593Smuzhiyun			sleep_cfg1 {
608*4882a593Smuzhiyun				pins =
609*4882a593Smuzhiyun				"GPIO256_AF28", /* NXT */
610*4882a593Smuzhiyun				"GPIO258_AD29", /* XCLK */
611*4882a593Smuzhiyun				"GPIO259_AC29"; /* DIR */
612*4882a593Smuzhiyun				ste,config = <&slpm_wkup_pdis_en>;
613*4882a593Smuzhiyun			};
614*4882a593Smuzhiyun			sleep_cfg2 {
615*4882a593Smuzhiyun				pins = "GPIO257_AE29"; /* STP */
616*4882a593Smuzhiyun				ste,config = <&slpm_out_hi_wkup_pdis>;
617*4882a593Smuzhiyun			};
618*4882a593Smuzhiyun			sleep_cfg3 {
619*4882a593Smuzhiyun				pins =
620*4882a593Smuzhiyun				"GPIO260_AD28", /* DAT7 */
621*4882a593Smuzhiyun				"GPIO261_AD26", /* DAT6 */
622*4882a593Smuzhiyun				"GPIO262_AE26", /* DAT5 */
623*4882a593Smuzhiyun				"GPIO263_AG29", /* DAT4 */
624*4882a593Smuzhiyun				"GPIO264_AE27", /* DAT3 */
625*4882a593Smuzhiyun				"GPIO265_AD27", /* DAT2 */
626*4882a593Smuzhiyun				"GPIO266_AC28", /* DAT1 */
627*4882a593Smuzhiyun				"GPIO267_AC27"; /* DAT0 */
628*4882a593Smuzhiyun				ste,config = <&slpm_in_wkup_pdis_en>;
629*4882a593Smuzhiyun			};
630*4882a593Smuzhiyun		};
631*4882a593Smuzhiyun	};
632*4882a593Smuzhiyun};
633