Lines Matching +full:clk +full:- +full:pins
5 * This file is dual-licensed: you can use it either under the terms
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun4i-a10-pll2.h>
49 #include <dt-bindings/dma/sun4i-a10.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&intc>;
60 #address-cells = <1>;
61 #size-cells = <1>;
65 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer";
67 allwinner,pipeline = "de_be0-lcd0-hdmi";
75 compatible = "allwinner,simple-framebuffer",
76 "simple-framebuffer";
77 allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
86 compatible = "allwinner,simple-framebuffer",
87 "simple-framebuffer";
88 allwinner,pipeline = "de_fe0-de_be0-lcd0";
96 compatible = "allwinner,simple-framebuffer",
97 "simple-framebuffer";
98 allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
109 #address-cells = <1>;
110 #size-cells = <0>;
113 compatible = "arm,cortex-a8";
116 clock-latency = <244144>; /* 8 32k periods */
117 operating-points = <
124 #cooling-cells = <2>;
125 cooling-min-level = <0>;
126 cooling-max-level = <3>;
130 thermal-zones {
133 polling-delay-passive = <250>;
134 polling-delay = <1000>;
135 thermal-sensors = <&rtp>;
137 cooling-maps {
140 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
167 #address-cells = <1>;
168 #size-cells = <1>;
178 #clock-cells = <0>;
179 compatible = "fixed-clock";
180 clock-frequency = <0>;
183 osc24M: clk@01c20050 {
184 #clock-cells = <0>;
185 compatible = "allwinner,sun4i-a10-osc-clk";
187 clock-frequency = <24000000>;
188 clock-output-names = "osc24M";
192 compatible = "fixed-factor-clock";
193 #clock-cells = <0>;
194 clock-div = <8>;
195 clock-mult = <1>;
197 clock-output-names = "osc3M";
200 osc32k: clk@0 {
201 #clock-cells = <0>;
202 compatible = "fixed-clock";
203 clock-frequency = <32768>;
204 clock-output-names = "osc32k";
207 pll1: clk@01c20000 {
208 #clock-cells = <0>;
209 compatible = "allwinner,sun4i-a10-pll1-clk";
212 clock-output-names = "pll1";
215 pll2: clk@01c20008 {
216 #clock-cells = <1>;
217 compatible = "allwinner,sun4i-a10-pll2-clk";
220 clock-output-names = "pll2-1x", "pll2-2x",
221 "pll2-4x", "pll2-8x";
224 pll3: clk@01c20010 {
225 #clock-cells = <0>;
226 compatible = "allwinner,sun4i-a10-pll3-clk";
229 clock-output-names = "pll3";
233 compatible = "fixed-factor-clock";
234 #clock-cells = <0>;
235 clock-div = <1>;
236 clock-mult = <2>;
238 clock-output-names = "pll3-2x";
241 pll4: clk@01c20018 {
242 #clock-cells = <0>;
243 compatible = "allwinner,sun4i-a10-pll1-clk";
246 clock-output-names = "pll4";
249 pll5: clk@01c20020 {
250 #clock-cells = <1>;
251 compatible = "allwinner,sun4i-a10-pll5-clk";
254 clock-output-names = "pll5_ddr", "pll5_other";
257 pll6: clk@01c20028 {
258 #clock-cells = <1>;
259 compatible = "allwinner,sun4i-a10-pll6-clk";
262 clock-output-names = "pll6_sata", "pll6_other", "pll6";
265 pll7: clk@01c20030 {
266 #clock-cells = <0>;
267 compatible = "allwinner,sun4i-a10-pll3-clk";
270 clock-output-names = "pll7";
274 compatible = "fixed-factor-clock";
275 #clock-cells = <0>;
276 clock-div = <1>;
277 clock-mult = <2>;
279 clock-output-names = "pll7-2x";
284 #clock-cells = <0>;
285 compatible = "allwinner,sun4i-a10-cpu-clk";
288 clock-output-names = "cpu";
292 #clock-cells = <0>;
293 compatible = "allwinner,sun4i-a10-axi-clk";
296 clock-output-names = "axi";
299 axi_gates: clk@01c2005c {
300 #clock-cells = <1>;
301 compatible = "allwinner,sun4i-a10-axi-gates-clk";
304 clock-indices = <0>;
305 clock-output-names = "axi_dram";
309 #clock-cells = <0>;
310 compatible = "allwinner,sun4i-a10-ahb-clk";
313 clock-output-names = "ahb";
316 ahb_gates: clk@01c20060 {
317 #clock-cells = <1>;
318 compatible = "allwinner,sun4i-a10-ahb-gates-clk";
321 clock-indices = <0>, <1>,
336 clock-output-names = "ahb_usb0", "ahb_ehci0",
354 #clock-cells = <0>;
355 compatible = "allwinner,sun4i-a10-apb0-clk";
358 clock-output-names = "apb0";
361 apb0_gates: clk@01c20068 {
362 #clock-cells = <1>;
363 compatible = "allwinner,sun4i-a10-apb0-gates-clk";
366 clock-indices = <0>, <1>,
370 clock-output-names = "apb0_codec", "apb0_spdif",
376 apb1: clk@01c20058 {
377 #clock-cells = <0>;
378 compatible = "allwinner,sun4i-a10-apb1-clk";
381 clock-output-names = "apb1";
384 apb1_gates: clk@01c2006c {
385 #clock-cells = <1>;
386 compatible = "allwinner,sun4i-a10-apb1-gates-clk";
389 clock-indices = <0>, <1>,
397 clock-output-names = "apb1_i2c0", "apb1_i2c1",
407 nand_clk: clk@01c20080 {
408 #clock-cells = <0>;
409 compatible = "allwinner,sun4i-a10-mod0-clk";
412 clock-output-names = "nand";
415 ms_clk: clk@01c20084 {
416 #clock-cells = <0>;
417 compatible = "allwinner,sun4i-a10-mod0-clk";
420 clock-output-names = "ms";
423 mmc0_clk: clk@01c20088 {
424 #clock-cells = <1>;
425 compatible = "allwinner,sun4i-a10-mmc-clk";
428 clock-output-names = "mmc0",
433 mmc1_clk: clk@01c2008c {
434 #clock-cells = <1>;
435 compatible = "allwinner,sun4i-a10-mmc-clk";
438 clock-output-names = "mmc1",
443 mmc2_clk: clk@01c20090 {
444 #clock-cells = <1>;
445 compatible = "allwinner,sun4i-a10-mmc-clk";
448 clock-output-names = "mmc2",
453 mmc3_clk: clk@01c20094 {
454 #clock-cells = <1>;
455 compatible = "allwinner,sun4i-a10-mmc-clk";
458 clock-output-names = "mmc3",
463 ts_clk: clk@01c20098 {
464 #clock-cells = <0>;
465 compatible = "allwinner,sun4i-a10-mod0-clk";
468 clock-output-names = "ts";
471 ss_clk: clk@01c2009c {
472 #clock-cells = <0>;
473 compatible = "allwinner,sun4i-a10-mod0-clk";
476 clock-output-names = "ss";
479 spi0_clk: clk@01c200a0 {
480 #clock-cells = <0>;
481 compatible = "allwinner,sun4i-a10-mod0-clk";
484 clock-output-names = "spi0";
487 spi1_clk: clk@01c200a4 {
488 #clock-cells = <0>;
489 compatible = "allwinner,sun4i-a10-mod0-clk";
492 clock-output-names = "spi1";
495 spi2_clk: clk@01c200a8 {
496 #clock-cells = <0>;
497 compatible = "allwinner,sun4i-a10-mod0-clk";
500 clock-output-names = "spi2";
503 pata_clk: clk@01c200ac {
504 #clock-cells = <0>;
505 compatible = "allwinner,sun4i-a10-mod0-clk";
508 clock-output-names = "pata";
511 ir0_clk: clk@01c200b0 {
512 #clock-cells = <0>;
513 compatible = "allwinner,sun4i-a10-mod0-clk";
516 clock-output-names = "ir0";
519 ir1_clk: clk@01c200b4 {
520 #clock-cells = <0>;
521 compatible = "allwinner,sun4i-a10-mod0-clk";
524 clock-output-names = "ir1";
527 spdif_clk: clk@01c200c0 {
528 #clock-cells = <0>;
529 compatible = "allwinner,sun4i-a10-mod1-clk";
535 clock-output-names = "spdif";
538 usb_clk: clk@01c200cc {
539 #clock-cells = <1>;
540 #reset-cells = <1>;
541 compatible = "allwinner,sun4i-a10-usb-clk";
544 clock-output-names = "usb_ohci0", "usb_ohci1",
548 spi3_clk: clk@01c200d4 {
549 #clock-cells = <0>;
550 compatible = "allwinner,sun4i-a10-mod0-clk";
553 clock-output-names = "spi3";
556 dram_gates: clk@01c20100 {
557 #clock-cells = <1>;
558 compatible = "allwinner,sun4i-a10-dram-gates-clk";
561 clock-indices = <0>,
570 clock-output-names = "dram_ve",
581 de_be0_clk: clk@01c20104 {
582 #clock-cells = <0>;
583 #reset-cells = <0>;
584 compatible = "allwinner,sun4i-a10-display-clk";
587 clock-output-names = "de-be0";
590 de_be1_clk: clk@01c20108 {
591 #clock-cells = <0>;
592 #reset-cells = <0>;
593 compatible = "allwinner,sun4i-a10-display-clk";
596 clock-output-names = "de-be1";
599 de_fe0_clk: clk@01c2010c {
600 #clock-cells = <0>;
601 #reset-cells = <0>;
602 compatible = "allwinner,sun4i-a10-display-clk";
605 clock-output-names = "de-fe0";
608 de_fe1_clk: clk@01c20110 {
609 #clock-cells = <0>;
610 #reset-cells = <0>;
611 compatible = "allwinner,sun4i-a10-display-clk";
614 clock-output-names = "de-fe1";
618 tcon0_ch0_clk: clk@01c20118 {
619 #clock-cells = <0>;
620 #reset-cells = <1>;
621 compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
624 clock-output-names = "tcon0-ch0-sclk";
628 tcon1_ch0_clk: clk@01c2011c {
629 #clock-cells = <0>;
630 #reset-cells = <1>;
631 compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
634 clock-output-names = "tcon1-ch0-sclk";
638 tcon0_ch1_clk: clk@01c2012c {
639 #clock-cells = <0>;
640 compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
643 clock-output-names = "tcon0-ch1-sclk";
647 tcon1_ch1_clk: clk@01c20130 {
648 #clock-cells = <0>;
649 compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
652 clock-output-names = "tcon1-ch1-sclk";
656 ve_clk: clk@01c2013c {
657 #clock-cells = <0>;
658 #reset-cells = <0>;
659 compatible = "allwinner,sun4i-a10-ve-clk";
662 clock-output-names = "ve";
665 codec_clk: clk@01c20140 {
666 #clock-cells = <0>;
667 compatible = "allwinner,sun4i-a10-codec-clk";
670 clock-output-names = "codec";
675 compatible = "simple-bus";
676 #address-cells = <1>;
677 #size-cells = <1>;
680 sram-controller@01c00000 {
681 compatible = "allwinner,sun4i-a10-sram-controller";
683 #address-cells = <1>;
684 #size-cells = <1>;
688 compatible = "mmio-sram";
690 #address-cells = <1>;
691 #size-cells = <1>;
694 emac_sram: sram-section@8000 {
695 compatible = "allwinner,sun4i-a10-sram-a3-a4";
702 compatible = "mmio-sram";
704 #address-cells = <1>;
705 #size-cells = <1>;
708 otg_sram: sram-section@0000 {
709 compatible = "allwinner,sun4i-a10-sram-d";
716 dma: dma-controller@01c02000 {
717 compatible = "allwinner,sun4i-a10-dma";
721 #dma-cells = <2>;
725 compatible = "allwinner,sun4i-a10-nand";
729 clock-names = "ahb", "mod";
731 dma-names = "rxtx";
733 #address-cells = <1>;
734 #size-cells = <0>;
738 compatible = "allwinner,sun4i-a10-spi";
742 clock-names = "ahb", "mod";
745 dma-names = "rx", "tx";
747 #address-cells = <1>;
748 #size-cells = <0>;
752 compatible = "allwinner,sun4i-a10-spi";
756 clock-names = "ahb", "mod";
759 dma-names = "rx", "tx";
761 #address-cells = <1>;
762 #size-cells = <0>;
766 compatible = "allwinner,sun4i-a10-emac";
775 compatible = "allwinner,sun4i-a10-mdio";
778 #address-cells = <1>;
779 #size-cells = <0>;
783 compatible = "allwinner,sun4i-a10-mmc";
789 clock-names = "ahb",
795 #address-cells = <1>;
796 #size-cells = <0>;
800 compatible = "allwinner,sun4i-a10-mmc";
806 clock-names = "ahb",
812 #address-cells = <1>;
813 #size-cells = <0>;
817 compatible = "allwinner,sun4i-a10-mmc";
823 clock-names = "ahb",
829 #address-cells = <1>;
830 #size-cells = <0>;
834 compatible = "allwinner,sun4i-a10-mmc";
840 clock-names = "ahb",
846 #address-cells = <1>;
847 #size-cells = <0>;
851 compatible = "allwinner,sun4i-a10-musb";
855 interrupt-names = "mc";
857 phy-names = "usb";
864 #phy-cells = <1>;
865 compatible = "allwinner,sun4i-a10-usb-phy";
867 reg-names = "phy_ctrl", "pmu1", "pmu2";
869 clock-names = "usb_phy";
871 reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
876 compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
881 phy-names = "usb";
886 compatible = "allwinner,sun4i-a10-ohci", "generic-ohci";
891 phy-names = "usb";
895 crypto: crypto-engine@01c15000 {
896 compatible = "allwinner,sun4i-a10-crypto";
900 clock-names = "ahb", "mod";
904 compatible = "allwinner,sun4i-a10-spi";
908 clock-names = "ahb", "mod";
911 dma-names = "rx", "tx";
913 #address-cells = <1>;
914 #size-cells = <0>;
918 compatible = "allwinner,sun4i-a10-ahci";
926 compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
931 phy-names = "usb";
936 compatible = "allwinner,sun4i-a10-ohci", "generic-ohci";
941 phy-names = "usb";
946 compatible = "allwinner,sun4i-a10-spi";
950 clock-names = "ahb", "mod";
953 dma-names = "rx", "tx";
955 #address-cells = <1>;
956 #size-cells = <0>;
959 intc: interrupt-controller@01c20400 {
960 compatible = "allwinner,sun4i-a10-ic";
962 interrupt-controller;
963 #interrupt-cells = <1>;
967 compatible = "allwinner,sun4i-a10-pinctrl";
971 gpio-controller;
972 interrupt-controller;
973 #interrupt-cells = <3>;
974 #gpio-cells = <3>;
977 allwinner,pins = "PA0", "PA1", "PA2",
988 allwinner,pins = "PB0", "PB1";
995 allwinner,pins = "PB18", "PB19";
1002 allwinner,pins = "PB20", "PB21";
1009 allwinner,pins = "PB4";
1016 allwinner,pins = "PB3";
1023 allwinner,pins = "PB23";
1030 allwinner,pins = "PB22";
1037 allwinner,pins = "PF0", "PF1", "PF2",
1045 allwinner,pins = "PH1";
1052 allwinner,pins = "PI20", "PI21";
1059 allwinner,pins = "PH12", "PH13";
1066 allwinner,pins = "PB2";
1073 allwinner,pins = "PI3";
1080 allwinner,pins = "PB13";
1087 allwinner,pins = "PI11", "PI12", "PI13";
1094 allwinner,pins = "PI10";
1101 allwinner,pins = "PI17", "PI18", "PI19";
1108 allwinner,pins = "PI16";
1115 allwinner,pins = "PC20", "PC21", "PC22";
1122 allwinner,pins = "PB15", "PB16", "PB17";
1129 allwinner,pins = "PC19";
1136 allwinner,pins = "PB14";
1143 allwinner,pins = "PB22", "PB23";
1150 allwinner,pins = "PF2", "PF4";
1157 allwinner,pins = "PA10", "PA11";
1165 compatible = "allwinner,sun4i-a10-timer";
1172 compatible = "allwinner,sun4i-a10-wdt";
1177 compatible = "allwinner,sun4i-a10-rtc";
1183 compatible = "allwinner,sun4i-a10-pwm";
1186 #pwm-cells = <3>;
1191 #sound-dai-cells = <0>;
1192 compatible = "allwinner,sun4i-a10-spdif";
1196 clock-names = "apb", "spdif";
1199 dma-names = "rx", "tx";
1204 compatible = "allwinner,sun4i-a10-ir";
1206 clock-names = "apb", "ir";
1213 compatible = "allwinner,sun4i-a10-ir";
1215 clock-names = "apb", "ir";
1222 compatible = "allwinner,sun4i-a10-lradc-keys";
1229 #sound-dai-cells = <0>;
1230 compatible = "allwinner,sun4i-a10-codec";
1234 clock-names = "apb", "codec";
1237 dma-names = "rx", "tx";
1242 compatible = "allwinner,sun4i-a10-sid";
1247 compatible = "allwinner,sun4i-a10-ts";
1250 #thermal-sensor-cells = <0>;
1254 compatible = "snps,dw-apb-uart";
1257 reg-shift = <2>;
1258 reg-io-width = <4>;
1264 compatible = "snps,dw-apb-uart";
1267 reg-shift = <2>;
1268 reg-io-width = <4>;
1274 compatible = "snps,dw-apb-uart";
1277 reg-shift = <2>;
1278 reg-io-width = <4>;
1284 compatible = "snps,dw-apb-uart";
1287 reg-shift = <2>;
1288 reg-io-width = <4>;
1294 compatible = "snps,dw-apb-uart";
1297 reg-shift = <2>;
1298 reg-io-width = <4>;
1304 compatible = "snps,dw-apb-uart";
1307 reg-shift = <2>;
1308 reg-io-width = <4>;
1314 compatible = "snps,dw-apb-uart";
1317 reg-shift = <2>;
1318 reg-io-width = <4>;
1324 compatible = "snps,dw-apb-uart";
1327 reg-shift = <2>;
1328 reg-io-width = <4>;
1334 compatible = "allwinner,sun4i-a10-i2c";
1339 #address-cells = <1>;
1340 #size-cells = <0>;
1344 compatible = "allwinner,sun4i-a10-i2c";
1349 #address-cells = <1>;
1350 #size-cells = <0>;
1354 compatible = "allwinner,sun4i-a10-i2c";
1359 #address-cells = <1>;
1360 #size-cells = <0>;
1364 compatible = "allwinner,sun4i-a10-ps2";
1372 compatible = "allwinner,sun4i-a10-ps2";