| /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/ |
| H A D | mpc8536ds.dts | 17 #size-cells = <0>; 19 PowerPC,8536@0 { 21 reg = <0>; 28 reg = <0 0 0 0>; // Filled by U-Boot 32 reg = <0 0xffe05000 0 0x1000>; 34 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 35 0x2 0x0 0x0 0xffa00000 0x00040000 36 0x3 0x0 0x0 0xffdf0000 0x00008000>; 40 ranges = <0x0 0 0xffe00000 0x100000>; 44 reg = <0 0xffe08000 0 0x1000>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/realtek/ |
| H A D | rtd139x.dtsi | 8 /memreserve/ 0x0000000000000000 0x000000000002f000; 9 /memreserve/ 0x000000000002f000 0x00000000000d1000; 25 reg = <0x2f000 0x1000>; 29 reg = <0x1ffe000 0x4000>; 33 reg = <0x10100000 0xf00000>; 46 #clock-cells = <0>; 54 ranges = <0x00000000 0x00000000 0x0001f000>, /* boot ROM */ 55 <0x98000000 0x98000000 0x68000000>; 59 reg = <0x98000000 0x200000>; 62 ranges = <0x0 0x98000000 0x200000>; [all …]
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| H A D | rtd16xx.dtsi | 23 reg = <0x2f000 0x1000>; 27 reg = <0x1ffe000 0x4000>; 31 reg = <0x10100000 0xf00000>; 38 #size-cells = <0>; 40 cpu0: cpu@0 { 43 reg = <0x0>; 51 reg = <0x100>; 59 reg = <0x200>; 67 reg = <0x300>; 75 reg = <0x400>; [all …]
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| H A D | rtd129x.dtsi | 8 /memreserve/ 0x0000000000000000 0x000000000001f000; 9 /memreserve/ 0x000000000001f000 0x00000000000e1000; 10 /memreserve/ 0x0000000001b00000 0x00000000004be000; 26 reg = <0x1f000 0x1000>; 30 reg = <0x1ffe000 0x4000>; 34 reg = <0x10100000 0xf00000>; 47 #clock-cells = <0>; 55 ranges = <0x00000000 0x00000000 0x0001f000>, /* boot ROM */ 57 <0x80000000 0x80000000 0x80000000>; 61 reg = <0x98000000 0x200000>; [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/phydm/rtl8188e/ |
| H A D | halhwimg8188e_bb.c | 31 u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ in check_positive() 42 u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; in check_positive() 45 (dm->support_interface & 0xF0) << 16 | in check_positive() 48 (dm->support_interface & 0x0F) << 8 | in check_positive() 51 u32 driver2 = (dm->type_glna & 0xFF) << 0 | in check_positive() 52 (dm->type_gpa & 0xFF) << 8 | in check_positive() 53 (dm->type_alna & 0xFF) << 16 | in check_positive() 54 (dm->type_apa & 0xFF) << 24; in check_positive() 56 u32 driver3 = 0; in check_positive() 58 u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | in check_positive() [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/hal/phydm/rtl8188e/ |
| H A D | halhwimg8188e_bb.c | 35 u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ in CheckPositive() 43 (pDM_Odm->SupportInterface & 0xF0) << 16 | in CheckPositive() 46 (pDM_Odm->SupportInterface & 0x0F) << 8 | in CheckPositive() 49 u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | in CheckPositive() 50 (pDM_Odm->TypeGPA & 0xFF) << 8 | in CheckPositive() 51 (pDM_Odm->TypeALNA & 0xFF) << 16 | in CheckPositive() 52 (pDM_Odm->TypeAPA & 0xFF) << 24; in CheckPositive() 54 u4Byte driver3 = 0; in CheckPositive() 56 u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | in CheckPositive() 57 (pDM_Odm->TypeGPA & 0xFF00) | in CheckPositive() [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | openrisc,ompic.txt | 10 - #interrupt-cells : This should be set to 0 as this will not be an irq 18 reg = <0x98000000 16>; 20 #interrupt-cells = <0>;
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| /OK3568_Linux_fs/kernel/arch/openrisc/boot/dts/ |
| H A D | simple_smp.dts | 17 memory@0 { 19 reg = <0x00000000 0x02000000>; 24 #size-cells = <0>; 25 cpu@0 { 27 reg = <0>; 39 reg = <0x98000000 16>; 41 #interrupt-cells = <0>; 58 reg = <0x90000000 0x100>; 65 reg = <0x92000000 0x800>;
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/hisilicon/ |
| H A D | hip05-d02.dts | 17 memory@0 { 19 reg = <0x0 0x00000000 0x0 0x80000000>; 33 #size-cells = <0>; 39 debounce-interval = <0>; 56 ranges = <0 0 0x0 0x90000000 0x08000000>, 57 <1 0 0x0 0x98000000 0x08000000>; 59 nor-flash@0,0 { 63 reg = <0 0x0 0x08000000>; 66 partition@0 { 68 reg = <0x0 0x300000>; [all …]
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| /OK3568_Linux_fs/u-boot/include/configs/ |
| H A D | MPC8536DS.h | 18 #define CONFIG_SYS_TEXT_BASE 0xf8f40000 19 #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc 24 #define CONFIG_SYS_TEXT_BASE 0xf8f40000 25 #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc 29 #define CONFIG_SYS_TEXT_BASE 0xeff40000 33 #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc 70 #define CONFIG_SYS_MEMTEST_START 0x00010000 /* skip exception vectors */ 71 #define CONFIG_SYS_MEMTEST_END 0x1f000000 /* skip u-boot at top of RAM */ 76 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 78 #define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | prima2.dtsi | 16 #size-cells = <0>; 18 cpu@0 { 21 reg = <0x0>; 27 timebase-frequency = <0>; 28 bus-frequency = <0>; 29 clock-frequency = <0>; 51 ranges = <0x40000000 0x40000000 0x80000000>; 55 reg = <0x80040000 0x1000>; 59 arm,filter-ranges = <0 0x40000000>; 66 reg = <0x80020000 0x1000>; [all …]
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| H A D | atlas6.dtsi | 16 #size-cells = <0>; 18 cpu@0 { 19 reg = <0x0>; 25 timebase-frequency = <0>; 26 bus-frequency = <0>; 27 clock-frequency = <0>; 49 ranges = <0x40000000 0x40000000 0x80000000>; 55 reg = <0x80020000 0x1000>; 62 ranges = <0x88000000 0x88000000 0x40000>; 66 reg = <0x88000000 0x1000>; [all …]
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| H A D | aspeed-bmc-opp-lanyang.dts | 18 reg = <0x80000000 0x40000000>; 28 reg = <0x98000000 0x04000000>; /* 64M */ 68 #size-cells = <0>; 70 clock-gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_HIGH>; 73 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; 79 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 94 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 97 fan@0 { 98 reg = <0x00>; 99 aspeed,fan-tach-ch = /bits/ 8 <0x00>; [all …]
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| H A D | aspeed-bmc-opp-nicole.dts | 17 reg = <0x80000000 0x20000000>; 27 reg = <0x9f000000 0x01000000>; /* 16M */ 32 reg = <0x98000000 0x04000000>; /* 64M */ 36 reg = <0x9ef00000 0x00100000>; 41 size = <0x01000000>; 42 alignment = <0x01000000>; 48 size = <0x02000000>; /* 32M */ 49 alignment = <0x01000000>; 82 #size-cells = <0>; 89 clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; [all …]
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| H A D | aspeed-bmc-opp-romulus.dts | 16 reg = <0x80000000 0x20000000>; 26 reg = <0x9f000000 0x01000000>; /* 16M */ 31 reg = <0x98000000 0x04000000>; /* 64M */ 35 reg = <0x9ef00000 0x00100000>; 40 size = <0x01000000>; 41 alignment = <0x01000000>; 47 size = <0x02000000>; /* 32M */ 48 alignment = <0x01000000>; 73 #size-cells = <0>; 80 clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; [all …]
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| H A D | aspeed-bmc-lenovo-hr630.dts | 35 reg = <0x80000000 0x20000000>; 45 reg = <0x98000000 0x00100000>; /* 1M */ 49 size = <0x01000000>; 50 alignment = <0x01000000>; 64 gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>; 70 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 80 flash@0 { 98 pinctrl-0 = <&pinctrl_txd1_default 106 pinctrl-0 = <&pinctrl_txd2_default 119 pinctrl-0 = <&pinctrl_txd3_default [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-orion5x/include/mach/ |
| H A D | cpu.h | 23 ((_x ? ORION5X_EGIGA0_BASE : ORION5X_EGIGA1_BASE) + 0x44c) 38 ORION5X_TARGET_DRAM = 0, 46 ORION5X_ATTR_DRAM_CS0 = 0x0e, 47 ORION5X_ATTR_DRAM_CS1 = 0x0d, 48 ORION5X_ATTR_DRAM_CS2 = 0x0b, 49 ORION5X_ATTR_DRAM_CS3 = 0x07, 50 ORION5X_ATTR_PCI_MEM = 0x59, 51 ORION5X_ATTR_PCI_IO = 0x51, 52 ORION5X_ATTR_PCIE_MEM = 0x59, 53 ORION5X_ATTR_PCIE_IO = 0x51, [all …]
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| /OK3568_Linux_fs/kernel/tools/testing/selftests/powerpc/include/ |
| H A D | instructions.h | 10 (0x7c00060c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10)) 16 asm volatile(str(COPY(0, %0, 0))";" in copy() 25 asm volatile(str(COPY(0, %0, 1))";" in copy_first() 34 (0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31)) 42 asm volatile(str(PASTE(0, %1, 0, 0))";" in paste() 43 "mfcr %0;" in paste() 55 asm volatile(str(PASTE(0, %1, 1, 1))";" in paste_last() 56 "mfcr %0;" in paste_last() 64 #define PPC_INST_COPY __COPY(0, 0, 0) 65 #define PPC_INST_COPY_FIRST __COPY(0, 0, 1) [all …]
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| /OK3568_Linux_fs/u-boot/post/lib_powerpc/ |
| H A D | cpu_asm.h | 10 #define BIT_C 0x00000001 12 #define OP_BLR 0x4e800020 13 #define OP_EXTSB 0x7c000774 14 #define OP_EXTSH 0x7c000734 15 #define OP_NEG 0x7c0000d0 16 #define OP_CNTLZW 0x7c000034 17 #define OP_ADD 0x7c000214 18 #define OP_ADDC 0x7c000014 19 #define OP_ADDME 0x7c0001d4 20 #define OP_ADDZE 0x7c000194 [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | sama5d2.h | 21 #define ATMEL_ID_FIQ 0 /* FIQ Interrupt ID */ 27 #define ATMEL_ID_XDMAC0 6 /* DMA Controller 0 */ 50 #define ATMEL_ID_TWIHS0 29 /* Two-wire Interface 0 */ 52 #define ATMEL_ID_SDMMC0 31 /* Secure Data Memory Card Controller 0 */ 54 #define ATMEL_ID_SPI0 33 /* Serial Peripheral Interface 0 */ 56 #define ATMEL_ID_TC0 35 /* Timer Counter 0 (ch.0,1,2) */ 59 #define ATMEL_ID_PWM 38 /* PWMController0 (ch. 0,1,2,3) */ 64 #define ATMEL_ID_SSC0 43 /* Serial Synchronous Controller 0 */ 75 #define ATMEL_ID_I2SC0 54 /* Inter-IC Sound Controller 0 */ 77 #define ATMEL_ID_CAN0_INT0 56 /* MCAN 0 Interrupt0 */ [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/remoteproc/ |
| H A D | ti,omap-remoteproc.yaml | 228 reg = <0x98000000 0x800000>; 237 ti,bootreg = <&scm_conf 0x304 0>; 243 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>; 244 resets = <&prm_tesla 0>, <&prm_tesla 1>; 261 reg = <0 0x95800000 0 0x3800000>; 273 reg = <0x55020000 0x10000>; 280 clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>; 298 reg = <0x0 0x99000000 0x0 0x4000000>; 310 reg = <0x40800000 0x48000>, 311 <0x40e00000 0x8000>, [all …]
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| /OK3568_Linux_fs/u-boot/board/renesas/sh7785lcr/ |
| H A D | lowlevel_init.S | 126 * 0 0xa0000000 0x00000000 1 64M 0 0 127 * 1 0xa4000000 0x04000000 1 16M 0 0 128 * 2 0xa6000000 0x08000000 1 16M 0 0 129 * 9 0x88000000 0x48000000 1 128M 1 1 130 * 10 0x90000000 0x50000000 1 128M 1 1 131 * 11 0x98000000 0x58000000 1 128M 1 1 132 * 13 0xa8000000 0x48000000 1 128M 0 0 133 * 14 0xb0000000 0x50000000 1 128M 0 0 134 * 15 0xb8000000 0x58000000 1 128M 0 0 169 PXCR_D: .word 0x0000 [all …]
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| /OK3568_Linux_fs/u-boot/board/renesas/sh7752evb/ |
| H A D | sh7752evb.c | 19 return 0; in checkboard() 28 writew(0x0000, &gpio->pacr); /* GETHER */ in init_gpio() 29 writew(0x0001, &gpio->pbcr); /* INTC */ in init_gpio() 30 writew(0x0000, &gpio->pccr); /* PWMU, INTC */ in init_gpio() 31 writew(0xeaff, &gpio->pecr); /* GPIO */ in init_gpio() 32 writew(0x0000, &gpio->pfcr); /* WDT */ in init_gpio() 33 writew(0x0000, &gpio->phcr); /* SPI1 */ in init_gpio() 34 writew(0x0000, &gpio->picr); /* SDHI */ in init_gpio() 35 writew(0x0003, &gpio->pkcr); /* SerMux */ in init_gpio() 36 writew(0x0000, &gpio->plcr); /* SerMux */ in init_gpio() [all …]
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| /OK3568_Linux_fs/u-boot/board/renesas/sh7753evb/ |
| H A D | sh7753evb.c | 19 return 0; in checkboard() 28 writew(0x0000, &gpio->pacr); /* GETHER */ in init_gpio() 29 writew(0x0001, &gpio->pbcr); /* INTC */ in init_gpio() 30 writew(0x0000, &gpio->pccr); /* PWMU, INTC */ in init_gpio() 31 writew(0x0000, &gpio->pdcr); /* SPI0 */ in init_gpio() 32 writew(0xeaff, &gpio->pecr); /* GPIO */ in init_gpio() 33 writew(0x0000, &gpio->pfcr); /* WDT */ in init_gpio() 34 writew(0x0004, &gpio->pgcr); /* SPI0, GETHER MDIO gate(PTG1) */ in init_gpio() 35 writew(0x0000, &gpio->phcr); /* SPI1 */ in init_gpio() 36 writew(0x0000, &gpio->picr); /* SDHI */ in init_gpio() [all …]
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| /OK3568_Linux_fs/kernel/Documentation/xtensa/ |
| H A D | mmu.rst | 16 - RASID is 0x04030201 (reset state). 28 After step 2, we jump to virtual address in the range 0x40000000..0x5fffffff 29 or 0x00000000..0x1fffffff, depending on whether the kernel was loaded below 30 0x40000000 or above. That address corresponds to next instruction to execute 32 The scheme below assumes that the kernel is loaded below 0x40000000. 49 The default location of IO peripherals is above 0xf0000000. This may be changed 75 | Userspace | 0x00000000 TASK_SIZE 76 +------------------+ 0x40000000 78 | Page table | XCHAL_PAGE_TABLE_VADDR 0x80000000 XCHAL_PAGE_TABLE_SIZE 80 | KASAN shadow map | KASAN_SHADOW_START 0x80400000 KASAN_SHADOW_SIZE [all …]
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