xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree file for Lenovo Hr630 platform
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2019-present Lenovo
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include "aspeed-g5.dtsi"
11*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "HR630 BMC";
15*4882a593Smuzhiyun	compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	aliases {
18*4882a593Smuzhiyun		i2c14 = &i2c_rbp;
19*4882a593Smuzhiyun		i2c15 = &i2c_fbp1;
20*4882a593Smuzhiyun		i2c16 = &i2c_fbp2;
21*4882a593Smuzhiyun		i2c17 = &i2c_fbp3;
22*4882a593Smuzhiyun		i2c18 = &i2c_riser2;
23*4882a593Smuzhiyun		i2c19 = &i2c_pcie4;
24*4882a593Smuzhiyun		i2c20 = &i2c_riser1;
25*4882a593Smuzhiyun		i2c21 = &i2c_ocp;
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	chosen {
29*4882a593Smuzhiyun		stdout-path = &uart5;
30*4882a593Smuzhiyun		bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	memory@80000000 {
34*4882a593Smuzhiyun		device_type = "memory";
35*4882a593Smuzhiyun		reg = <0x80000000 0x20000000>;
36*4882a593Smuzhiyun	};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	reserved-memory {
39*4882a593Smuzhiyun		#address-cells = <1>;
40*4882a593Smuzhiyun		#size-cells = <1>;
41*4882a593Smuzhiyun		ranges;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun		flash_memory: region@98000000 {
44*4882a593Smuzhiyun			no-map;
45*4882a593Smuzhiyun			reg = <0x98000000 0x00100000>; /* 1M */
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		gfx_memory: framebuffer {
49*4882a593Smuzhiyun			size = <0x01000000>;
50*4882a593Smuzhiyun			alignment = <0x01000000>;
51*4882a593Smuzhiyun			compatible = "shared-dma-pool";
52*4882a593Smuzhiyun			reusable;
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	leds {
57*4882a593Smuzhiyun		compatible = "gpio-leds";
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		heartbeat {
60*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
61*4882a593Smuzhiyun		};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun		fault {
64*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
65*4882a593Smuzhiyun		};
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	iio-hwmon {
69*4882a593Smuzhiyun		compatible = "iio-hwmon";
70*4882a593Smuzhiyun		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
71*4882a593Smuzhiyun		<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
72*4882a593Smuzhiyun		<&adc 8>, <&adc 9>, <&adc 10>,
73*4882a593Smuzhiyun		<&adc 12>, <&adc 13>, <&adc 14>;
74*4882a593Smuzhiyun	};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun&fmc {
79*4882a593Smuzhiyun	status = "okay";
80*4882a593Smuzhiyun	flash@0 {
81*4882a593Smuzhiyun		status = "okay";
82*4882a593Smuzhiyun		m25p,fast-read;
83*4882a593Smuzhiyun		label = "bmc";
84*4882a593Smuzhiyun		spi-max-frequency = <50000000>;
85*4882a593Smuzhiyun#include "openbmc-flash-layout.dtsi"
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun&lpc_ctrl {
90*4882a593Smuzhiyun	status = "okay";
91*4882a593Smuzhiyun	memory-region = <&flash_memory>;
92*4882a593Smuzhiyun	flash = <&spi1>;
93*4882a593Smuzhiyun};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun&uart1 {
96*4882a593Smuzhiyun	status = "okay";
97*4882a593Smuzhiyun	pinctrl-names = "default";
98*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_txd1_default
99*4882a593Smuzhiyun			&pinctrl_rxd1_default>;
100*4882a593Smuzhiyun};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun&uart2 {
103*4882a593Smuzhiyun	/* Rear RS-232 connector */
104*4882a593Smuzhiyun	status = "okay";
105*4882a593Smuzhiyun	pinctrl-names = "default";
106*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_txd2_default
107*4882a593Smuzhiyun			&pinctrl_rxd2_default
108*4882a593Smuzhiyun			&pinctrl_nrts2_default
109*4882a593Smuzhiyun			&pinctrl_ndtr2_default
110*4882a593Smuzhiyun			&pinctrl_ndsr2_default
111*4882a593Smuzhiyun			&pinctrl_ncts2_default
112*4882a593Smuzhiyun			&pinctrl_ndcd2_default
113*4882a593Smuzhiyun			&pinctrl_nri2_default>;
114*4882a593Smuzhiyun};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun&uart3 {
117*4882a593Smuzhiyun	status = "okay";
118*4882a593Smuzhiyun	pinctrl-names = "default";
119*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_txd3_default
120*4882a593Smuzhiyun			&pinctrl_rxd3_default>;
121*4882a593Smuzhiyun};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun&uart5 {
124*4882a593Smuzhiyun	status = "okay";
125*4882a593Smuzhiyun};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun&ibt {
128*4882a593Smuzhiyun	status = "okay";
129*4882a593Smuzhiyun};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun&mac0 {
132*4882a593Smuzhiyun	status = "okay";
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun	pinctrl-names = "default";
135*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_rmii1_default>;
136*4882a593Smuzhiyun	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
137*4882a593Smuzhiyun		 <&syscon ASPEED_CLK_MAC1RCLK>;
138*4882a593Smuzhiyun	clock-names = "MACCLK", "RCLK";
139*4882a593Smuzhiyun	use-ncsi;
140*4882a593Smuzhiyun};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun&mac1 {
143*4882a593Smuzhiyun	status = "okay";
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun	pinctrl-names = "default";
146*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
147*4882a593Smuzhiyun};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun&adc {
150*4882a593Smuzhiyun	status = "okay";
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun	pinctrl-names = "default";
153*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_adc0_default
154*4882a593Smuzhiyun			&pinctrl_adc1_default
155*4882a593Smuzhiyun			&pinctrl_adc2_default
156*4882a593Smuzhiyun			&pinctrl_adc3_default
157*4882a593Smuzhiyun			&pinctrl_adc4_default
158*4882a593Smuzhiyun			&pinctrl_adc5_default
159*4882a593Smuzhiyun			&pinctrl_adc6_default
160*4882a593Smuzhiyun			&pinctrl_adc7_default
161*4882a593Smuzhiyun			&pinctrl_adc8_default
162*4882a593Smuzhiyun			&pinctrl_adc9_default
163*4882a593Smuzhiyun			&pinctrl_adc10_default
164*4882a593Smuzhiyun			&pinctrl_adc12_default
165*4882a593Smuzhiyun			&pinctrl_adc13_default
166*4882a593Smuzhiyun			&pinctrl_adc14_default>;
167*4882a593Smuzhiyun};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun&i2c0 {
170*4882a593Smuzhiyun	status = "okay";
171*4882a593Smuzhiyun	/* temp1 inlet */
172*4882a593Smuzhiyun	tmp75@4e {
173*4882a593Smuzhiyun		compatible = "national,lm75";
174*4882a593Smuzhiyun		reg = <0x4e>;
175*4882a593Smuzhiyun	};
176*4882a593Smuzhiyun};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun&i2c1 {
179*4882a593Smuzhiyun	status = "okay";
180*4882a593Smuzhiyun	/* temp2 outlet */
181*4882a593Smuzhiyun	tmp75@4d {
182*4882a593Smuzhiyun		compatible = "national,lm75";
183*4882a593Smuzhiyun		reg = <0x4d>;
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun&i2c2 {
188*4882a593Smuzhiyun	status = "okay";
189*4882a593Smuzhiyun};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun&i2c3 {
192*4882a593Smuzhiyun	status = "okay";
193*4882a593Smuzhiyun};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun&i2c4 {
196*4882a593Smuzhiyun	status = "okay";
197*4882a593Smuzhiyun};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun&i2c5 {
200*4882a593Smuzhiyun	status = "okay";
201*4882a593Smuzhiyun};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun&i2c6 {
204*4882a593Smuzhiyun	status = "okay";
205*4882a593Smuzhiyun	/*	Slot 0,
206*4882a593Smuzhiyun	 *	Slot 1,
207*4882a593Smuzhiyun	 *	Slot 2,
208*4882a593Smuzhiyun	 *	Slot 3
209*4882a593Smuzhiyun	 */
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun	i2c-switch@70 {
212*4882a593Smuzhiyun		compatible = "nxp,pca9545";
213*4882a593Smuzhiyun		reg = <0x70>;
214*4882a593Smuzhiyun		#address-cells = <1>;
215*4882a593Smuzhiyun		#size-cells = <0>;
216*4882a593Smuzhiyun		i2c-mux-idle-disconnect;	/* may use mux@70 next. */
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun		i2c_rbp: i2c@0 {
219*4882a593Smuzhiyun			#address-cells = <1>;
220*4882a593Smuzhiyun			#size-cells = <0>;
221*4882a593Smuzhiyun			reg = <0>;
222*4882a593Smuzhiyun		};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun		i2c_fbp1: i2c@1 {
225*4882a593Smuzhiyun			#address-cells = <1>;
226*4882a593Smuzhiyun			#size-cells = <0>;
227*4882a593Smuzhiyun			reg = <1>;
228*4882a593Smuzhiyun		};
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun		i2c_fbp2: i2c@2 {
231*4882a593Smuzhiyun			#address-cells = <1>;
232*4882a593Smuzhiyun			#size-cells = <0>;
233*4882a593Smuzhiyun			reg = <2>;
234*4882a593Smuzhiyun		};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun		i2c_fbp3: i2c@3 {
237*4882a593Smuzhiyun			#address-cells = <1>;
238*4882a593Smuzhiyun			#size-cells = <0>;
239*4882a593Smuzhiyun			reg = <3>;
240*4882a593Smuzhiyun		};
241*4882a593Smuzhiyun	};
242*4882a593Smuzhiyun};
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun&i2c7 {
245*4882a593Smuzhiyun	status = "okay";
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun	/*	Slot 0,
248*4882a593Smuzhiyun	 *	Slot 1,
249*4882a593Smuzhiyun	 *	Slot 2,
250*4882a593Smuzhiyun	 *	Slot 3
251*4882a593Smuzhiyun	 */
252*4882a593Smuzhiyun	i2c-switch@76 {
253*4882a593Smuzhiyun		compatible = "nxp,pca9546";
254*4882a593Smuzhiyun		reg = <0x76>;
255*4882a593Smuzhiyun		#address-cells = <1>;
256*4882a593Smuzhiyun		#size-cells = <0>;
257*4882a593Smuzhiyun		i2c-mux-idle-disconnect;  /* may use mux@76 next. */
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun		i2c_riser2: i2c@0 {
260*4882a593Smuzhiyun			#address-cells = <1>;
261*4882a593Smuzhiyun			#size-cells = <0>;
262*4882a593Smuzhiyun			reg = <0>;
263*4882a593Smuzhiyun		};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun		i2c_pcie4: i2c@1 {
266*4882a593Smuzhiyun			#address-cells = <1>;
267*4882a593Smuzhiyun			#size-cells = <0>;
268*4882a593Smuzhiyun			reg = <1>;
269*4882a593Smuzhiyun		};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun		i2c_riser1: i2c@2 {
272*4882a593Smuzhiyun			#address-cells = <1>;
273*4882a593Smuzhiyun			#size-cells = <0>;
274*4882a593Smuzhiyun			reg = <2>;
275*4882a593Smuzhiyun		};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun		i2c_ocp: i2c@3 {
278*4882a593Smuzhiyun			#address-cells = <1>;
279*4882a593Smuzhiyun			#size-cells = <0>;
280*4882a593Smuzhiyun			reg = <3>;
281*4882a593Smuzhiyun		};
282*4882a593Smuzhiyun	};
283*4882a593Smuzhiyun};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun&i2c8 {
286*4882a593Smuzhiyun	status = "okay";
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun	eeprom@57 {
289*4882a593Smuzhiyun		compatible = "atmel,24c256";
290*4882a593Smuzhiyun		reg = <0x57>;
291*4882a593Smuzhiyun		pagesize = <16>;
292*4882a593Smuzhiyun	};
293*4882a593Smuzhiyun};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun&i2c9 {
296*4882a593Smuzhiyun	status = "okay";
297*4882a593Smuzhiyun};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun&i2c10 {
300*4882a593Smuzhiyun	status = "okay";
301*4882a593Smuzhiyun};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun&i2c11 {
304*4882a593Smuzhiyun	status = "okay";
305*4882a593Smuzhiyun};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun&i2c12 {
308*4882a593Smuzhiyun	status = "okay";
309*4882a593Smuzhiyun};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun&ehci1 {
312*4882a593Smuzhiyun	status = "okay";
313*4882a593Smuzhiyun};
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun&uhci {
316*4882a593Smuzhiyun	status = "okay";
317*4882a593Smuzhiyun};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun&gfx {
320*4882a593Smuzhiyun	status = "okay";
321*4882a593Smuzhiyun	memory-region = <&gfx_memory>;
322*4882a593Smuzhiyun};
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun&pwm_tacho {
325*4882a593Smuzhiyun	status = "okay";
326*4882a593Smuzhiyun	pinctrl-names = "default";
327*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_pwm0_default
328*4882a593Smuzhiyun	&pinctrl_pwm1_default
329*4882a593Smuzhiyun	&pinctrl_pwm2_default
330*4882a593Smuzhiyun	&pinctrl_pwm3_default
331*4882a593Smuzhiyun	&pinctrl_pwm4_default
332*4882a593Smuzhiyun	&pinctrl_pwm5_default
333*4882a593Smuzhiyun	&pinctrl_pwm6_default>;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun	fan@0 {
336*4882a593Smuzhiyun		reg = <0x00>;
337*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
338*4882a593Smuzhiyun	};
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun	fan@1 {
341*4882a593Smuzhiyun		reg = <0x00>;
342*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
343*4882a593Smuzhiyun	};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun	fan@2 {
346*4882a593Smuzhiyun		reg = <0x01>;
347*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
348*4882a593Smuzhiyun	};
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun	fan@3 {
351*4882a593Smuzhiyun		reg = <0x01>;
352*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
353*4882a593Smuzhiyun	};
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun	fan@4 {
356*4882a593Smuzhiyun		reg = <0x02>;
357*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
358*4882a593Smuzhiyun	};
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun	fan@5 {
361*4882a593Smuzhiyun		reg = <0x02>;
362*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
363*4882a593Smuzhiyun	};
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun	fan@6 {
366*4882a593Smuzhiyun		reg = <0x03>;
367*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
368*4882a593Smuzhiyun	};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun	fan@7 {
371*4882a593Smuzhiyun		reg = <0x03>;
372*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
373*4882a593Smuzhiyun	};
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun	fan@8 {
376*4882a593Smuzhiyun		reg = <0x04>;
377*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x08>;
378*4882a593Smuzhiyun	};
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun	fan@9 {
381*4882a593Smuzhiyun		reg = <0x04>;
382*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x09>;
383*4882a593Smuzhiyun	};
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun	fan@10 {
386*4882a593Smuzhiyun		reg = <0x05>;
387*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
388*4882a593Smuzhiyun	};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun	fan@11 {
391*4882a593Smuzhiyun		reg = <0x05>;
392*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
393*4882a593Smuzhiyun	};
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun	fan@12 {
396*4882a593Smuzhiyun		reg = <0x06>;
397*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
398*4882a593Smuzhiyun	};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun	fan@13 {
401*4882a593Smuzhiyun		reg = <0x06>;
402*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
403*4882a593Smuzhiyun	};
404*4882a593Smuzhiyun};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun&gpio {
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun	pin_gpio_b5 {
409*4882a593Smuzhiyun		gpio-hog;
410*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
411*4882a593Smuzhiyun		output-high;
412*4882a593Smuzhiyun		line-name = "IRQ_BMC_PCH_SMI_LPC_N";
413*4882a593Smuzhiyun	};
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun	pin_gpio_f0 {
416*4882a593Smuzhiyun		gpio-hog;
417*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
418*4882a593Smuzhiyun		output-low;
419*4882a593Smuzhiyun		line-name = "IRQ_BMC_PCH_NMI_R";
420*4882a593Smuzhiyun	};
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun	pin_gpio_f3 {
423*4882a593Smuzhiyun		gpio-hog;
424*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
425*4882a593Smuzhiyun		output-high;
426*4882a593Smuzhiyun		line-name = "I2C_BUS0_RST_OUT_N";
427*4882a593Smuzhiyun	};
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun	pin_gpio_f4 {
430*4882a593Smuzhiyun		gpio-hog;
431*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
432*4882a593Smuzhiyun		output-low;
433*4882a593Smuzhiyun		line-name = "FM_SKT0_FAULT_LED";
434*4882a593Smuzhiyun	};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun	pin_gpio_f5 {
437*4882a593Smuzhiyun		gpio-hog;
438*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
439*4882a593Smuzhiyun		output-low;
440*4882a593Smuzhiyun		line-name = "FM_SKT1_FAULT_LED";
441*4882a593Smuzhiyun	};
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun	pin_gpio_g4 {
444*4882a593Smuzhiyun		gpio-hog;
445*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
446*4882a593Smuzhiyun		output-high;
447*4882a593Smuzhiyun		line-name = "FAN_PWR_CTL_N";
448*4882a593Smuzhiyun	};
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun	pin_gpio_g7 {
451*4882a593Smuzhiyun		gpio-hog;
452*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
453*4882a593Smuzhiyun		output-high;
454*4882a593Smuzhiyun		line-name = "RST_BMC_PCIE_I2CMUX_N";
455*4882a593Smuzhiyun	};
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun	pin_gpio_h2 {
458*4882a593Smuzhiyun		gpio-hog;
459*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
460*4882a593Smuzhiyun		output-high;
461*4882a593Smuzhiyun		line-name = "PSU1_FFS_N_R";
462*4882a593Smuzhiyun	};
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun	pin_gpio_h3 {
465*4882a593Smuzhiyun		gpio-hog;
466*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
467*4882a593Smuzhiyun		output-high;
468*4882a593Smuzhiyun		line-name = "PSU2_FFS_N_R";
469*4882a593Smuzhiyun	};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun	pin_gpio_i3 {
472*4882a593Smuzhiyun		gpio-hog;
473*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
474*4882a593Smuzhiyun		output-high;
475*4882a593Smuzhiyun		line-name = "BMC_INTRUDED_COVER";
476*4882a593Smuzhiyun	};
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun	pin_gpio_j2 {
479*4882a593Smuzhiyun		gpio-hog;
480*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
481*4882a593Smuzhiyun		output-high;
482*4882a593Smuzhiyun		line-name = "BMC_BIOS_UPDATE_N";
483*4882a593Smuzhiyun	};
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun	pin_gpio_j3 {
486*4882a593Smuzhiyun		gpio-hog;
487*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
488*4882a593Smuzhiyun		output-high;
489*4882a593Smuzhiyun		line-name = "RST_BMC_HDD_I2CMUX_N";
490*4882a593Smuzhiyun	};
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun	pin_gpio_s2 {
493*4882a593Smuzhiyun		gpio-hog;
494*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
495*4882a593Smuzhiyun		output-high;
496*4882a593Smuzhiyun		line-name = "BMC_VGA_SW";
497*4882a593Smuzhiyun	};
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun	pin_gpio_s4 {
500*4882a593Smuzhiyun		gpio-hog;
501*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
502*4882a593Smuzhiyun		output;
503*4882a593Smuzhiyun		line-name = "VBAT_EN_N";
504*4882a593Smuzhiyun	};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun	pin_gpio_s6 {
507*4882a593Smuzhiyun		gpio-hog;
508*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
509*4882a593Smuzhiyun		output-high;
510*4882a593Smuzhiyun		line-name = "PU_BMC_GPIOS6";
511*4882a593Smuzhiyun	};
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun	pin_gpio_y0 {
514*4882a593Smuzhiyun		gpio-hog;
515*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
516*4882a593Smuzhiyun		output-low;
517*4882a593Smuzhiyun		line-name = "BMC_NCSI_MUX_CTL_S0";
518*4882a593Smuzhiyun	};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun	pin_gpio_y1 {
521*4882a593Smuzhiyun		gpio-hog;
522*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
523*4882a593Smuzhiyun		output-low;
524*4882a593Smuzhiyun		line-name = "BMC_NCSI_MUX_CTL_S1";
525*4882a593Smuzhiyun	};
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun	pin_gpio_z0 {
528*4882a593Smuzhiyun		gpio-hog;
529*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
530*4882a593Smuzhiyun		output-high;
531*4882a593Smuzhiyun		line-name = "I2C_RISER2_INT_N";
532*4882a593Smuzhiyun	};
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun	pin_gpio_z2 {
535*4882a593Smuzhiyun		gpio-hog;
536*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
537*4882a593Smuzhiyun		output-high;
538*4882a593Smuzhiyun		line-name = "I2C_RISER2_RESET_N";
539*4882a593Smuzhiyun	};
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun	pin_gpio_z3 {
542*4882a593Smuzhiyun		gpio-hog;
543*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
544*4882a593Smuzhiyun		output-high;
545*4882a593Smuzhiyun		line-name = "FM_BMC_PCH_SCI_LPC_N";
546*4882a593Smuzhiyun	};
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun	pin_gpio_z7 {
549*4882a593Smuzhiyun		gpio-hog;
550*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
551*4882a593Smuzhiyun		output-low;
552*4882a593Smuzhiyun		line-name = "BMC_POST_CMPLT_N";
553*4882a593Smuzhiyun	};
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun	pin_gpio_aa0 {
556*4882a593Smuzhiyun		gpio-hog;
557*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
558*4882a593Smuzhiyun		output-low;
559*4882a593Smuzhiyun		line-name = "HOST_BMC_USB_SEL";
560*4882a593Smuzhiyun	};
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun	pin_gpio_aa5 {
563*4882a593Smuzhiyun		gpio-hog;
564*4882a593Smuzhiyun		gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
565*4882a593Smuzhiyun		output-high;
566*4882a593Smuzhiyun		line-name = "I2C_BUS1_RST_OUT_N";
567*4882a593Smuzhiyun	};
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun};
570