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/utopia/UTPA2-700.0.x/modules/msos/msos/linux_kernel_V2/
H A DdrvMPool.c195 static MS_BOOL _MPOOL_DELAY_BINDING(int idx);
258 int i, idx; in MsOS_MPool_VA2PA() local
298 for(idx=0;idx<MAX_MAPPINGSIZE;idx++) in MsOS_MPool_VA2PA()
300 if(!mpool_info[idx].bIsUsed) in MsOS_MPool_VA2PA()
302 …BG_MSG(E_MsOSMPool_DBG_L1, printk("mpool_info[%d].u8MiuSel = %d\n", idx,mpool_info[idx].u8MiuSel)); in MsOS_MPool_VA2PA()
303 …_MSG(E_MsOSMPool_DBG_L1, printk("mpool_info[%d].bNonCache = %d\n", idx,mpool_info[idx].bNonCache)); in MsOS_MPool_VA2PA()
304 …_MSG(E_MsOSMPool_DBG_L1, printk("mpool_info[%d].pVirtStart =%lx\n",idx, mpool_info[idx].pVirtStart… in MsOS_MPool_VA2PA()
305 …G_MSG(E_MsOSMPool_DBG_L1, printk("mpool_info[%d].pVirtEnd = %lx\n", idx,mpool_info[idx].pVirtEnd)); in MsOS_MPool_VA2PA()
306 …BG_MSG(E_MsOSMPool_DBG_L1, printk("mpool_info[%d].pPhyaddr =%lx\n", idx,mpool_info[idx].pPhyaddr)); in MsOS_MPool_VA2PA()
307 …G(E_MsOSMPool_DBG_L1, printk("mpool_info[%d].u32MpoolSize =%lx\n", idx,mpool_info[idx].u32MpoolSiz… in MsOS_MPool_VA2PA()
[all …]
H A DdrvIPAPool.c303 MS_U32 idx = 0; in MApi_IPA_Pool_Init() local
343 ret = _findHeapId_InIPA_Pool_Table(Init_Param, &idx); in MApi_IPA_Pool_Init()
351 Init_Param->space_id = IPAPool_Info[idx].Init_Param.heap_id; in MApi_IPA_Pool_Init()
352 Init_Param->pool_name = (char *)IPAPool_Info[idx].Init_Param.pool_name; in MApi_IPA_Pool_Init()
353 Init_Param->offset_in_heap = IPAPool_Info[idx].Init_Param.offset_in_heap; in MApi_IPA_Pool_Init()
354 Init_Param->len = IPAPool_Info[idx].Init_Param.len; in MApi_IPA_Pool_Init()
355 Init_Param->pool_handle_id = IPAPool_Info[idx].Init_Param.pool_handle_id; in MApi_IPA_Pool_Init()
356 Init_Param->miu = IPAPool_Info[idx].Init_Param.miu; in MApi_IPA_Pool_Init()
357 Init_Param->space_type = IPAPool_Info[idx].Init_Param.heap_type; in MApi_IPA_Pool_Init()
358 Init_Param->error_code = IPAPool_Info[idx].Init_Param.error_code; in MApi_IPA_Pool_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/msos/msos/linux/
H A DdrvMPool.c920 static MS_U8 _MPOOL_DELAY_BINDING(MS_S32 idx) in _MPOOL_DELAY_BINDING() argument
924 MS_U32 bCache = (mpool_info[idx].bNonCache) ? 0: 1; in _MPOOL_DELAY_BINDING()
929 stPoolInfo.u64Addr = mpool_info[idx].u64Phyaddr; in _MPOOL_DELAY_BINDING()
930 stPoolInfo.u64Size = mpool_info[idx].u64MpoolSize; in _MPOOL_DELAY_BINDING()
932 stPoolInfo.u8MiuSel = mpool_info[idx].u8MiuSel; in _MPOOL_DELAY_BINDING()
957 …if ((MS_VIRT)MAP_FAILED == (u64AddrVirt = (MS_VIRT)mmap(0, mpool_info[idx].u64MpoolSize, PROT_READ… in _MPOOL_DELAY_BINDING()
967 mpool_info[idx].u64VirtStart = u64AddrVirt; in _MPOOL_DELAY_BINDING()
968 mpool_info[idx].u64VirtEnd = (u64AddrVirt + mpool_info[idx].u64MpoolSize); in _MPOOL_DELAY_BINDING()
970 mpool_info[idx].s32V2Poff = mpool_info[idx].u64VirtStart - mpool_info[idx].u64Phyaddr; in _MPOOL_DELAY_BINDING()
972 …L1, printf("mpool_info[%td].u64VirtStart =%tX\n", (ptrdiff_t)idx, (ptrdiff_t)mpool_info[idx].u64Vi… in _MPOOL_DELAY_BINDING()
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H A DdrvIPAPool.c406 MS_U32 idx = 0; in MApi_IPA_Pool_Init() local
425 ret = _findHeapId_InIPA_Pool_Table(Init_Param, &idx); in MApi_IPA_Pool_Init()
429 Init_Param->space_id = IPAPool_Info[idx].Init_Param.heap_id; in MApi_IPA_Pool_Init()
430 Init_Param->pool_name = (char *)(intptr_t)IPAPool_Info[idx].Init_Param.pool_name; in MApi_IPA_Pool_Init()
431 Init_Param->offset_in_heap = IPAPool_Info[idx].Init_Param.offset_in_heap; in MApi_IPA_Pool_Init()
432 Init_Param->len = IPAPool_Info[idx].Init_Param.len; in MApi_IPA_Pool_Init()
433 Init_Param->pool_handle_id = IPAPool_Info[idx].Init_Param.pool_handle_id; in MApi_IPA_Pool_Init()
434 Init_Param->miu = IPAPool_Info[idx].Init_Param.miu; in MApi_IPA_Pool_Init()
435 Init_Param->space_type = IPAPool_Info[idx].Init_Param.heap_type; in MApi_IPA_Pool_Init()
436 Init_Param->error_code = IPAPool_Info[idx].Init_Param.error_code; in MApi_IPA_Pool_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/msos/msos/nos/
H A DdrvMPool.c210 int i,idx = 0; in MsOS_MPool_Mapping() local
241 idx = i; in MsOS_MPool_Mapping()
249 …_info[i].pPhyaddr <= Phyaddr && Phyaddr < mpool_info[i].pPhyaddr + mpool_info[idx].u64MpoolSize) || in MsOS_MPool_Mapping()
250 …[i].pPhyaddr <= PhyaddrEnd && PhyaddrEnd < mpool_info[i].pPhyaddr + mpool_info[idx].u64MpoolSize) ) in MsOS_MPool_Mapping()
254 …_t)mpool_info[i].pPhyaddr, (ptrdiff_t)(mpool_info[i].pPhyaddr + mpool_info[idx].u64MpoolSize -1))); in MsOS_MPool_Mapping()
262 mpool_info[idx].pVirtStart = va_start; in MsOS_MPool_Mapping()
263 mpool_info[idx].pVirtEnd = (va_start + u64MapSize); in MsOS_MPool_Mapping()
264 mpool_info[idx].u8MiuSel = u8MiuSel; in MsOS_MPool_Mapping()
265 mpool_info[idx].pPhyaddr = Phyaddr; in MsOS_MPool_Mapping()
266 mpool_info[idx].u64MpoolSize = u64MapSize; in MsOS_MPool_Mapping()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/drv/mjpeg_ex/
H A DdrvMJPEG_EX.c348 MS_U32 idx = 0; in MDrv_MJPEG_SendVPUCommand() local
383 for (idx = 0; idx < u32FrameBuffTotalNum[u8DrvId]-1; idx++) in MDrv_MJPEG_SendVPUCommand()
387 …pShareMem->DispQueue[idx+1].u32LumaAddr = pShareMem->DispQueue[idx].u32LumaAddr + u32FrameBuffUnit… in MDrv_MJPEG_SendVPUCommand()
388 pShareMem->DispQueue[idx+1].u32Status = E_HVD_DISPQ_STATUS_FREE; in MDrv_MJPEG_SendVPUCommand()
395 for (idx = 0; idx < u32FrameBuffTotalNum[u8DrvId]; idx++) in MDrv_MJPEG_SendVPUCommand()
397 if (pShareMem->DispQueue[idx].u32Status == E_HVD_DISPQ_STATUS_FREE) in MDrv_MJPEG_SendVPUCommand()
399 return idx; in MDrv_MJPEG_SendVPUCommand()
444 for (idx = 0; idx < u32FrameBuffTotalNum[u8DrvId]; idx++) in MDrv_MJPEG_SendVPUCommand()
446 if (pShareMem->DispQueue[idx].u32Status == E_HVD_DISPQ_STATUS_FREE) in MDrv_MJPEG_SendVPUCommand()
448 pShareMem->u32MJPEG_NextFrameBuffIdx = idx; in MDrv_MJPEG_SendVPUCommand()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/
H A DhalHDMITx.c929 MS_U16 MHal_HDMITX_GetM02Bytes(MS_U16 idx) in MHal_HDMITX_GetM02Bytes() argument
931 return (MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MI_0C + idx)); in MHal_HDMITX_GetM02Bytes()
1913 void MHal_HDMITx_SetVideoOutputMode(MsHDMITX_VIDEO_TIMING idx, MS_BOOL bflag, MsHDMITX_VIDEO_COLORD… in MHal_HDMITx_SetVideoOutputMode() argument
1923 MsHDMITX_VIDEO_TIMING eSize_idx = idx; in MHal_HDMITx_SetVideoOutputMode()
1926 printf("video idx = 0x%X, color depth = 0x%X\r\n", idx, cd_val); in MHal_HDMITx_SetVideoOutputMode()
1938 if (HDMITxVideoModeTbl[idx].i_p_mode == E_HDMITX_VIDEO_INTERLACE_MODE) in MHal_HDMITx_SetVideoOutputMode()
1945 if(idx == E_HDMITX_RES_720x480i) in MHal_HDMITx_SetVideoOutputMode()
1949 …_PHY_REG_BASE, REG_HDMITxPHY_CONFIG_15, 0x7000, HDMITxVideo_OTMDS_ODATA_Ratio[ucCDIdx][idx] << 12); in MHal_HDMITx_SetVideoOutputMode()
1951 else if(idx == E_HDMITX_RES_720x576i) in MHal_HDMITx_SetVideoOutputMode()
1955 …_PHY_REG_BASE, REG_HDMITxPHY_CONFIG_15, 0x7000, HDMITxVideo_OTMDS_ODATA_Ratio[ucCDIdx][idx] << 12); in MHal_HDMITx_SetVideoOutputMode()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/
H A DhalHDMITx.c984 MS_U16 MHal_HDMITX_GetM02Bytes(MS_U16 idx) in MHal_HDMITX_GetM02Bytes() argument
986 return (MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MI_0C + idx)); in MHal_HDMITX_GetM02Bytes()
1999 void MHal_HDMITx_SetVideoOutputMode(MsHDMITX_VIDEO_TIMING idx, MS_BOOL bflag, MsHDMITX_VIDEO_COLORD… in MHal_HDMITx_SetVideoOutputMode() argument
2009 MsHDMITX_VIDEO_TIMING eSize_idx = idx; in MHal_HDMITx_SetVideoOutputMode()
2013 printf("video idx = 0x%X, color depth = 0x%X\r\n", idx, cd_val); in MHal_HDMITx_SetVideoOutputMode()
2025 if (HDMITxVideoModeTbl[idx].i_p_mode == E_HDMITX_VIDEO_INTERLACE_MODE) in MHal_HDMITx_SetVideoOutputMode()
2032 if(idx == E_HDMITX_RES_720x480i) in MHal_HDMITx_SetVideoOutputMode()
2036 …_PHY_REG_BASE, REG_HDMITxPHY_CONFIG_15, 0x7000, HDMITxVideo_OTMDS_ODATA_Ratio[ucCDIdx][idx] << 12); in MHal_HDMITx_SetVideoOutputMode()
2038 else if(idx == E_HDMITX_RES_720x576i) in MHal_HDMITx_SetVideoOutputMode()
2042 …_PHY_REG_BASE, REG_HDMITxPHY_CONFIG_15, 0x7000, HDMITxVideo_OTMDS_ODATA_Ratio[ucCDIdx][idx] << 12); in MHal_HDMITx_SetVideoOutputMode()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/
H A DhalHDMITx.c795 MS_U16 MHal_HDMITX_GetM02Bytes(MS_U16 idx) in MHal_HDMITX_GetM02Bytes() argument
797 return (MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MI_0C + idx)); in MHal_HDMITX_GetM02Bytes()
1801 void MHal_HDMITx_SetVideoOutputMode(MsHDMITX_VIDEO_TIMING idx, MS_BOOL bflag, MsHDMITX_VIDEO_COLORD… in MHal_HDMITx_SetVideoOutputMode() argument
1813 printf("video idx = 0x%X, color depth = 0x%X\r\n", idx, cd_val); in MHal_HDMITx_SetVideoOutputMode()
1820 if (HDMITxVideoModeTbl[idx].i_p_mode == E_HDMITX_VIDEO_INTERLACE_MODE) in MHal_HDMITx_SetVideoOutputMode()
1838 (idx == E_HDMITX_RES_3840x2160p_60Hz) || (idx == E_HDMITX_RES_3840x2160p_50Hz) || \ in MHal_HDMITx_SetVideoOutputMode()
1839 (idx == E_HDMITX_RES_4096x2160p_50Hz) || (idx == E_HDMITX_RES_4096x2160p_60Hz) || \ in MHal_HDMITx_SetVideoOutputMode()
1842 (idx == E_HDMITX_RES_1280x1470p_60Hz) || \ in MHal_HDMITx_SetVideoOutputMode()
1843 (idx == E_HDMITX_RES_3840x2160p_24Hz) || \ in MHal_HDMITx_SetVideoOutputMode()
1844 (idx == E_HDMITX_RES_3840x2160p_25Hz) || \ in MHal_HDMITx_SetVideoOutputMode()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_DVBC.c291 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
302 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
305 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
308 ULOGD("DEMOD","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_DVBC.c291 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
302 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
305 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
308 ULOGD("DEMOD","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBC.c292 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
302 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
303 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
305 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
306 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
308 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
309 ULOGD("DEMOD","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
313 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
314 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
319 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_DVBC.c291 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
302 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
305 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
308 ULOGD("DEMOD","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBC.c292 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
302 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
303 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
305 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
306 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
308 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
309 ULOGD("DEMOD","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
313 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
314 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
319 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_DVBC.c291 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
302 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
305 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
308 ULOGD("DEMOD","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_DVBC.c291 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
302 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
305 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
308 ULOGD("DEMOD","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/drv/mjpeg_v3/
H A DdrvMJPEG_EX.c501 MS_U32 idx = 0; in MDrv_MJPEG_SendVPUCommand() local
539 for (idx = 0; idx < u32FrameBuffTotalNum[u8DrvId]-1; idx++) in MDrv_MJPEG_SendVPUCommand()
543 …pShareMem->DispQueue[idx+1].u32LumaAddr = pShareMem->DispQueue[idx].u32LumaAddr + u32FrameBuffUnit… in MDrv_MJPEG_SendVPUCommand()
544 pShareMem->DispQueue[idx+1].u32Status = E_HVD_DISPQ_STATUS_FREE; in MDrv_MJPEG_SendVPUCommand()
586 for (idx = 0; idx < u32FrameBuffTotalNum[u8DrvId]; idx++) in MDrv_MJPEG_SendVPUCommand()
588 if (pShareMem->DispQueue[idx].u32Status == E_HVD_DISPQ_STATUS_FREE) in MDrv_MJPEG_SendVPUCommand()
590 pShareMem->u32MJPEG_NextFrameBuffIdx = idx; in MDrv_MJPEG_SendVPUCommand()
618 for (idx = 0; idx < u32FrameBuffTotalNum[u8DrvId]; idx++) in MDrv_MJPEG_SendVPUCommand()
620 if (pShareMem->DispQueue[idx].u32Status != E_HVD_DISPQ_STATUS_VIEW) in MDrv_MJPEG_SendVPUCommand()
622 pShareMem->DispQueue[idx].u32Status = E_HVD_DISPQ_STATUS_FREE; in MDrv_MJPEG_SendVPUCommand()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_lite/drv/mjpeg_lite/
H A DdrvMJPEG_EX.c418 MS_U32 idx = 0; in MDrv_MJPEG_SendVPUCommand() local
456 for (idx = 0; idx < u32FrameBuffTotalNum[u8DrvId]-1; idx++) in MDrv_MJPEG_SendVPUCommand()
460 …pShareMem->DispQueue[idx+1].u32LumaAddr = pShareMem->DispQueue[idx].u32LumaAddr + u32FrameBuffUnit… in MDrv_MJPEG_SendVPUCommand()
461 pShareMem->DispQueue[idx+1].u32Status = E_HVD_DISPQ_STATUS_FREE; in MDrv_MJPEG_SendVPUCommand()
503 for (idx = 0; idx < u32FrameBuffTotalNum[u8DrvId]; idx++) in MDrv_MJPEG_SendVPUCommand()
505 if (pShareMem->DispQueue[idx].u32Status == E_HVD_DISPQ_STATUS_FREE) in MDrv_MJPEG_SendVPUCommand()
507 pShareMem->u32MJPEG_NextFrameBuffIdx = idx; in MDrv_MJPEG_SendVPUCommand()
535 for (idx = 0; idx < u32FrameBuffTotalNum[u8DrvId]; idx++) in MDrv_MJPEG_SendVPUCommand()
537 if (pShareMem->DispQueue[idx].u32Status != E_HVD_DISPQ_STATUS_VIEW) in MDrv_MJPEG_SendVPUCommand()
539 pShareMem->DispQueue[idx].u32Status = E_HVD_DISPQ_STATUS_FREE; in MDrv_MJPEG_SendVPUCommand()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_DVBC.c291 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
302 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
305 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
308 ULOGD("DEMOD","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/
H A DhalDMD_INTERN_DVBC.c291 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
302 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
305 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
308 printf("%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
313 printf("%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_DVBC.c411 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
421 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
422 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
424 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
425 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
427 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
428 ULOGD("DEMOD","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
432 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
433 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
445 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG_dmd0); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/
H A DhalDMD_INTERN_DVBC.c292 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
302 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
303 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
305 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
306 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
308 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
309 ULOGD("Utopia","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
313 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
314 ULOGD("Utopia","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
319 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/
H A DhalDMD_INTERN_DVBC.c297 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
308 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
310 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
311 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
313 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
314 ULOGD("Utopia","%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
319 ULOGD("Utopia","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
324 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_DVBC.c281 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
291 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
292 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
294 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
295 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
297 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
298 printf("%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
302 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
303 printf("%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
308 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_DVBC.c290 MS_U8 idx = 0, u8RegRead = 0, u8RegWrite = 0, u8Mask = 0; in INTERN_DVBC_DSPReg_Init() local
300 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
301 MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, 0); in INTERN_DVBC_DSPReg_Init()
303 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
304 status &= MDrv_SYS_DMD_VD_MBX_ReadDSPReg(idx, &(u8buffer[idx])); in INTERN_DVBC_DSPReg_Init()
306 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
307 printf("%x ", u8buffer[idx]); in INTERN_DVBC_DSPReg_Init()
311 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
312 printf("%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init()
317 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init()
[all …]

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