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Searched refs:_HAL_REG16_R (Results 1 – 25 of 55) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tso/
H A DhalTSO.c333 static MS_U16 _HAL_REG16_R(REG16 *reg) in _HAL_REG16_R() function
372 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
374 u32tmp = ((MS_U32)_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_RDATA))) & 0xFFFFUL; // get read value in HAL_TSO_REG32_IndR()
388 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
420 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
421 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT… in HAL_TSO_Init()
428 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ_RX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ_RX_CFG)) & ~TSO_SVQ_… in HAL_TSO_Init()
431 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ1_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ1_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
432 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ5_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ5_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
433 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ6_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ6_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tso/
H A DhalTSO.c342 static MS_U16 _HAL_REG16_R(REG16 *reg) in _HAL_REG16_R() function
381 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
383 u32tmp = ((MS_U32)_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_RDATA))) & 0xFFFFUL; // get read value in HAL_TSO_REG32_IndR()
397 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
429 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
430 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT… in HAL_TSO_Init()
437 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ_RX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ_RX_CFG)) & ~TSO_SVQ_… in HAL_TSO_Init()
440 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ1_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ1_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
441 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ5_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ5_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
442 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ6_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ6_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tso/
H A DhalTSO.c342 static MS_U16 _HAL_REG16_R(REG16 *reg) in _HAL_REG16_R() function
381 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
383 u32tmp = ((MS_U32)_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_RDATA))) & 0xFFFFUL; // get read value in HAL_TSO_REG32_IndR()
397 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
429 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
430 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT… in HAL_TSO_Init()
437 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ_RX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ_RX_CFG)) & ~TSO_SVQ_… in HAL_TSO_Init()
440 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ1_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ1_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
441 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ5_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ5_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
442 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ6_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ6_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/
H A DhalTSO.c333 static MS_U16 _HAL_REG16_R(REG16 *reg) in _HAL_REG16_R() function
372 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
374 u32tmp = ((MS_U32)_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_RDATA))) & 0xFFFFUL; // get read value in HAL_TSO_REG32_IndR()
388 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
420 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
421 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT… in HAL_TSO_Init()
428 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ_RX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ_RX_CFG)) & ~TSO_SVQ_… in HAL_TSO_Init()
431 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ1_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ1_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
432 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ5_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ5_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
433 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ6_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ6_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/fq/
H A DhalFQ.c120 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R() function
166 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
170 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
175 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
182 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fig_config3), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fig_config… in HAL_FQ_Read_Enable()
186 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fig_config3), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fig_config… in HAL_FQ_Read_Enable()
197 …FQ16_W(Reg, _CLR_(_HAL_REG16_R(Reg), FIG_CFGB_READ_BURST_LEN_MASK) | (u16BurstLen << FIG_CFGB_READ… in HAL_FQ_BurstLen()
202 …FQ16_W(Reg, _CLR_(_HAL_REG16_R(Reg), FIQ_CFG0_BURST_LEN_MASK) | (u16BurstLen << FIQ_CFG0_BURST_LEN… in HAL_FQ_BurstLen()
208 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tso/
H A DhalTSO.c270 static MS_U16 _HAL_REG16_R(REG16 *reg) in _HAL_REG16_R() function
307 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
309 u32tmp = ((MS_U32)_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_RDATA))) & 0xFFFFUL; // get read value in HAL_TSO_REG32_IndR()
323 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
358 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ_RX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ_RX_CFG)) & ~TSO_SVQ_… in HAL_TSO_Init()
361 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ1_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ1_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
362 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ5_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ5_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
376 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), _HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)) & ~TSO_SW_RSTZ_DISABLE); in HAL_TSO_Reset()
377 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), _HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)) | TSO_SW_RSTZ_DISABLE); in HAL_TSO_Reset()
382 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)) | u16RstItem)); in HAL_TSO_Reset_SubItem()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tso/
H A DhalTSO.c326 static MS_U16 _HAL_REG16_R(REG16 *reg) in _HAL_REG16_R() function
363 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
365 u32tmp = ((MS_U32)_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_RDATA))) & 0xFFFFUL; // get read value in HAL_TSO_REG32_IndR()
379 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
415 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ_RX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ_RX_CFG)) & ~TSO_SVQ_… in HAL_TSO_Init()
418 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ1_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ1_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
419 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ5_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ5_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
420 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ6_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ6_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
435 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), _HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)) & ~TSO_SW_RSTZ_DISABLE); in HAL_TSO_Reset()
436 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), _HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)) | TSO_SW_RSTZ_DISABLE); in HAL_TSO_Reset()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tso/
H A DhalTSO.c286 static MS_U16 _HAL_REG16_R(REG16 *reg) in _HAL_REG16_R() function
324 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
326 u32tmp = ((MS_U32)_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_RDATA))) & 0xFFFFUL; // get read value in HAL_TSO_REG32_IndR()
340 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
375 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ_RX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ_RX_CFG)) & ~TSO_SVQ_… in HAL_TSO_Init()
378 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ1_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ1_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
379 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ5_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ5_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
382 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG4), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG4)), TSO_TIMESTAMP_R… in HAL_TSO_Init()
397 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), _HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)) & ~TSO_SW_RSTZ_DISABLE); in HAL_TSO_Reset()
398 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), _HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)) | TSO_SW_RSTZ_DISABLE); in HAL_TSO_Reset()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tso/
H A DhalTSO.c334 static MS_U16 _HAL_REG16_R(REG16 *reg) in _HAL_REG16_R() function
371 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
373 u32tmp = ((MS_U32)_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_RDATA))) & 0xFFFFUL; // get read value in HAL_TSO_REG32_IndR()
387 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
423 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ_RX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ_RX_CFG)) & ~TSO_SVQ_… in HAL_TSO_Init()
426 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ1_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ1_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
427 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ5_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ5_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
428 …_HAL_REG16_W(&(_TSOCtrl1->TSO_SVQ6_TX_CFG), (_HAL_REG16_R(&(_TSOCtrl1->TSO_SVQ6_TX_CFG)) & ~TSO_SV… in HAL_TSO_Init()
443 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), _HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)) & ~TSO_SW_RSTZ_DISABLE); in HAL_TSO_Reset()
444 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), _HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)) | TSO_SW_RSTZ_DISABLE); in HAL_TSO_Reset()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c93 #define _REG16_SET(reg, value); _HAL_REG16_W(reg, SET_FLAG1(_HAL_REG16_R(reg), value));
95 #define _REG16_CLR(reg, value); _HAL_REG16_W(reg, RESET_FLAG1(_HAL_REG16_R(reg), value));
216 static MS_U16 _HAL_REG16_R(REG16_TSO *reg) in _HAL_REG16_R() function
268 … _HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) | u16RstItem)); in HAL_TSO_Reset_SubItem()
269 …_HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) & ~u16RstItem)); in HAL_TSO_Reset_SubItem()
275 MS_U16 u16data = _HAL_REG16_R(reg); in HAL_TSO_HWInt_Enable()
291 _HAL_REG16_W(reg, (_HAL_REG16_R(reg) & ~u16Int)); in HAL_TSO_HWInt_Clear()
298 return (_HAL_REG16_R(reg) & TSO_INT_STS_MASK); in HAL_TSO_HWInt_Status()
450 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
451 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DhalTSO.c93 #define _REG16_SET(reg, value); _HAL_REG16_W(reg, SET_FLAG1(_HAL_REG16_R(reg), value));
95 #define _REG16_CLR(reg, value); _HAL_REG16_W(reg, RESET_FLAG1(_HAL_REG16_R(reg), value));
216 static MS_U16 _HAL_REG16_R(REG16_TSO *reg) in _HAL_REG16_R() function
270 … _HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) | u16RstItem)); in HAL_TSO_Reset_SubItem()
271 …_HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) & ~u16RstItem)); in HAL_TSO_Reset_SubItem()
277 MS_U16 u16data = _HAL_REG16_R(reg); in HAL_TSO_HWInt_Enable()
293 _HAL_REG16_W(reg, (_HAL_REG16_R(reg) & ~u16Int)); in HAL_TSO_HWInt_Clear()
300 return (_HAL_REG16_R(reg) & TSO_INT_STS_MASK); in HAL_TSO_HWInt_Status()
452 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
453 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/mmfi/
H A DhalMMFilein.c141 static MS_U16 _HAL_REG16_R(REG16_MM *reg) in _HAL_REG16_R() function
212 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) | u16ctrl); in HAL_MMFI_Set_Filein_Ctrl()
216 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~u16ctrl… in HAL_MMFI_Set_Filein_Ctrl()
222 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & MMFI_FILEIN_CTRL_MASK); in HAL_MMFI_Get_Filein_Ctrl()
227 …_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) | MMFI_CFG2_FILEIN_P… in HAL_MMFI_Filein_Pause()
234 …_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) & ~MMFI_CFG2_FILEIN_… in HAL_MMFI_Filein_Resume()
241 …MS_U16 u16data = (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~MMFI_FILEIN_TIMER_MASK) | ((MS_U1… in HAL_MMFI_Set_FileinTimer()
258 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_WRCNT_MASK); in HAL_MMFI_CmdQ_FIFO_Get_WRCnt()
263 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_FULL); in HAL_MMFI_CmdQ_FIFO_IsFull()
268 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_EMPTY); in HAL_MMFI_CmdQ_FIFO_IsEmpty()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/mmfi/
H A DhalMMFilein.c141 static MS_U16 _HAL_REG16_R(REG16_MM *reg) in _HAL_REG16_R() function
212 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) | u16ctrl); in HAL_MMFI_Set_Filein_Ctrl()
216 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~u16ctrl… in HAL_MMFI_Set_Filein_Ctrl()
222 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & MMFI_FILEIN_CTRL_MASK); in HAL_MMFI_Get_Filein_Ctrl()
227 …_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) | MMFI_CFG2_FILEIN_P… in HAL_MMFI_Filein_Pause()
234 …_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) & ~MMFI_CFG2_FILEIN_… in HAL_MMFI_Filein_Resume()
241 …MS_U16 u16data = (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~MMFI_FILEIN_TIMER_MASK) | ((MS_U1… in HAL_MMFI_Set_FileinTimer()
258 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_WRCNT_MASK); in HAL_MMFI_CmdQ_FIFO_Get_WRCnt()
263 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_FULL); in HAL_MMFI_CmdQ_FIFO_IsFull()
268 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_EMPTY); in HAL_MMFI_CmdQ_FIFO_IsEmpty()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsio/
H A DhalTSIO.c72 #define _REG16_SET(reg, value); _HAL_REG16_W(reg, SET_FLAG1(_HAL_REG16_R(reg), value));
74 #define _REG16_CLR(reg, value); _HAL_REG16_W(reg, RESET_FLAG1(_HAL_REG16_R(reg), value));
76 #define _REG16_SET_MASK(reg, value, mask, shift); _HAL_REG16_W(reg, (_HAL_REG16_R(reg)& ~mask) | ((…
460 static MS_U16 _HAL_REG16_R(REG16_TSIO *reg) in _HAL_REG16_R() function
628 u16SvidBypassSMCEnableBit[0] = _HAL_REG16_R(&(_TSIOCtrl3->TSIO_SVID_BYPASS_SMC_EN[0])); in HAL_TSIO_SIDBypassSMCMergeEnable()
629 u16SvidBypassSMCEnableBit[1] = _HAL_REG16_R(&(_TSIOCtrl3->TSIO_SVID_BYPASS_SMC_EN[1])); in HAL_TSIO_SIDBypassSMCMergeEnable()
630 u16SvidBypassSMCEnableBit[2] = _HAL_REG16_R(&(_TSIOCtrl3->TSIO_SVID_BYPASS_SMC_EN[2])); in HAL_TSIO_SIDBypassSMCMergeEnable()
631 u16SvidBypassSMCEnableBit[3] = _HAL_REG16_R(&(_TSIOCtrl3->TSIO_SVID_BYPASS_SMC_EN[3])); in HAL_TSIO_SIDBypassSMCMergeEnable()
797 MS_U64 VC_INT = (MS_U64)_HAL_REG16_R(&(_TSOCtrl3->SGDMA_IN_VC_INT[0]))+ in HAL_TSIO_SGDMAIN_IntRead()
798 ((MS_U64)_HAL_REG16_R(&(_TSOCtrl3->SGDMA_IN_VC_INT[1])) << 16)+ in HAL_TSIO_SGDMAIN_IntRead()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsio/
H A DhalTSIO.c72 #define _REG16_SET(reg, value); _HAL_REG16_W(reg, SET_FLAG1(_HAL_REG16_R(reg), value));
74 #define _REG16_CLR(reg, value); _HAL_REG16_W(reg, RESET_FLAG1(_HAL_REG16_R(reg), value));
76 #define _REG16_SET_MASK(reg, value, mask, shift); _HAL_REG16_W(reg, (_HAL_REG16_R(reg)& ~mask) | ((…
460 static MS_U16 _HAL_REG16_R(REG16_TSIO *reg) in _HAL_REG16_R() function
628 u16SvidBypassSMCEnableBit[0] = _HAL_REG16_R(&(_TSIOCtrl3->TSIO_SVID_BYPASS_SMC_EN[0])); in HAL_TSIO_SIDBypassSMCMergeEnable()
629 u16SvidBypassSMCEnableBit[1] = _HAL_REG16_R(&(_TSIOCtrl3->TSIO_SVID_BYPASS_SMC_EN[1])); in HAL_TSIO_SIDBypassSMCMergeEnable()
630 u16SvidBypassSMCEnableBit[2] = _HAL_REG16_R(&(_TSIOCtrl3->TSIO_SVID_BYPASS_SMC_EN[2])); in HAL_TSIO_SIDBypassSMCMergeEnable()
631 u16SvidBypassSMCEnableBit[3] = _HAL_REG16_R(&(_TSIOCtrl3->TSIO_SVID_BYPASS_SMC_EN[3])); in HAL_TSIO_SIDBypassSMCMergeEnable()
797 MS_U64 VC_INT = (MS_U64)_HAL_REG16_R(&(_TSOCtrl3->SGDMA_IN_VC_INT[0]))+ in HAL_TSIO_SGDMAIN_IntRead()
798 ((MS_U64)_HAL_REG16_R(&(_TSOCtrl3->SGDMA_IN_VC_INT[1])) << 16)+ in HAL_TSIO_SGDMAIN_IntRead()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c93 #define _REG16_SET(reg, value); _HAL_REG16_W(reg, SET_FLAG1(_HAL_REG16_R(reg), value));
95 #define _REG16_CLR(reg, value); _HAL_REG16_W(reg, RESET_FLAG1(_HAL_REG16_R(reg), value));
216 static MS_U16 _HAL_REG16_R(REG16_TSO *reg) in _HAL_REG16_R() function
270 … _HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) | u16RstItem)); in HAL_TSO_Reset_SubItem()
271 …_HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) & ~u16RstItem)); in HAL_TSO_Reset_SubItem()
277 MS_U16 u16data = _HAL_REG16_R(reg); in HAL_TSO_HWInt_Enable()
293 _HAL_REG16_W(reg, (_HAL_REG16_R(reg) & ~u16Int)); in HAL_TSO_HWInt_Clear()
300 return (_HAL_REG16_R(reg) & TSO_INT_STS_MASK); in HAL_TSO_HWInt_Status()
449 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
450 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c93 #define _REG16_SET(reg, value); _HAL_REG16_W(reg, SET_FLAG1(_HAL_REG16_R(reg), value));
95 #define _REG16_CLR(reg, value); _HAL_REG16_W(reg, RESET_FLAG1(_HAL_REG16_R(reg), value));
216 static MS_U16 _HAL_REG16_R(REG16_TSO *reg) in _HAL_REG16_R() function
270 … _HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) | u16RstItem)); in HAL_TSO_Reset_SubItem()
271 …_HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) & ~u16RstItem)); in HAL_TSO_Reset_SubItem()
277 MS_U16 u16data = _HAL_REG16_R(reg); in HAL_TSO_HWInt_Enable()
293 _HAL_REG16_W(reg, (_HAL_REG16_R(reg) & ~u16Int)); in HAL_TSO_HWInt_Clear()
300 return (_HAL_REG16_R(reg) & TSO_INT_STS_MASK); in HAL_TSO_HWInt_Status()
449 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
450 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c94 #define _REG16_SET(reg, value); _HAL_REG16_W(reg, SET_FLAG1(_HAL_REG16_R(reg), value));
96 #define _REG16_CLR(reg, value); _HAL_REG16_W(reg, RESET_FLAG1(_HAL_REG16_R(reg), value));
217 static MS_U16 _HAL_REG16_R(REG16_TSO *reg) in _HAL_REG16_R() function
271 … _HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) | u16RstItem)); in HAL_TSO_Reset_SubItem()
272 …_HAL_REG16_W(&(_TSOCtrl[u8Eng].SW_RSTZ), (_HAL_REG16_R(&(_TSOCtrl[u8Eng].SW_RSTZ)) & ~u16RstItem)); in HAL_TSO_Reset_SubItem()
278 MS_U16 u16data = _HAL_REG16_R(reg); in HAL_TSO_HWInt_Enable()
294 _HAL_REG16_W(reg, (_HAL_REG16_R(reg) & ~u16Int)); in HAL_TSO_HWInt_Clear()
301 return (_HAL_REG16_R(reg) & TSO_INT_STS_MASK); in HAL_TSO_HWInt_Status()
453 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
454 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/mmfi/
H A DhalMMFilein.c141 static MS_U16 _HAL_REG16_R(REG16_MM *reg) in _HAL_REG16_R() function
212 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) | u16ctrl); in HAL_MMFI_Set_Filein_Ctrl()
216 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~u16ctrl… in HAL_MMFI_Set_Filein_Ctrl()
222 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & MMFI_FILEIN_CTRL_MASK); in HAL_MMFI_Get_Filein_Ctrl()
227 …_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) | MMFI_CFG2_FILEIN_P… in HAL_MMFI_Filein_Pause()
234 …_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) & ~MMFI_CFG2_FILEIN_… in HAL_MMFI_Filein_Resume()
241 …MS_U16 u16data = (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~MMFI_FILEIN_TIMER_MASK) | ((MS_U1… in HAL_MMFI_Set_FileinTimer()
258 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_WRCNT_MASK); in HAL_MMFI_CmdQ_FIFO_Get_WRCnt()
263 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_FULL); in HAL_MMFI_CmdQ_FIFO_IsFull()
268 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_EMPTY); in HAL_MMFI_CmdQ_FIFO_IsEmpty()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/mmfi/
H A DhalMMFilein.c141 static MS_U16 _HAL_REG16_R(REG16_MM *reg) in _HAL_REG16_R() function
206 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) | u16ctrl); in HAL_MMFI_Set_Filein_Ctrl()
210 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~u16ctrl… in HAL_MMFI_Set_Filein_Ctrl()
216 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & MMFI_FILEIN_CTRL_MASK); in HAL_MMFI_Get_Filein_Ctrl()
221 …_HAL_REG16_W(&(_MFCtrl[u8Eng].CFG2), _HAL_REG16_R(&(_MFCtrl[u8Eng].CFG2)) | MMFI_CFG2_FILEIN_PAUSE… in HAL_MMFI_Filein_Pause()
228 …_HAL_REG16_W(&(_MFCtrl[u8Eng].CFG2), _HAL_REG16_R(&(_MFCtrl[u8Eng].CFG2)) & ~MMFI_CFG2_FILEIN_PAUS… in HAL_MMFI_Filein_Resume()
235 …MS_U16 u16data = (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Timer)) & ~MMFI_FILEIN_TIMER_MASK) | ((MS_U… in HAL_MMFI_Set_FileinTimer()
252 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_WRCNT_MASK); in HAL_MMFI_CmdQ_FIFO_Get_WRCnt()
257 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_FULL); in HAL_MMFI_CmdQ_FIFO_IsFull()
262 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_EMPTY); in HAL_MMFI_CmdQ_FIFO_IsEmpty()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/mmfi/
H A DhalMMFilein.c140 static MS_U16 _HAL_REG16_R(REG16_MM *reg) in _HAL_REG16_R() function
201 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) | u16ctrl); in HAL_MMFI_Set_Filein_Ctrl()
205 …_HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~u16ctrl… in HAL_MMFI_Set_Filein_Ctrl()
211 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & MMFI_FILEIN_CTRL_MASK); in HAL_MMFI_Get_Filein_Ctrl()
216 …_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) | MMFI_CFG2_FILEIN_P… in HAL_MMFI_Filein_Pause()
223 …_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) & ~MMFI_CFG2_FILEIN_… in HAL_MMFI_Filein_Resume()
230 …MS_U16 u16data = (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~MMFI_FILEIN_TIMER_MASK) | ((MS_U1… in HAL_MMFI_Set_FileinTimer()
247 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_WRCNT_MASK); in HAL_MMFI_CmdQ_FIFO_Get_WRCnt()
252 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_FULL); in HAL_MMFI_CmdQ_FIFO_IsFull()
257 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_EMPTY); in HAL_MMFI_CmdQ_FIFO_IsEmpty()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/fq/
H A DhalFQ.c121 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R() function
167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
168 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
171 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
176 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
182 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
189 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
193 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
201 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/fq/
H A DhalFQ.c120 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R() function
166 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
170 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
175 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
180 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
188 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
192 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
200 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/fq/
H A DhalFQ.c120 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R() function
166 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
170 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
175 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
180 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
188 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
192 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
200 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/fq/
H A DhalFQ.c126 static MS_U16 _HAL_REG16_R(REG16_FQ *reg) in _HAL_REG16_R() function
189 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
190 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
193 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
198 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
203 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
204 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
211 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
215 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
223 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
[all …]

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