xref: /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/mmfi/halMMFilein.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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94 
95 ////////////////////////////////////////////////////////////////////////////////////////////////////
96 // file   halMMFilein.c
97 // @brief  Multimedia File In (MMFILEIN) HAL
98 // @author MStar Semiconductor,Inc.
99 ////////////////////////////////////////////////////////////////////////////////////////////////////
100 #include "MsCommon.h"
101 #include "regMMFilein.h"
102 #include "halMMFilein.h"
103 
104 //--------------------------------------------------------------------------------------------------
105 //  Driver Compiler Option
106 //--------------------------------------------------------------------------------------------------
107 #define MIU_BUS                     4
108 
109 //--------------------------------------------------------------------------------------------------
110 //  TSP Hardware Abstraction Layer
111 //--------------------------------------------------------------------------------------------------
112 static REG_Ctrl_MMFI*  _MFCtrl= NULL;
113 static REG_Ctrl_MMFI1* _MFCtrl1= NULL;
114 
115 
116 static MS_VIRT   _u32MMFIRegBase = 0;
117 
118 //[NOTE] Jerry
119 // Some register has write order, for example, writing PCR_L will disable PCR counter
120 // writing PCR_M trigger nothing, writing PCR_H will enable PCR counter
121 #define _HAL_REG32_W(reg, value)    do { (reg)->L = ((value) & 0x0000FFFF);                          \
122                                     (reg)->H = ((value) >> 16); } while(0)
123 
124 #define _HAL_REG16_W(reg, value)    do { (reg)->data = (MS_U16)((value) & 0xFFFF);} while(0)
125 //--------------------------------------------------------------------------------------------------
126 //  Macro of bit operations
127 //--------------------------------------------------------------------------------------------------
128 
129 //--------------------------------------------------------------------------------------------------
130 //  Implementation
131 //--------------------------------------------------------------------------------------------------
_HAL_REG32_R(REG32_MM * reg)132 static MS_U32 _HAL_REG32_R(REG32_MM *reg)
133 {
134     MS_U32     value = 0;
135     value  = (reg)->H << 16;
136     value |= (reg)->L;
137     return value;
138 }
139 
_HAL_REG16_R(REG16_MM * reg)140 static MS_U16 _HAL_REG16_R(REG16_MM *reg)
141 {
142     MS_U16              value = 0;
143     value = (reg)->data;
144     return value;
145 }
146 
HAL_MMFI_SetBank(MS_VIRT u32BankAddr)147 void HAL_MMFI_SetBank(MS_VIRT u32BankAddr)
148 {
149     _u32MMFIRegBase = u32BankAddr;
150     _MFCtrl = (REG_Ctrl_MMFI*)(_u32MMFIRegBase + REG_CTRL_BASE_MMFI0);
151     _MFCtrl1 = (REG_Ctrl_MMFI1*)(_u32MMFIRegBase + REG_CTRL_BASE_MMFI1);
152 }
153 
154 // ------------------------------------------------------
155 //   APIs
156 //-------------------------------------------------------
HAL_MMFI_PidFlt_Set(MS_U8 u8Eng,MS_U8 u8Idx,MS_U16 u16PID,MS_U32 u32entype)157 void HAL_MMFI_PidFlt_Set(MS_U8 u8Eng, MS_U8 u8Idx, MS_U16 u16PID, MS_U32 u32entype)
158 {
159     _HAL_REG32_W(&(_MFCtrl[u8Eng].PidFlt[u8Idx]), (MS_U32)u16PID | u32entype);
160 }
161 
HAL_MMFI_PidFlt_SetPid(MS_U8 u8Eng,MS_U8 u8Idx,MS_U16 u16PID)162 void HAL_MMFI_PidFlt_SetPid(MS_U8 u8Eng, MS_U8 u8Idx, MS_U16 u16PID)
163 {
164     MS_U32 u32data;
165 
166     u32data = (_HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_PID_MASK) | (MS_U32)u16PID;
167     _HAL_REG32_W(&(_MFCtrl[u8Eng].PidFlt[u8Idx]), u32data);
168 }
169 
HAL_MMFI_PidFlt_Enable(MS_U8 u8Eng,MS_U8 u8Idx,MS_U32 u32entype,MS_BOOL benable)170 void HAL_MMFI_PidFlt_Enable(MS_U8 u8Eng, MS_U8 u8Idx, MS_U32 u32entype, MS_BOOL benable)
171 {
172     MS_U32 u32data;
173 
174     u32data = _HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_EN_MASK;
175 
176     if(benable)
177         u32data |= u32entype;
178 
179     _HAL_REG32_W(&(_MFCtrl[u8Eng].PidFlt[u8Idx]), u32data);
180 }
181 
HAL_MMFI_PidFlt_Reset(MS_U8 u8Eng,MS_U8 u8Idx)182 void HAL_MMFI_PidFlt_Reset(MS_U8 u8Eng, MS_U8 u8Idx)
183 {
184     _HAL_REG32_W(&(_MFCtrl[u8Eng].PidFlt[u8Idx]), MMFI_PID_NULL);
185 }
186 
HAL_MMFI_Set_Filein_ReadAddr(MS_U8 u8Eng,MS_U32 u32Addr)187 void HAL_MMFI_Set_Filein_ReadAddr(MS_U8 u8Eng, MS_U32 u32Addr)
188 {
189     _HAL_REG32_W(&(_MFCtrl[u8Eng].FileIn_RAddr), u32Addr);
190 }
191 
HAL_MMFI_Set_Filein_ReadLen(MS_U8 u8Eng,MS_U32 u32len)192 void HAL_MMFI_Set_Filein_ReadLen(MS_U8 u8Eng, MS_U32 u32len)
193 {
194     _HAL_REG32_W(&(_MFCtrl[u8Eng].FileIn_RNum), u32len);
195 }
196 
HAL_MMFI_Set_Filein_Ctrl(MS_U8 u8Eng,MS_U16 u16ctrl,MS_BOOL bEnable)197 void HAL_MMFI_Set_Filein_Ctrl(MS_U8 u8Eng, MS_U16 u16ctrl, MS_BOOL bEnable)
198 {
199     if(bEnable)
200     {
201         _HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) | u16ctrl);
202     }
203     else
204     {
205         _HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~u16ctrl);
206     }
207 }
208 
HAL_MMFI_Get_Filein_Ctrl(MS_U8 u8Eng)209 MS_U16 HAL_MMFI_Get_Filein_Ctrl(MS_U8 u8Eng)
210 {
211     return (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & MMFI_FILEIN_CTRL_MASK);
212 }
213 
HAL_MMFI_Filein_Pause(MS_U8 u8Eng)214 MS_BOOL HAL_MMFI_Filein_Pause(MS_U8 u8Eng)
215 {
216 	_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) | MMFI_CFG2_FILEIN_PAUSE);
217 
218 	return TRUE;
219 }
220 
HAL_MMFI_Filein_Resume(MS_U8 u8Eng)221 MS_BOOL HAL_MMFI_Filein_Resume(MS_U8 u8Eng)
222 {
223 	_HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) & ~MMFI_CFG2_FILEIN_PAUSE);
224 
225 	return TRUE;
226 }
227 
HAL_MMFI_Set_FileinTimer(MS_U8 u8Eng,MS_U8 u8timer)228 void HAL_MMFI_Set_FileinTimer(MS_U8 u8Eng, MS_U8 u8timer)
229 {
230     MS_U16 u16data = (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~MMFI_FILEIN_TIMER_MASK) | ((MS_U16)(u8timer&0xFF) << MMFI_FILEIN_TIMER_SHIFT);
231     _HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), u16data);
232 }
233 
HAL_MMFI_Get_Filein_WriteAddr(MS_U8 u8Eng)234 MS_U32 HAL_MMFI_Get_Filein_WriteAddr(MS_U8 u8Eng)
235 {
236     MS_U32 u32addr = 0;
237 
238     HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_RADDR_READ, FALSE);
239     u32addr = _HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr));
240     HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_RADDR_READ, TRUE);
241 
242     return u32addr;
243 }
244 
HAL_MMFI_CmdQ_FIFO_Get_WRCnt(MS_U8 u8Eng)245 MS_U16 HAL_MMFI_CmdQ_FIFO_Get_WRCnt(MS_U8 u8Eng)
246 {
247     return (_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_WRCNT_MASK);
248 }
249 
HAL_MMFI_CmdQ_FIFO_IsFull(MS_U8 u8Eng)250 MS_BOOL HAL_MMFI_CmdQ_FIFO_IsFull(MS_U8 u8Eng)
251 {
252     return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_FULL);
253 }
254 
HAL_MMFI_CmdQ_FIFO_IsEmpty(MS_U8 u8Eng)255 MS_BOOL HAL_MMFI_CmdQ_FIFO_IsEmpty(MS_U8 u8Eng)
256 {
257     return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_EMPTY);
258 }
259 
HAL_MMFI_CmdQ_FIFO_Get_WRLevel(MS_U8 u8Eng)260 MS_U16 HAL_MMFI_CmdQ_FIFO_Get_WRLevel(MS_U8 u8Eng)
261 {
262     return ((_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_WRLEVEL_MASK) >> MMFI_CMDQSTS_FIFO_WRLEVEL_SHIFT);
263 }
264 
HAL_MMFI_Cfg_Enable(MS_U8 u8Eng,MS_U32 u32CfgItem,MS_BOOL benable)265 void HAL_MMFI_Cfg_Enable(MS_U8 u8Eng, MS_U32 u32CfgItem, MS_BOOL benable)
266 {
267     if(benable)
268     {
269         _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem));
270     }
271     else
272     {
273         _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem));
274     }
275 }
276 
HAL_MMFI_Cfg_Set(MS_U8 u8Eng,MS_U32 u32CfglItem)277 void HAL_MMFI_Cfg_Set(MS_U8 u8Eng, MS_U32 u32CfglItem)
278 {
279     _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), u32CfglItem);
280 }
281 
HAL_MMFI_Cfg_Get(MS_U8 u8Eng)282 MS_U32 HAL_MMFI_Cfg_Get(MS_U8 u8Eng)
283 {
284     return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)));
285 }
286 
HAL_MMFI_Cfg2_Enable(MS_U8 u8Eng,MS_U16 u16CfgItem,MS_BOOL benable)287 void HAL_MMFI_Cfg2_Enable(MS_U8 u8Eng, MS_U16 u16CfgItem, MS_BOOL benable)
288 {
289     if(benable)
290     {
291         _HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), (_HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) | u16CfgItem));
292     }
293     else
294     {
295         _HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), (_HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) & ~u16CfgItem));
296     }
297 }
298 
HAL_MMFI_Cfg2_Set(MS_U8 u8Eng,MS_U16 u16CfglItem)299 void HAL_MMFI_Cfg2_Set(MS_U8 u8Eng, MS_U16 u16CfglItem)
300 {
301     _HAL_REG16_W(&(_MFCtrl1->CFG2[u8Eng]), u16CfglItem);
302 }
303 
HAL_MMFI_Cfg2_Get(MS_U8 u8Eng)304 MS_U16 HAL_MMFI_Cfg2_Get(MS_U8 u8Eng)
305 {
306     return (_HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])));
307 }
308 
HAL_MMFI_Get_TsHeaderInfo(MS_U8 u8Eng,MS_U32 * pu32header)309 void HAL_MMFI_Get_TsHeaderInfo(MS_U8 u8Eng, MS_U32 *pu32header)
310 {
311     *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader));
312 }
313 
HAL_MMFI_Get_APid_Status(MS_U8 u8Eng,MS_U16 * pu16pid,MS_BOOL * pbchanged)314 void HAL_MMFI_Get_APid_Status(MS_U8 u8Eng, MS_U16 *pu16pid, MS_BOOL *pbchanged)
315 {
316     MS_U16 u16temp;
317 
318     u16temp = (MS_U16)_HAL_REG16_R(&(_MFCtrl[u8Eng].APid_Status));
319 
320     *pu16pid = u16temp & MMFI_APID_MATCHED_MASK;
321     *pbchanged = (MS_BOOL)(u16temp & MMFI_APID_CHANGE);
322 }
323 
HAL_MMFI_Get_APidB_Status(MS_U8 u8Eng,MS_U16 * pu16pid,MS_BOOL * pbchanged)324 void HAL_MMFI_Get_APidB_Status(MS_U8 u8Eng, MS_U16 *pu16pid, MS_BOOL *pbchanged)
325 {
326     MS_U16 u16temp;
327 
328     u16temp = _HAL_REG16_R(&(_MFCtrl[u8Eng].APidB_Status));
329 
330     *pu16pid = u16temp & MMFI_APIDB_MATCHED_MASK;
331     *pbchanged = (MS_BOOL)(u16temp & MMFI_APIDB_CHANGE);
332 }
333 
HAL_MMFI_Get_VPid_Status(MS_U8 u8Eng,MS_U16 * pu16pid,MS_BOOL * pbchanged)334 void HAL_MMFI_Get_VPid_Status(MS_U8 u8Eng, MS_U16 *pu16pid, MS_BOOL *pbchanged)
335 {
336     MS_U16 u16temp;
337 
338     u16temp = _HAL_REG16_R(&(_MFCtrl[u8Eng].VPID_Status));
339 
340     *pu16pid = u16temp & MMFI_VPID_MATCHED_MASK;
341     *pbchanged = (MS_BOOL)(u16temp & MMFI_VPID_CHANGE);
342 }
343 
HAL_MMFI_Get_VPid3D_Status(MS_U8 u8Eng,MS_U16 * pu16pid,MS_BOOL * pbchanged)344 void HAL_MMFI_Get_VPid3D_Status(MS_U8 u8Eng, MS_U16 *pu16pid, MS_BOOL *pbchanged)
345 {
346     MS_U16 u16temp;
347 
348     u16temp = _HAL_REG16_R(&(_MFCtrl[u8Eng].VPID3D_Status));
349 
350     *pu16pid = u16temp & MMFI_VPID3D_MATCHED_MASK;
351     *pbchanged = (MS_BOOL)(u16temp & MMFI_VPID3D_CHANGE);
352 }
353 
HAL_MMFI_LPcr2_Set(MS_U8 u8Eng,MS_U32 u32lpcr2)354 void HAL_MMFI_LPcr2_Set(MS_U8 u8Eng, MS_U32 u32lpcr2)
355 {
356     HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_LPCR2_WLD, TRUE);
357     _HAL_REG32_W(&(_MFCtrl[u8Eng].LPcr2_Buf), u32lpcr2);
358     HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_LPCR2_WLD, FALSE);
359 }
360 
HAL_MMFI_LPcr2_Get(MS_U8 u8Eng)361 MS_U32 HAL_MMFI_LPcr2_Get(MS_U8 u8Eng)
362 {
363     MS_U32 u32value;
364 
365     HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_LPCR2_LD, TRUE);
366     u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf));
367     HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_LPCR2_LD, FALSE);
368 
369     return u32value;
370 }
371 
HAL_MMFI_TimeStamp_Get(MS_U8 u8Eng)372 MS_U32 HAL_MMFI_TimeStamp_Get(MS_U8 u8Eng)
373 {
374     return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn));
375 }
376 
HAL_MMFI_PktChkSize_Set(MS_U8 u8Eng,MS_U16 u16size)377 void HAL_MMFI_PktChkSize_Set(MS_U8 u8Eng, MS_U16 u16size)
378 {
379     _HAL_REG16_W(&(_MFCtrl[u8Eng].PktChkSize), (_HAL_REG16_R(&(_MFCtrl[u8Eng].PktChkSize)) & ~MMFI_PKTCHK_SIZE_MASK) | u16size);
380 }
381 
HAL_MMFI_MOBF_Set_FileinKey(MS_U8 u8Eng,MS_U16 u16KeyIndex)382 void HAL_MMFI_MOBF_Set_FileinKey(MS_U8 u8Eng, MS_U16 u16KeyIndex)
383 {
384     _HAL_REG16_W(&(_MFCtrl[u8Eng].MOBFKey), u16KeyIndex);
385 }
386 
HAL_MMFI_MOBF_Enable(MS_U8 u8Eng,MS_BOOL bEnable)387 void HAL_MMFI_MOBF_Enable(MS_U8 u8Eng, MS_BOOL bEnable)
388 {
389     MS_U16 u16data = _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~MMFI_FILEIN_CTRL_MOBF_EN;
390 
391     if(bEnable)
392     {
393         u16data |= MMFI_FILEIN_CTRL_MOBF_EN;
394     }
395 
396     _HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), u16data);
397 }
398 
HAL_MMFI_AU_RemoveDupPkt(MS_U8 u8Eng,MS_BOOL bEnable)399 void HAL_MMFI_AU_RemoveDupPkt(MS_U8 u8Eng, MS_BOOL bEnable)
400 {
401     MS_U32 u32data = _HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~MMFI_CFG_DUP_PKT_SKIP;
402 
403     if(bEnable)
404         u32data |= MMFI_CFG_DUP_PKT_SKIP;
405 
406     _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), u32data);
407 }
408 
409 //
410 // General API
411 //
HAL_MMFI_Reset(void)412 void HAL_MMFI_Reset(void)
413 {
414     _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) &~ MMFI_SW_RSTZ_MMFILEIN_DISABLE));
415     _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) | MMFI_SW_RSTZ_MMFILEIN_DISABLE));
416 }
417 
HAL_MMFI_Reset_SubItem(MS_U16 u16RstItem)418 void HAL_MMFI_Reset_SubItem(MS_U16 u16RstItem)
419 {
420     _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) | u16RstItem));
421     _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) & ~u16RstItem));
422 }
423 
HAL_MMFI_Reset_All(void)424 void HAL_MMFI_Reset_All(void)
425 {
426     MS_U16 u16data = _HAL_REG16_R(&(_MFCtrl[0].SWRst)) & ~MMFI_SWRST_MASK;
427 
428     _HAL_REG16_W(&(_MFCtrl[0].SWRst), u16data | MMFI_RST_ALL);
429     _HAL_REG16_W(&(_MFCtrl[0].SWRst), (u16data & ~MMFI_SWRST_MASK) | MMFI_SW_RSTZ_MMFILEIN_DISABLE);
430 }
431 
HAL_MMFI_HWInt_Enable(MS_BOOL benable,MS_U16 u16init)432 void HAL_MMFI_HWInt_Enable(MS_BOOL benable, MS_U16 u16init)
433 {
434     MS_U16 u16data = _HAL_REG16_R(&(_MFCtrl[0].HWInt)) & ~u16init;
435 
436     if(benable)
437     {
438         _HAL_REG16_W(&(_MFCtrl[0].HWInt), (u16data | u16init));
439     }
440     else
441     {
442         _HAL_REG16_W(&(_MFCtrl[0].HWInt), u16data);
443     }
444 }
445 
HAL_MMFI_HWInt_Clear(MS_U16 u16Int)446 void HAL_MMFI_HWInt_Clear(MS_U16 u16Int)
447 {
448     _HAL_REG16_W(&(_MFCtrl[0].HWInt), (_HAL_REG16_R(&(_MFCtrl[0].HWInt)) & ~u16Int));
449 }
450 
HAL_MMFI_HWInt_Status(void)451 MS_U32 HAL_MMFI_HWInt_Status(void)
452 {
453     return (MS_U32)(_HAL_REG16_R(&(_MFCtrl[0].HWInt)) & MMFI_HWINT_STS_MASK);
454 }
455 
HAL_MMFI_TimeStampClk_Set(MS_U8 u8Eng,MS_U32 u32ClkSrc)456 void HAL_MMFI_TimeStampClk_Set(MS_U8 u8Eng, MS_U32 u32ClkSrc)
457 {
458     MS_U16 u16Mask = (u8Eng)? MMFI_RST_LPCR_27M_EN_MMFI1 : MMFI_RST_LPCR_27M_EN_MMFI0;
459 
460     if(u32ClkSrc == 0x0UL) // 90k
461     {
462         _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) & ~u16Mask));
463     }
464     else                   // 27M
465     {
466         _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) | u16Mask));
467     }
468 }
469 
HAL_MMFI_RVU_Enable(MS_U8 u8Eng,MS_BOOL bEnable)470 MS_BOOL HAL_MMFI_RVU_Enable(MS_U8 u8Eng, MS_BOOL bEnable)
471 {
472     if(bEnable)
473     {
474         _HAL_REG16_W(&(_MFCtrl1->CFG3[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) | MMFI_CFG3_RVU_EN);
475     }
476     else
477     {
478         _HAL_REG16_W(&(_MFCtrl1->CFG3[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG2[u8Eng])) & ~MMFI_CFG3_RVU_EN);
479     }
480 
481     return TRUE;
482 }
483 
HAL_MMFI_RVU_Timestamp_Enable(MS_U8 u8Eng,MS_BOOL bEnable)484 MS_BOOL HAL_MMFI_RVU_Timestamp_Enable(MS_U8 u8Eng, MS_BOOL bEnable)
485 {
486     if(bEnable)
487     {
488         _HAL_REG16_W(&(_MFCtrl1->CFG3[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG3[u8Eng])) | MMFI_CFG3_RVU_TIMESTAMP_EN);
489     }
490     else
491     {
492         _HAL_REG16_W(&(_MFCtrl1->CFG3[u8Eng]), _HAL_REG16_R(&(_MFCtrl1->CFG3[u8Eng])) & ~MMFI_CFG3_RVU_TIMESTAMP_EN);
493     }
494 
495     return TRUE;
496 }
497 
498 // Not implement
HAL_MMFI_SaveRegs(void)499 void HAL_MMFI_SaveRegs(void)
500 {
501 
502 }
503 
504 // Not implement
HAL_MMFI_RestoreRegs(void)505 void HAL_MMFI_RestoreRegs(void)
506 {
507 
508 }