| /utopia/UTPA2-700.0.x/modules/security/hal/maserati/aesdma/ |
| H A D | halAESDMA.c | 133 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
176 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
211 Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
213 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
214 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
215 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
233 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
234 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
235 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
236 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/M7821/aesdma/ |
| H A D | halAESDMA.c | 133 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
176 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
211 Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
213 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
214 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
215 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
233 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
234 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
235 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
236 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/mainz/aesdma/ |
| H A D | halAESDMA.c | 120 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
160 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
190 Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
192 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
193 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
194 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
211 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
212 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
213 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
214 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/messi/aesdma/ |
| H A D | halAESDMA.c | 120 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
160 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
190 Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
192 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
193 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
194 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
211 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
212 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
213 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
214 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/mooney/aesdma/ |
| H A D | halAESDMA.c | 117 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
156 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
185 Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
187 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
188 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
189 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
206 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
207 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
208 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
209 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/maxim/aesdma/ |
| H A D | halAESDMA.c | 117 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
160 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
195 Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
197 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
198 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
199 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
217 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
218 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
219 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
220 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/M7621/aesdma/ |
| H A D | halAESDMA.c | 117 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
160 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
195 Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
197 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
198 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
199 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
217 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
218 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
219 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
220 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/maldives/aesdma/ |
| H A D | halAESDMA.c | 118 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
155 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
183 Reg_AESDMA = (MS_U32)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
185 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
186 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
187 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
204 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
205 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
206 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
207 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/mustang/aesdma/ |
| H A D | halAESDMA.c | 118 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
155 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
183 Reg_AESDMA = (MS_U32)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
185 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
186 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
187 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
204 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
205 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
206 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
207 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/macan/aesdma/ |
| H A D | halAESDMA.c | 119 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
161 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
193 Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
195 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
196 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
197 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
214 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
215 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
216 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
217 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/manhattan/aesdma/ |
| H A D | halAESDMA.c | 117 static REG_AESDMACtrl *_AESDMACtrl = (REG_AESDMACtrl*)REG_AESDMACTRL_BASE; variable
160 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_AESDMACTRL_BASE); in HAL_AESDMA_SetBank()
193 Reg_AESDMA = (MS_VIRT)(&_AESDMACtrl[0].Dma_Ctrl); in AESDMA_Reset()
195 REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , 0x00000000); // clear ctrl register in AESDMA_Reset()
196 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)|(AESDMA_CTRL_SW_RST… in AESDMA_Reset()
197 …REG32_W((&_AESDMACtrl[0].Dma_Ctrl) , _AESDMA_REG32_R(&_AESDMACtrl[0].Dma_Ctrl)&~(AESDMA_CTRL_SW_RS… in AESDMA_Reset()
214 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_L) , cipherkey[0]); in AESDMA_Set_CipherKey()
215 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_L.Key_H) , cipherkey[1]); in AESDMA_Set_CipherKey()
216 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_L) , cipherkey[2]); in AESDMA_Set_CipherKey()
217 REG32_W((&_AESDMACtrl[0].Dma_CipherKey_H.Key_H) , cipherkey[3]); in AESDMA_Set_CipherKey()
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| /utopia/UTPA2-700.0.x/modules/security/hal/curry/cipher/ |
| H A D | halCIPHER.c | 64 static REG_AESDMACtrl *_AESDMACtrl = 0 ; variable
205 REG32_W(&_AESDMACtrl->Cmd_Queue, u32Value) ; in WRITE_CMDQ()
599 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_CIPHERCTRL_BASE); in HAL_CIPHER_SetBank()
651 MS_U32 u32DMACtrl = REG32_R(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_ResetException()
652 …REG32_W(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL], u32DMACtrl | REG_EXCEPT_FLAG_CLEAR); //clear all ex… in HAL_CIPHER_ResetException()
653 …REG32_W(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL], u32DMACtrl & ~REG_EXCEPT_FLAG_CLEAR); //enable acpu… in HAL_CIPHER_ResetException()
678 MS_U32 DMA_CTRL = REG32_R(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_SWReset()
679 REG32_W(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL], DMA_CTRL | REG_DMA_SW_RESET); //reset CryptoDMA in HAL_CIPHER_SWReset()
680 REG32_W(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL], DMA_CTRL & ~REG_DMA_SW_RESET); //enable CryptoDMA in HAL_CIPHER_SWReset()
1103 tmp = REG32_R(&_AESDMACtrl->Dma_Out[0]); in HAL_CIPHER_DMA_GetData()
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| /utopia/UTPA2-700.0.x/modules/security/hal/k6/cipher/ |
| H A D | halCIPHER.c | 64 static REG_AESDMACtrl *_AESDMACtrl = 0 ; variable
158 REG32(&_AESDMACtrl->Cmd_Queue) = (u32Value) ; in WRITE_CMDQ()
544 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_CIPHERCTRL_BASE); in HAL_CIPHER_SetBank()
597 MS_U32 u32DMACtrl = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_ResetException()
598 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl | REG_EXCEPT_FLAG_CLEAR; //clear all exc… in HAL_CIPHER_ResetException()
599 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl & ~REG_EXCEPT_FLAG_CLEAR; //enable acpu … in HAL_CIPHER_ResetException()
624 MS_U32 DMA_CTRL = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_SWReset()
625 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL | REG_DMA_SW_RESET; //reset CryptoDMA in HAL_CIPHER_SWReset()
626 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL & ~REG_DMA_SW_RESET; //enable CryptoDMA in HAL_CIPHER_SWReset()
1073 tmp = REG32(&_AESDMACtrl->Dma_Out[0]); in HAL_CIPHER_DMA_GetData()
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| /utopia/UTPA2-700.0.x/modules/security/hal/kano/cipher/ |
| H A D | halCIPHER.c | 64 static REG_AESDMACtrl *_AESDMACtrl = 0 ; variable
158 REG32(&_AESDMACtrl->Cmd_Queue) = (u32Value) ; in WRITE_CMDQ()
541 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_CIPHERCTRL_BASE); in HAL_CIPHER_SetBank()
594 MS_U32 u32DMACtrl = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_ResetException()
595 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl | REG_EXCEPT_FLAG_CLEAR; //clear all exc… in HAL_CIPHER_ResetException()
596 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl & ~REG_EXCEPT_FLAG_CLEAR; //enable acpu … in HAL_CIPHER_ResetException()
621 MS_U32 DMA_CTRL = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_SWReset()
622 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL | REG_DMA_SW_RESET; //reset CryptoDMA in HAL_CIPHER_SWReset()
623 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL & ~REG_DMA_SW_RESET; //enable CryptoDMA in HAL_CIPHER_SWReset()
1070 tmp = REG32(&_AESDMACtrl->Dma_Out[0]); in HAL_CIPHER_DMA_GetData()
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| /utopia/UTPA2-700.0.x/modules/security/hal/k6lite/cipher/ |
| H A D | halCIPHER.c | 64 static REG_AESDMACtrl *_AESDMACtrl = 0 ; variable
158 REG32(&_AESDMACtrl->Cmd_Queue) = (u32Value) ; in WRITE_CMDQ()
544 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_CIPHERCTRL_BASE); in HAL_CIPHER_SetBank()
597 MS_U32 u32DMACtrl = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_ResetException()
598 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl | REG_EXCEPT_FLAG_CLEAR; //clear all exc… in HAL_CIPHER_ResetException()
599 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl & ~REG_EXCEPT_FLAG_CLEAR; //enable acpu … in HAL_CIPHER_ResetException()
624 MS_U32 DMA_CTRL = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_SWReset()
625 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL | REG_DMA_SW_RESET; //reset CryptoDMA in HAL_CIPHER_SWReset()
626 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL & ~REG_DMA_SW_RESET; //enable CryptoDMA in HAL_CIPHER_SWReset()
1073 tmp = REG32(&_AESDMACtrl->Dma_Out[0]); in HAL_CIPHER_DMA_GetData()
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| /utopia/UTPA2-700.0.x/modules/security/hal/k7u/cipher/ |
| H A D | halCIPHER.c | 64 static REG_AESDMACtrl *_AESDMACtrl = 0 ; variable
158 REG32(&_AESDMACtrl->Cmd_Queue) = (u32Value) ; in WRITE_CMDQ()
557 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_CIPHERCTRL_BASE); in HAL_CIPHER_SetBank()
610 MS_U32 u32DMACtrl = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_ResetException()
611 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl | REG_EXCEPT_FLAG_CLEAR; //clear all exc… in HAL_CIPHER_ResetException()
612 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl & ~REG_EXCEPT_FLAG_CLEAR; //enable acpu … in HAL_CIPHER_ResetException()
638 MS_U32 DMA_CTRL = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_SWReset()
639 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL | REG_DMA_SW_RESET; //reset CryptoDMA in HAL_CIPHER_SWReset()
640 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL & ~REG_DMA_SW_RESET; //enable CryptoDMA in HAL_CIPHER_SWReset()
1107 tmp = REG32(&_AESDMACtrl->Dma_Out[0]); in HAL_CIPHER_DMA_GetData()
[all …]
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