Lines Matching refs:_AESDMACtrl
64 static REG_AESDMACtrl *_AESDMACtrl = 0 ; variable
205 REG32_W(&_AESDMACtrl->Cmd_Queue, u32Value) ; in WRITE_CMDQ()
599 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_CIPHERCTRL_BASE); in HAL_CIPHER_SetBank()
651 MS_U32 u32DMACtrl = REG32_R(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_ResetException()
652 …REG32_W(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL], u32DMACtrl | REG_EXCEPT_FLAG_CLEAR); //clear all ex… in HAL_CIPHER_ResetException()
653 …REG32_W(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL], u32DMACtrl & ~REG_EXCEPT_FLAG_CLEAR); //enable acpu… in HAL_CIPHER_ResetException()
678 MS_U32 DMA_CTRL = REG32_R(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_SWReset()
679 REG32_W(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL], DMA_CTRL | REG_DMA_SW_RESET); //reset CryptoDMA in HAL_CIPHER_SWReset()
680 REG32_W(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL], DMA_CTRL & ~REG_DMA_SW_RESET); //enable CryptoDMA in HAL_CIPHER_SWReset()
1103 tmp = REG32_R(&_AESDMACtrl->Dma_Out[0]); in HAL_CIPHER_DMA_GetData()
1109 tmp = REG32_R(&_AESDMACtrl->Dma_Out[1]); in HAL_CIPHER_DMA_GetData()
1115 tmp = REG32_R(&_AESDMACtrl->Dma_Out[2]); in HAL_CIPHER_DMA_GetData()
1121 tmp = REG32_R(&_AESDMACtrl->Dma_Out[3]); in HAL_CIPHER_DMA_GetData()
1135 DmaRpt[i] = REG32_R(&_AESDMACtrl->Dma_Reportp[i]); in HAL_CIPHER_DMA_GetRpt()
1162 u32Tmp = _AESDMACtrl->Dma_Ctrl[1]; in HAL_CIPHER_DMA_Start()
1164 _AESDMACtrl->Dma_Ctrl[1] = u32Tmp; in HAL_CIPHER_DMA_Start()
1170 MS_U32 u32DMACtrl = REG32_R(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_DMA_Start()
1204 u32SpareCnt = REG32_R(&_AESDMACtrl->SpareCnt) ; in HAL_CIPHER_DMA_Start()
1297 REG32_W(&_AESDMACtrl->SpareCnt, u32SpareCnt) ; in HAL_CIPHER_DMA_Start()
1304 REG32_W(&_AESDMACtrl->SpareCnt, u32SpareCnt) ; in HAL_CIPHER_DMA_Start()
1347 u32SpareCnt = REG32_R(&_AESDMACtrl->SpareCnt) ; in HAL_CIPHER_OTPHash_Start()
1374 REG32_W(&_AESDMACtrl->SpareCnt,u32SpareCnt); in HAL_CIPHER_OTPHash_Start()
1380 REG32_W(&_AESDMACtrl->SpareCnt, u32SpareCnt) ; in HAL_CIPHER_OTPHash_Start()
1400 MS_U32 u32Rpt = REG32_R(&_AESDMACtrl->Dma_Reportp[0]) ; in HAL_CIPHER_DMA_CmdDone()
1405 u32ExcTmp = (MS_U32) REG32_R(&_AESDMACtrl->Dma_Ctrl[REG_EXCEPT_FLAG]); in HAL_CIPHER_DMA_CmdDone()
1421 MS_U32 u32ExcTmp = (MS_U32) REG32_R(&_AESDMACtrl->Dma_Ctrl[REG_EXCEPT_FLAG]); in HAL_CIPHER_GetException()
1605 HashRpt[i] = REG32_R(&_AESDMACtrl->Hash_Reportp[i]); in HAL_CIPHER_Hash_GetRpt()
1991 u32SpareCnt = REG32_R(&_AESDMACtrl->SpareCnt) ; in HAL_CIPHER_Hash_Start()
2024 REG32_W(&_AESDMACtrl->Hash_Reportp[1], _u32InitWordCnt); in HAL_CIPHER_Hash_Start()
2069 REG32_W(&_AESDMACtrl->SpareCnt, u32SpareCnt) ; in HAL_CIPHER_Hash_Start()
2076 REG32_W(&_AESDMACtrl->SpareCnt, u32SpareCnt) ; in HAL_CIPHER_Hash_Start()
2097 MS_U32 u32Tmp = REG32_R(&_AESDMACtrl->Hash_Reportp[0]) ; in HAL_CIPHER_Hash_CmdDone()
2102 u32ExcTmp = (MS_U32)REG32_R(&_AESDMACtrl->Dma_Ctrl[REG_EXCEPT_FLAG]); in HAL_CIPHER_Hash_CmdDone()