Lines Matching refs:_AESDMACtrl
64 static REG_AESDMACtrl *_AESDMACtrl = 0 ; variable
158 REG32(&_AESDMACtrl->Cmd_Queue) = (u32Value) ; in WRITE_CMDQ()
557 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_CIPHERCTRL_BASE); in HAL_CIPHER_SetBank()
610 MS_U32 u32DMACtrl = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_ResetException()
611 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl | REG_EXCEPT_FLAG_CLEAR; //clear all exc… in HAL_CIPHER_ResetException()
612 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl & ~REG_EXCEPT_FLAG_CLEAR; //enable acpu … in HAL_CIPHER_ResetException()
638 MS_U32 DMA_CTRL = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_SWReset()
639 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL | REG_DMA_SW_RESET; //reset CryptoDMA in HAL_CIPHER_SWReset()
640 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL & ~REG_DMA_SW_RESET; //enable CryptoDMA in HAL_CIPHER_SWReset()
1107 tmp = REG32(&_AESDMACtrl->Dma_Out[0]); in HAL_CIPHER_DMA_GetData()
1113 tmp = REG32(&_AESDMACtrl->Dma_Out[1]); in HAL_CIPHER_DMA_GetData()
1119 tmp = REG32(&_AESDMACtrl->Dma_Out[2]); in HAL_CIPHER_DMA_GetData()
1125 tmp = REG32(&_AESDMACtrl->Dma_Out[3]); in HAL_CIPHER_DMA_GetData()
1139 DmaRpt[i] = REG32(&_AESDMACtrl->Dma_Reportp[i]); in HAL_CIPHER_DMA_GetRpt()
1164 u32Tmp = _AESDMACtrl->Dma_Ctrl[1]; in HAL_CIPHER_DMA_Start()
1166 _AESDMACtrl->Dma_Ctrl[1] = u32Tmp; in HAL_CIPHER_DMA_Start()
1195 u32SpareCnt = REG32(&_AESDMACtrl->SpareCnt) ; in HAL_CIPHER_DMA_Start()
1340 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_DMA_Start()
1347 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_DMA_Start()
1387 u32SpareCnt = REG32(&_AESDMACtrl->SpareCnt) ; in HAL_CIPHER_OTPHash_Start()
1414 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_OTPHash_Start()
1420 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_OTPHash_Start()
1440 MS_U32 u32Rpt = REG32(&_AESDMACtrl->Dma_Reportp[0]) ; in HAL_CIPHER_DMA_CmdDone()
1445 u32ExcTmp = (MS_U32) REG32(&_AESDMACtrl->Dma_Ctrl[REG_EXCEPT_FLAG]); in HAL_CIPHER_DMA_CmdDone()
1461 MS_U32 u32ExcTmp = (MS_U32) REG32(&_AESDMACtrl->Dma_Ctrl[REG_EXCEPT_FLAG]); in HAL_CIPHER_GetException()
1645 HashRpt[i] = REG32(&_AESDMACtrl->Hash_Reportp[i]); in HAL_CIPHER_Hash_GetRpt()
2016 u32SpareCnt = REG32(&_AESDMACtrl->SpareCnt) ; in HAL_CIPHER_Hash_Start()
2049 REG32(&_AESDMACtrl->Hash_Reportp[1]) = _u32InitWordCnt; in HAL_CIPHER_Hash_Start()
2094 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_Hash_Start()
2101 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_Hash_Start()
2122 MS_U32 u32Tmp = REG32(&_AESDMACtrl->Hash_Reportp[0]) ; in HAL_CIPHER_Hash_CmdDone()
2127 u32ExcTmp = (MS_U32)REG32(&_AESDMACtrl->Dma_Ctrl[REG_EXCEPT_FLAG]); in HAL_CIPHER_Hash_CmdDone()