Lines Matching refs:_AESDMACtrl
64 static REG_AESDMACtrl *_AESDMACtrl = 0 ; variable
158 REG32(&_AESDMACtrl->Cmd_Queue) = (u32Value) ; in WRITE_CMDQ()
544 _AESDMACtrl = (REG_AESDMACtrl*)(_u32RegBase + REG_CIPHERCTRL_BASE); in HAL_CIPHER_SetBank()
597 MS_U32 u32DMACtrl = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_ResetException()
598 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl | REG_EXCEPT_FLAG_CLEAR; //clear all exc… in HAL_CIPHER_ResetException()
599 …REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = u32DMACtrl & ~REG_EXCEPT_FLAG_CLEAR; //enable acpu … in HAL_CIPHER_ResetException()
624 MS_U32 DMA_CTRL = REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]); in HAL_CIPHER_SWReset()
625 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL | REG_DMA_SW_RESET; //reset CryptoDMA in HAL_CIPHER_SWReset()
626 REG32(&_AESDMACtrl->Dma_Ctrl[REG_DMA_CTRL]) = DMA_CTRL & ~REG_DMA_SW_RESET; //enable CryptoDMA in HAL_CIPHER_SWReset()
1073 tmp = REG32(&_AESDMACtrl->Dma_Out[0]); in HAL_CIPHER_DMA_GetData()
1079 tmp = REG32(&_AESDMACtrl->Dma_Out[1]); in HAL_CIPHER_DMA_GetData()
1085 tmp = REG32(&_AESDMACtrl->Dma_Out[2]); in HAL_CIPHER_DMA_GetData()
1091 tmp = REG32(&_AESDMACtrl->Dma_Out[3]); in HAL_CIPHER_DMA_GetData()
1105 DmaRpt[i] = REG32(&_AESDMACtrl->Dma_Reportp[i]); in HAL_CIPHER_DMA_GetRpt()
1132 u32Tmp = _AESDMACtrl->Dma_Ctrl[1]; in HAL_CIPHER_DMA_Start()
1134 _AESDMACtrl->Dma_Ctrl[1] = u32Tmp; in HAL_CIPHER_DMA_Start()
1163 u32SpareCnt = REG32(&_AESDMACtrl->SpareCnt) ; in HAL_CIPHER_DMA_Start()
1256 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_DMA_Start()
1263 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_DMA_Start()
1306 u32SpareCnt = REG32(&_AESDMACtrl->SpareCnt) ; in HAL_CIPHER_OTPHash_Start()
1333 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_OTPHash_Start()
1339 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_OTPHash_Start()
1359 MS_U32 u32Rpt = REG32(&_AESDMACtrl->Dma_Reportp[0]) ; in HAL_CIPHER_DMA_CmdDone()
1364 u32ExcTmp = (MS_U32) REG32(&_AESDMACtrl->Dma_Ctrl[REG_EXCEPT_FLAG]); in HAL_CIPHER_DMA_CmdDone()
1380 MS_U32 u32ExcTmp = (MS_U32) REG32(&_AESDMACtrl->Dma_Ctrl[REG_EXCEPT_FLAG]); in HAL_CIPHER_GetException()
1564 HashRpt[i] = REG32(&_AESDMACtrl->Hash_Reportp[i]); in HAL_CIPHER_Hash_GetRpt()
1950 u32SpareCnt = REG32(&_AESDMACtrl->SpareCnt) ; in HAL_CIPHER_Hash_Start()
1983 REG32(&_AESDMACtrl->Hash_Reportp[1]) = _u32InitWordCnt; in HAL_CIPHER_Hash_Start()
2028 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_Hash_Start()
2035 REG32(&_AESDMACtrl->SpareCnt) = u32SpareCnt ; in HAL_CIPHER_Hash_Start()
2056 MS_U32 u32Tmp = REG32(&_AESDMACtrl->Hash_Reportp[0]) ; in HAL_CIPHER_Hash_CmdDone()
2061 u32ExcTmp = (MS_U32)REG32(&_AESDMACtrl->Dma_Ctrl[REG_EXCEPT_FLAG]); in HAL_CIPHER_Hash_CmdDone()