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Searched refs:TSP_HWINT2_STATUS_MASK (Results 1 – 25 of 34) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c2695 (REG16_R(&_RegCtrl->SwInt_Stat1_L) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_PcrFlt_ClearInt()
2696 (~TSP_HWINT2_PCR0_UPDATE_END & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_PcrFlt_ClearInt()
2701 (REG16_R(&_RegCtrl->SwInt_Stat1_L) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_PcrFlt_ClearInt()
2702 (~TSP_HWINT2_PCR1_UPDATE_END & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_PcrFlt_ClearInt()
4648 …EG16_SET(&_RegCtrl->SwInt_Stat1_L, (TSP_HWINT2_EN_MASK & (u32Mask >> 8)) | TSP_HWINT2_STATUS_MASK); in HAL_TSP_INT_Enable()
4658 TSP_HWINT2_STATUS_MASK); in HAL_TSP_INT_Disable()
4667 (REG16_R(&_RegCtrl->SwInt_Stat1_L) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_INT_ClrHW()
4668 (~(u32Mask & 0xFF00) & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_INT_ClrHW()
4676 …status = (MS_U32)(((REG16_R(&_RegCtrl->SwInt_Stat1_L) & TSP_HWINT2_STATUS_MASK) >> TSP_HWINT2_STAT… in HAL_TSP_INT_GetHW()
H A DregTSP.h1140 #define TSP_HWINT2_STATUS_MASK 0xFF00 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.c3599 (REG16_R(&_RegCtrl->SwInt_Stat1_L) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_PcrFlt_ClearInt()
3600 (~TSP_HWINT2_PCR0_UPDATE_END & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_PcrFlt_ClearInt()
3605 (REG16_R(&_RegCtrl->SwInt_Stat1_L) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_PcrFlt_ClearInt()
3606 (~TSP_HWINT2_PCR1_UPDATE_END & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_PcrFlt_ClearInt()
6071 …EG16_SET(&_RegCtrl->SwInt_Stat1_L, (TSP_HWINT2_EN_MASK & (u32Mask >> 8)) | TSP_HWINT2_STATUS_MASK); in HAL_TSP_INT_Enable()
6081 TSP_HWINT2_STATUS_MASK); in HAL_TSP_INT_Disable()
6090 (REG16_R(&_RegCtrl->SwInt_Stat1_L) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_INT_ClrHW()
6091 (((~(u32Mask >> 8))<< TSP_HWINT2_STATUS_SHIFT) & TSP_HWINT2_STATUS_MASK) ); in HAL_TSP_INT_ClrHW()
6098 …status |= ((MS_U32)(((REG16_R(&_RegCtrl->SwInt_Stat1_L) & TSP_HWINT2_STATUS_MASK) >> TSP_HWINT2_ST… in HAL_TSP_INT_GetHW()
H A DregTSP.h1178 #define TSP_HWINT2_STATUS_MASK 0xFF00 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c3752 (REG16_R(&_RegCtrl->HwInt2_Stat) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_PcrFlt_ClearInt()
3753 (~TSP_HWINT2_PCR0_UPDATE_END & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_PcrFlt_ClearInt()
3758 (REG16_R(&_RegCtrl->HwInt2_Stat) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_PcrFlt_ClearInt()
3759 (~TSP_HWINT2_PCR1_UPDATE_END & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_PcrFlt_ClearInt()
6216 … REG16_SET(&_RegCtrl->HwInt2_Stat, (TSP_HWINT2_EN_MASK & (u32Mask >> 8)) | TSP_HWINT2_STATUS_MASK); in HAL_TSP_INT_Enable()
6238 …EG16_R(&_RegCtrl->HwInt2_Stat) & ~(TSP_HWINT2_EN_MASK & (u32Mask >> 8))) | TSP_HWINT2_STATUS_MASK); in HAL_TSP_INT_Disable()
6256 (REG16_R(&_RegCtrl->HwInt2_Stat) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_INT_ClrHW()
6257 (((~(u32Mask >> 8))<< TSP_HWINT2_STATUS_SHIFT) & TSP_HWINT2_STATUS_MASK) ); in HAL_TSP_INT_ClrHW()
6272 …status |= ((MS_U32)(((REG16_R(&_RegCtrl->HwInt2_Stat) & TSP_HWINT2_STATUS_MASK) >> TSP_HWINT2_STAT… in HAL_TSP_INT_GetHW()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c3900 (REG16_R(&_RegCtrl->HwInt2_Stat) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_PcrFlt_ClearInt()
3901 (~TSP_HWINT2_PCR0_UPDATE_END & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_PcrFlt_ClearInt()
3906 (REG16_R(&_RegCtrl->HwInt2_Stat) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_PcrFlt_ClearInt()
3907 (~TSP_HWINT2_PCR1_UPDATE_END & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_PcrFlt_ClearInt()
6587 … REG16_SET(&_RegCtrl->HwInt2_Stat, (TSP_HWINT2_EN_MASK & (u32Mask >> 8)) | TSP_HWINT2_STATUS_MASK); in HAL_TSP_INT_Enable()
6611 TSP_HWINT2_STATUS_MASK); in HAL_TSP_INT_Disable()
6630 (REG16_R(&_RegCtrl->HwInt2_Stat) & (~TSP_HWINT2_STATUS_MASK)) | in HAL_TSP_INT_ClrHW()
6631 (((~(u32Mask >> 8))<< TSP_HWINT2_STATUS_SHIFT) & TSP_HWINT2_STATUS_MASK) ); in HAL_TSP_INT_ClrHW()
6645 …status |= ((MS_U32)(((REG16_R(&_RegCtrl->HwInt2_Stat) & TSP_HWINT2_STATUS_MASK) >> TSP_HWINT2_STAT… in HAL_TSP_INT_GetHW()
H A DregTSP.h1221 #define TSP_HWINT2_STATUS_MASK 0xFF00 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DregTSP.h958 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DregTSP.h958 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DregTSP.h957 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h1208 #define TSP_HWINT2_STATUS_MASK 0xFF00 macro
H A DhalTSP.c4382 …ET(&_RegCtrl->HwInt2_Stat, (((u32Mask >> 8) << TSP_HWINT2_STATUS_SHIFT) & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_INT_ClrHW()
4383 …LR(&_RegCtrl->HwInt2_Stat, (((u32Mask >> 8) << TSP_HWINT2_STATUS_SHIFT) & TSP_HWINT2_STATUS_MASK)); in HAL_TSP_INT_ClrHW()
4397 …status |= ((MS_U32)(((REG16_R(&_RegCtrl->HwInt2_Stat) & TSP_HWINT2_STATUS_MASK) >> TSP_HWINT2_STAT… in HAL_TSP_INT_GetHW()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DregTSP.h1219 #define TSP_HWINT2_STATUS_MASK 0xFF00 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h1216 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h1207 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h1273 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h1277 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DregTSP.h1277 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DregTSP.h1293 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DregTSP.h1293 #define TSP_HWINT2_STATUS_MASK 0xFF00UL macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h1180 #define TSP_HWINT2_STATUS_MASK 0xFF00 macro
/utopia/UTPA2-700.0.x/modules/dmx/drv/tsp/
H A DdrvTSP.c3630 HAL_TSP_Int2_Disable(TSP_HWINT2_STATUS_MASK);
3712 HAL_TSP_Int_ClearHw2(TSP_HWINT2_STATUS_MASK);
3728 HAL_TSP_Int_ClearHw2(TSP_HWINT2_STATUS_MASK);
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h1219 #define TSP_HWINT2_STATUS_MASK 0xFF00 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h1188 #define TSP_HWINT2_STATUS_MASK 0xFF00 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h1188 #define TSP_HWINT2_STATUS_MASK 0xFF00 macro

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