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77 //<MStar Software>
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93 ///////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvTSP.c
98 /// @brief Transport Stream Processer (TSP) Driver Interface
99 /// @author MStar Semiconductor,Inc.
100 /// @attention
101 /// All TSP DDI are not allowed to use in any interrupt context other than TSP ISR and Callback
102 ///////////////////////////////////////////////////////////////////////////////////////////////////
103
104
105 //-------------------------------------------------------------------------------------------------
106 // Include Files
107 //-------------------------------------------------------------------------------------------------
108 #ifdef MSOS_TYPE_LINUX_KERNEL
109 #include <linux/sched.h>
110 #include <linux/wait.h>
111 #include <linux/string.h>
112 #else
113 #include <string.h>
114 #endif
115
116 // Common Definition
117 #include "MsCommon.h"
118 #include "MsVersion.h"
119 #include "drvMMIO.h"
120 #include "drvSYS.h"
121
122 // Internal Definition
123 #include "asmCPU.h"
124 #include "osalTSP.h"
125 #include "halTSP.h"
126 #include "drvTSP.h"
127 #include "ULog.h"
128
129 #if DMX_DEBUG
130 #include "../../api/dmx/Internal_DMX_debug.h"
131 #endif
132
133 #ifdef MSOS_TYPE_LINUX
134 #include <sys/ioctl.h>
135 #include <unistd.h>
136 #include <fcntl.h> // O_RDWR
137 #include "mdrv_firmware_io.h"
138 #endif
139
140 //-------------------------------------------------------------------------------------------------
141 // Driver Compiler Options
142 //-------------------------------------------------------------------------------------------------
143
144 //-------------------------------------------------------------------------------------------------
145 // Global Variables
146 //-------------------------------------------------------------------------------------------------
147
148
149 //-------------------------------------------------------------------------------------------------
150 // Local Defines
151 //-------------------------------------------------------------------------------------------------
152 #define _TSP_SetEvent(flag) OSAL_TSP_EventSet(_s32TspEventId, (flag))
153 #define _TSP_GetEvent(events, flag, opt, timeout) OSAL_TSP_EventGet(_s32TspEventId, (flag), &(events), (opt), (timeout))
154
155 #define _TSP_SetSecRdyId(fltid) OSAL_TSP_EventSet(_s32TspSecRdyId[fltid>>5UL], (1UL<<(fltid&0x1FUL)))
156 #define _TSP_GetSecRdyId(fltid, events, opt) OSAL_TSP_EventGet(_s32TspSecRdyId[fltid>>5UL], (1UL<<(fltid&0x1FUL)), (events), (opt), 0)
157 #define _TSP_GetModeSecRdy(idx, mask,events, opt) OSAL_TSP_EventGet(_s32TspSecRdyId[idx], mask, (events), (opt), 0)
158
159 #define _TSP_SetSecOvfId(fltid) OSAL_TSP_EventSet(_s32TspSecOvfId[fltid>>5UL], (1UL<<(fltid&0x1FUL)))
160 #define _TSP_GetSecOvfId(fltid, events, opt) OSAL_TSP_EventGet(_s32TspSecOvfId[fltid>>5UL], (1UL<<(fltid&0x1FUL)), (events), (opt), 0)
161 #define _TSP_GetModeSecOvf(idx, mask,events, opt) OSAL_TSP_EventGet(_s32TspSecOvfId[idx], mask, (events), (opt), 0)
162
163 #define _TSP_SetSecCrcId(fltid) OSAL_TSP_EventSet(_s32TspSecCrcId[fltid>>5UL], (1UL<<(fltid&0x1FUL)))
164 #define _TSP_GetSecCrcId(fltid, events, opt) OSAL_TSP_EventGet(_s32TspSecCrcId[fltid>>5UL], (1UL<<(fltid&0x1FUL)), (events), (opt), 0)
165 #define _TSP_GetModeSecCrc(idx, mask,events, opt) OSAL_TSP_EventGet(_s32TspSecCrcId[idx], mask, (events), (opt), 0)
166
167 #define _TSP_SetFltDisableId(fltid) OSAL_TSP_EventSet(_s32TspFltDisableId[fltid>>5UL], (1UL<<(fltid&0x1FUL)))
168 #define _TSP_GetFltDisableId(fltid, events, opt) OSAL_TSP_EventGet(_s32TspFltDisableId[fltid>>5UL], (1UL<<(fltid&0x1FUL)), (events), (opt), 0)
169 #define _TSP_GetModeFltDisable(idx, mask,events, opt) OSAL_TSP_EventGet(_s32TspFltDisableId[idx], mask, (events), (opt), 0)
170
171 #if 0
172 #define _TSP_FLAG_FREE_TIMEOUT 4
173 #define _TSP_SetEventFree0Id(fltid) OSAL_TSP_EventSet(_s32EventFree0[fltid>>5], (1<<(fltid&0x1F)))
174 #define _TSP_GetEventFree0Id(fltid, events, opt) OSAL_TSP_EventGet(_s32EventFree0[fltid>>5], (1<<(fltid&0x1F)), (events), (opt), 0)
175 #define _TSP_GetModeEventFree0(idx, mask,events, opt) OSAL_TSP_EventGet(_s32EventFree0[idx], mask, (events), (opt), 0)
176 #define _TSP_FLAG_SetDone(fltid) OSAL_TSP_EventSet(_s32DoneFlags[fltid>>5], (1<<(fltid&0x1F)))
177 #define _TSP_FLAG_GetDone(fltid, events, opt) OSAL_TSP_EventGet(_s32DoneFlags[fltid>>5], (1<<(fltid&0x1F)), (events), (opt), _TSP_FLAG_FREE_TIMEOUT)
178
179 #define _TSP_SetEventFreeDefer0Id(fltid) OSAL_TSP_EventSet(_s32EventFreeDefer0[fltid>>5], (1<<(fltid&0x1F)))
180 #define _TSP_GetEventFreeDefer0Id(fltid, events, opt) OSAL_TSP_EventGet(_s32EventFreeDefer0[fltid>>5], (1<<(fltid&0x1F)), (events), (opt), 0)
181 #define _TSP_GetEventFreeDefer0(idx, mask,events, opt) OSAL_TSP_EventGet(_s32EventFreeDefer0[idx], mask, (events), (opt), 0)
182 #endif
183
184 // for mutiple process using, record which filter is enabled by this process
185 #define _TSP_SetSecNotifyId(fltid) (_u32SecNotifyId[(fltid>>5UL)] |= (1 << (fltid&0x1FUL)))
186 #define _TSP_RemoveSecNotifyId(fltid) (_u32SecNotifyId[(fltid>>5UL)] &= ~(1 << (fltid&0x1FUL)))
187 #define _TSP_ChkSecNotifyId(fltid) (_u32SecNotifyId[(fltid>>5UL)] & (1 << (fltid&0x1FUL)))
188
189 // for mutiple process using, record which pvr engine is enabled by this process
190 #ifndef NO_PVR
191 #define _TSP_SetPvrNotifyId(fltid) (_u32PvrNotifyId[(fltid>>5UL)] |= (1 << (fltid&0x1FUL)))
192 #define _TSP_RemovePvrNotifyId(fltid) (_u32PvrNotifyId[(fltid>>5UL)] &= ~(1 << (fltid&0x1FUL)))
193 #define _TSP_ChkPvrNotifyId(fltid) (_u32PvrNotifyId[(fltid>>5UL)] & (1 << (fltid&0x1FUL)))
194 #endif
195
196 // for mutiple process using, record which hw pcr is enabled by this process
197 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
198 #define _TSP_SetHwPcrNotifyId(fltid) (_u32HwPcrNotifyId[(fltid>>5UL)] |= (1 << (fltid&0x1FUL)))
199 #define _TSP_RemoveHwPcrNotifyId(fltid) (_u32HwPcrNotifyId[(fltid>>5UL)] &= ~(1 << (fltid&0x1FUL)))
200 #define _TSP_ChkHwPcrNotifyId(fltid) (_u32HwPcrNotifyId[(fltid>>5UL)] & (1 << (fltid&0x1FUL)))
201 #endif
202
203 #ifdef TS2_LIVE_SUPPORT
204 #define _TSP_GET_SECFLT_REG(fltid) ((fltid<TSP_SECFLT_NUM)? (&(_TspSec[0].Flt[fltid])):(&(_TspSec2[0].Flt[fltid-TSP_SECFLT_NUM])))
205 #else
206 #define _TSP_GET_SECFLT_REG(fltid) (&(_TspSec[0].Flt[fltid]))
207 #endif
208
209 #define _TSP_MUTEX_TIMEOUT 10000UL //OSAL_TSP_MUTEX_TIMEOUT
210
211 #define _TSP_ENTRY() do { \
212 while (!OSAL_TSP_MutexObtain(_ptsp_res->_s32TspMutexId , _TSP_MUTEX_TIMEOUT)) \
213 { \
214 _ptsp_res->_u32LastErr = DRVTSP_FUNC_ERROR; \
215 ULOGE("TSP", "[%s][%d] TSP mutex get error\n", __FUNCTION__, __LINE__); \
216 MsOS_DelayTask(1); \
217 } \
218 while(!OSAL_TSP_MutexObtain(_ptsp_res->_s32IndMutexId, _TSP_MUTEX_TIMEOUT)) \
219 { \
220 _ptsp_res->_u32LastErr = DRVTSP_FUNC_ERROR; \
221 ULOGE("TSP", "[%s][%d] IND mutex get error\n", __FUNCTION__, __LINE__); \
222 MsOS_DelayTask(1); \
223 } \
224 }while(0);
225
226 #define _TSP_RETURN(_ret) do { \
227 if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32IndMutexId)) \
228 { \
229 if (_u32TSPDGBLevel >= E_DRVTSP_DBG_L1) { ULOGE("TSP", "[%s][%d] IND mutex free error\n", __FUNCTION__, __LINE__);} \
230 } \
231 if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32TspMutexId)) \
232 { \
233 if (_u32TSPDGBLevel >= E_DRVTSP_DBG_L1) {ULOGE("TSP", "[%s][%d] TSP mutex free error\n", __FUNCTION__, __LINE__); } \
234 } \
235 if (_ret != DRVTSP_OK) { _ptsp_res->_u32LastErr = _ret; } \
236 return _ret; \
237 }while(0); // Should be optimized by compiler
238
239 #define _TSP_IND_LOCK() while(!OSAL_TSP_MutexObtain(_ptsp_res->_s32IndMutexId, _TSP_MUTEX_TIMEOUT)) \
240 { \
241 ULOGE("TSP", "[%s][%d] IND mutex get error\n", __FUNCTION__, __LINE__); \
242 MsOS_DelayTask(1); \
243 }
244
245 #define _TSP_IND_UNLOCK() if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32IndMutexId)) \
246 { \
247 ULOGE("TSP", "[%s][%d] IND mutex free error\n", __FUNCTION__, __LINE__); \
248 }
249
250 #define _TSP_INT_LOCK() while(!OSAL_TSP_MutexObtain(_ptsp_res->_s32IntRegMutexId, _TSP_MUTEX_TIMEOUT)) \
251 { \
252 ULOGE("TSP", "[%s][%d] INT mutex get error\n", __FUNCTION__, __LINE__); \
253 MsOS_DelayTask(1); \
254 }
255
256 #define _TSP_INT_UNLOCK() if(!OSAL_TSP_MutexRelease(_ptsp_res->_s32IntRegMutexId)) \
257 { \
258 ULOGE("TSP", "[%s][%d] INT mutex free error\n", __FUNCTION__, __LINE__); \
259 }
260
261 #define _TSP_EXT_LOCK() while(!OSAL_TSP_MutexObtain(_s32ExtMutexId, _TSP_MUTEX_TIMEOUT)) \
262 { \
263 ULOGE("TSP", "[%s][%d] EXT mutex get error\n", __FUNCTION__, __LINE__); \
264 MsOS_DelayTask(1); \
265 }
266
267 #define _TSP_EXT_UNLOCK() if(!OSAL_TSP_MutexRelease(_s32ExtMutexId)){ \
268 ULOGE("TSP", "[%s][%d] EXT mutex free error\n", __FUNCTION__, __LINE__); \
269 }
270
271 #define TSP_ASSERT(_bool, _f) if(!(_bool)) { \
272 if (_u32TSPDGBLevel == E_DRVTSP_DBG_L1) { (_f); return DRVTSP_FAIL;} \
273 else if (_u32TSPDGBLevel == E_DRVTSP_DBG_L2) { (_f); ULOGE("TSP", "[%s][%d] ASSERT %d\n", __FUNCTION__, __LINE__,(unsigned int)MsOS_GetSystemTime()); MsOS_DelayTask(MSOS_WAIT_FOREVER); return DRVTSP_FAIL;} \
274 else { return DRVTSP_FAIL; } \
275 }while(0);
276
277 #define TSP_ASSERT2(_bool, _f) if(!(_bool)) { \
278 if (_u32TSPDGBLevel == E_DRVTSP_DBG_L1) { (_f); _TSP_RETURN(DRVTSP_FAIL);} \
279 else if (_u32TSPDGBLevel == E_DRVTSP_DBG_L2) { (_f); ULOGE("TSP", "[%s][%d] ASSERT2 %d\n", __FUNCTION__, __LINE__,(unsigned int)MsOS_GetSystemTime()); MsOS_DelayTask(MSOS_WAIT_FOREVER); _TSP_RETURN(DRVTSP_FAIL);} \
280 else { _TSP_RETURN(DRVTSP_FAIL);} \
281 }while(0);
282 #define TSP_DBG(_f, _a...) { if ((_u32TSPDGBLevel == E_DRVTSP_DBG_L1)||(_u32TSPDGBLevel == E_DRVTSP_DBG_L2)) { OSAL_TSP_Print("[TSP_DBG]"); OSAL_TSP_Print(_f, ##_a); } }
283
284
285 #define DRVTSP_MAP_NULL 0xFFFFFFFFUL
286
287 #define PVRCA_DBG(x) //x
288
289 //-------------------------------------------------------------------------------------------------
290 // Local Structures
291 //-------------------------------------------------------------------------------------------------
292
293 //-----------------------------------------------------------------------------
294 // HW architecture 1-1: 0~31: pid filters. 32~47: PVR filters.
295 // HW architecture 1-2: For Extend filter support, 0~63: pid filters, 64~83: PVR pid filter
296 // HW architecture 3 : General pid filters 0~127, only 0~63 for section filter
297 //-----------------------------------------------------------------------------
298 typedef struct _DrvTSP_State
299 {
300 DrvTSP_SW_Status TSPStatus;
301 DrvTSP_FltState FltState[TSP_PIDFLT_NUM_ALL];
302 DrvTSP_FltType FltType[TSP_PIDFLT_NUM_ALL];
303 MS_U32 FltSource[TSP_PIDFLT_NUM_ALL];
304 MS_U32 FltMap[TSP_PIDFLT_NUM_ALL];
305 DrvTSP_FltState SecFltState[TSP_SECFLT_NUM_All];
306 DrvTSP_Event SecFltEvtNotify[TSP_SECFLT_NUM_All];
307 P_DrvTSP_EvtCallback SecFltCallback[TSP_SECFLT_NUM_All];
308 DrvTSP_FltState SecBufState[TSP_SECFLT_NUM_All];
309 DrvTSP_FltMode SecFltMode[TSP_SECFLT_NUM_All];
310 } DrvTSP_State;
311
312 typedef struct _DrvTSP_FW_DBG_INFO
313 {
314 MS_PHY phyBufAddr;
315 MS_U32 u32Size;
316 MS_U32 u32ReadPos;
317 MS_U32 u32WritePos;
318 MS_BOOL bEnable;
319 } DrvTSP_FW_DBG_INFO;
320
321 #ifndef NO_PVR
322 typedef struct _DrvTSP_PVRCAParams
323 {
324 #ifndef NO_CA
325 MS_U16 _u16Flt1PidList[TSP_PIDFLT1_NUM]; //PIDs of PVR1 group filters
326 MS_U16 _u16Flt0DscmbPidList[DSCMB_FLT_NUM_ALL]; //PIDs of TS0 DSCMB group filters
327 MS_U32 _u32Flt1Flag_DscmbPVR; //bit flag of filter that are recording in PVR1 group filters
328 MS_U32 _u32Flt1Flag_DscmbRef; //bit flag of filter that are live descrambling PVR1 group filters
329 MS_BOOL _bFLT1Dup_Enable;
330 MS_BOOL _bCIPHSSMode;
331 MS_U16 _u16Flt2PidList[DSCMB_FLT_NUM_ALL];
332 #endif //end of NO_CA
333
334 MS_BOOL _bPVRCA_Start;
335
336 }DrvTSP_PVRCAParams;
337 #endif //end of NO_PVR
338
339 typedef struct _TSP_RESOURCE_PRIVATE
340 {
341 MS_S32 _s32TspMutexId;
342 MS_S32 _s32IndMutexId;
343 MS_S32 _s32IntRegMutexId;
344
345 MS_U32 _u32LastErr;
346 MS_BOOL _bSuspend;
347 DrvTSP_State _TspState[TSP_ENGINE_NUM];
348
349 MS_U32 _u32ProcessNum;
350
351 MS_BOOL _bSWInitReady;
352 MS_PHY _phyFwAddr;
353 MS_U32 _u32FwSize;
354 MS_U32 _u32DbgIntrCount;
355
356 DrvTSP_If_Set _ifset_save;
357
358 MS_BOOL _bLiveSING_FilePP; //live in tto single and file in to ping-pong
359
360 #ifdef VQ_ENABLE
361 MS_U32 _u32NULLFileFilterID; //for switch live & file path
362 #endif //end of VQ_ENABLE
363
364 #ifndef NO_PVR
365 DrvTSP_PVRCAParams TSPPvrcaParams;
366 DrvTSP_Event _PvrEvtNotify[TSP_PVR_IF_NUM];
367 P_DrvTSP_EvtCallback _PvrCallback[TSP_PVR_IF_NUM];
368 #endif //end of NO_PVR
369
370 MS_PHY _phyTspFWDramBuf;
371 MS_U32 _u32TspFwDramBufSize;
372
373 MS_U32 _u32OrgCAMode;
374
375 }TSP_RESOURCE_PRIVATE;
376
377
378 //-------------------------------------------------------------------------------------------------
379 // Local Variables
380 //-------------------------------------------------------------------------------------------------
381 static MSIF_Version _drv_tsp_version = {
382 .DDI = { TSP_DRV_VERSION, },
383 };
384
385 #ifndef TSP_UTOPIA_20
386 static TSP_RESOURCE_PRIVATE _tsp_res = {
387 ._s32TspMutexId = -1,
388 ._s32IndMutexId = -1,
389 ._s32IntRegMutexId = -1,
390
391 ._u32LastErr = DRVTSP_OK,
392 ._bSuspend = FALSE,
393 ._u32ProcessNum = 0UL,
394
395 ._bSWInitReady = FALSE,
396 ._u32FwAddr = 0UL,
397 ._u32FwSize = 0UL,
398 ._u32DbgIntrCount = 0UL,
399 ._ifset_save = {E_DRVTSP_PAD_EXT_INPUT0, FALSE, TRUE, TRUE},
400 ._bLiveSING_FilePP = FALSE,
401
402 #ifdef VQ_ENABLE
403 ._u32NULLFileFilterID = 0xFFFFFFFFUL,
404 #endif
405
406 #ifndef NO_PVR
407 .TSPPvrcaParams = {
408 #ifndef NO_CA
409 ._u16Flt1PidList = {[0 ... (TSP_PIDFLT1_NUM-1)] = DRVTSP_PID_NULL},
410 ._u16Flt0DscmbPidList = {[0 ... (DSCMB_FLT_NUM_ALL-1)] = DRVTSP_PID_NULL},
411 ._u32Flt1Flag_DscmbPVR = 0UL,
412 ._u32Flt1Flag_DscmbRef = 0UL,
413 ._bFLT1Dup_Enable = FALSE,
414 ._bCIPHSSMode = FALSE,
415 ._u16Flt2PidList = {[0 ... (DSCMB_FLT_NUM_ALL-1)] = DRVTSP_PID_NULL},
416 #endif
417
418 ._bPVRCA_Start = FALSE,
419
420 },
421 #endif
422
423 #ifndef NO_PVR
424 ._PvrEvtNotify = {[0 ... (TSP_PVR_IF_NUM-1)] = E_DRVTSP_EVENT_DATA_INIT},
425 ._PvrCallback = {[0 ... (TSP_PVR_IF_NUM-1)] = 0},
426 #endif
427
428 ._phyTspFWDramBuf = 0UL,
429 ._u32TspFwDramBufSize = 0UL,
430
431 ._u32OrgCAMode = 0UL,
432
433 };
434
435 static TSP_RESOURCE_PRIVATE* _ptsp_res = &_tsp_res;
436 #else
437 static TSP_RESOURCE_PRIVATE* _ptsp_res = NULL;
438 #endif
439
440 static MS_U8 _db_flag = 0;
441 static MS_S32 _s32ExtMutexId = -1; //For exiting ISR process task
442
443 static MS_U32 _u32SecNotifyId[(TSP_SECFLT_NUM_All+31UL)>>5UL] = {0UL}; //for ISR processing
444
445 #ifndef NO_PVR
446 static MS_U32 _u32PvrNotifyId[(TSP_PVR_IF_NUM+31UL)>>5UL] = {0UL};
447 #endif
448
449 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
450 static MS_U32 _u32HwPcrNotifyId[(TSP_PCRFLT_NUM+31UL)>>5UL] = {0UL};
451 static MS_U8 _u8ResetPcr[TSP_PCRFLT_NUM] = {[0 ... (TSP_PCRFLT_NUM-1)] = 3UL};
452 static MS_U32 _u32PrevStcBase[TSP_PCRFLT_NUM] = {[0 ... (TSP_PCRFLT_NUM-1)] = 0UL};
453 static MS_U32 _u32PrevPllControl[TSP_PCRFLT_NUM] = {[0 ... (TSP_PCRFLT_NUM-1)] = 0UL};
454 #endif
455
456 static MS_S32 _s32TspEventId = -1;
457 static MS_S32 _s32TspSecRdyId[(TSP_SECFLT_NUM_All+31UL)>>5UL] = {[0 ... (((TSP_SECFLT_NUM_All+31UL)>>5UL)-1UL)] = -1};
458 static MS_S32 _s32TspSecOvfId[(TSP_SECFLT_NUM_All+31UL)>>5UL] = {[0 ... (((TSP_SECFLT_NUM_All+31UL)>>5UL)-1UL)] = -1};
459 static MS_S32 _s32TspSecCrcId[(TSP_SECFLT_NUM_All+31UL)>>5UL] = {[0 ... (((TSP_SECFLT_NUM_All+31UL)>>5UL)-1UL)] = -1};
460 static MS_S32 _s32TspFltDisableId[(TSP_SECFLT_NUM_All+31UL)>>5UL] = {[0 ... (((TSP_SECFLT_NUM_All+31UL)>>5UL)-1UL)] = -1};
461
462 #if 0
463 static MS_S32 _s32EventFree0[(TSP_PIDFLT_NUM_ALL+31)>>5] = {[0 ... (((TSP_PIDFLT_NUM_ALL+31)>>5)-1)] = -1};
464 static MS_S32 _s32EventFreeDefer0[(TSP_PIDFLT_NUM_ALL+31)>>5] = {[0 ... (((TSP_PIDFLT_NUM_ALL+31)>>5)-1)] = -1};
465 static MS_S32 _s32DoneFlags[(TSP_PIDFLT_NUM_ALL+31)>>5] = { [0 ... (((TSP_PIDFLT_NUM_ALL+31)>>5)-1)] = -1};
466 #endif
467
468 static MS_S32 _s32TspTaskId = -1;
469 static DrvTSP_DbgLevel _u32TSPDGBLevel = E_DRVTSP_DBG_L1;
470
471 static DrvTSP_FW_DBG_INFO _FwDbgInfo;
472
473 static MS_BOOL _bBankInit = FALSE;
474
475 MS_U32 _u32IntNum = E_INT_IRQ_TSP2HK; //for hal extern using
476 MS_U32 _u32TaskLine = 0UL;
477
478 #ifdef MSOS_TYPE_LINUX_KERNEL
479 wait_queue_head_t tsp_wq_head[TSP_SECFLT_NUM_All];
480 #endif // MSOS_TYPE_LINUX_KERNEL
481
482 //-------------------------------------------------------------------------------------------------
483 // Local Functions prototype
484 //-------------------------------------------------------------------------------------------------
485
486 static void _DumpFwMsg(void);
487 //-------------------------------------------------------------------------------------------------
488 // Local Functions
489 //-------------------------------------------------------------------------------------------------
490 #if 0
_TSP_GetTrailOne64(MS_U64 u64Flags)491 static MS_U32 _TSP_GetTrailOne64(MS_U64 u64Flags)
492 {
493 MS_U32 u32Temp = (MS_U32)(u64Flags & 0xFFFFFFFF);
494
495 if (u32Temp)
496 return MAsm_CPU_GetTrailOne(u32Temp);
497 return (32 + MAsm_CPU_GetTrailOne((MS_U32)(u64Flags>> 32)));
498 }
499 #endif
500
501 #ifdef MSOS_TYPE_LINUX_KERNEL
502 extern int MDrv_FW_TSP_Addr(void);
503 extern int MDrv_FW_TSP_Size(void);
504 #endif
505
_TSP_GetFirmware(MS_PHY * pphyAddr,MS_U32 * pu32Size)506 static MS_BOOL _TSP_GetFirmware(MS_PHY* pphyAddr, MS_U32* pu32Size)
507 {
508 #ifdef MSOS_TYPE_LINUX
509 MS_S32 s32Fd;
510 #endif
511
512 if (_ptsp_res->_u32FwSize)
513 {
514 *pphyAddr = _ptsp_res->_phyFwAddr;
515 *pu32Size = _ptsp_res->_u32FwSize;
516 return TRUE;
517 }
518
519 #ifdef MSOS_TYPE_LINUX
520 if (0> (s32Fd = open("/dev/fw", O_RDWR)))
521 {
522 TSP_DBG("[%s][%d] open fail /dev/fw\n", __FUNCTION__, __LINE__);
523 MS_ASSERT(0);
524 return FALSE;
525 }
526 if (ioctl(s32Fd, FW_IOC_TSP_ADDR, pphyAddr))
527 {
528 TSP_DBG("[%s][%d] FW_IOC_TSP_ADDR\n", __FUNCTION__, __LINE__);
529 MS_ASSERT(0);
530 close(s32Fd);
531 return FALSE;
532 }
533 if (ioctl(s32Fd, FW_IOC_TSP_SIZE, pu32Size))
534 {
535 TSP_DBG("[%s][%d] FW_IOC_TSP_SIZE\n", __FUNCTION__, __LINE__);
536 MS_ASSERT(0);
537 close(s32Fd);
538 return FALSE;
539 }
540 close(s32Fd);
541 return TRUE;
542 #elif defined (MSOS_TYPE_LINUX_KERNEL)
543 //*pphyAddr = MDrv_FW_TSP_Addr();
544 //*pu32Size = MDrv_FW_TSP_Size();
545 return TRUE;
546 #else
547 return FALSE;
548 #endif
549 }
550
551 #ifndef NO_FILEIN
_TSP_CmdQ_Init(void)552 static void _TSP_CmdQ_Init(void)
553 {
554 while (HAL_TSP_CmdQ_CmdCount()); // wait command finish
555
556 }
557 #endif //udef NO_FILEIN
558
_TSP_InitResource(TSP_RESOURCE_PRIVATE * presource)559 static MS_BOOL _TSP_InitResource(TSP_RESOURCE_PRIVATE* presource)
560 {
561 #ifndef NO_PVR
562 MS_U32 u32ii = 0;
563 #endif
564
565 if(presource == NULL)
566 {
567 return FALSE;
568 }
569
570 presource->_s32TspMutexId = -1;
571 presource->_s32IndMutexId = -1;
572 presource->_s32IntRegMutexId = -1;
573
574 presource->_u32LastErr = 1;
575 presource->_bSuspend = FALSE;
576
577 presource->_u32ProcessNum = 0UL;
578
579 presource->_bSWInitReady = FALSE;
580 presource->_phyFwAddr = 0UL;
581 presource->_u32FwSize = 0UL;
582 presource->_u32DbgIntrCount = 0UL;
583
584 presource->_ifset_save.ePad = E_DRVTSP_PAD_EXT_INPUT0;
585 presource->_ifset_save.bClkInv = FALSE;
586 presource->_ifset_save.bExtSync = TRUE;
587 presource->_ifset_save.bParallel = TRUE;
588
589 presource->_bLiveSING_FilePP = FALSE; //live in single and file in ping-pong
590
591 #ifdef VQ_ENABLE
592 presource->_u32NULLFileFilterID = 0xFFFFFFFFUL;
593 #endif
594
595 #ifndef NO_PVR
596 #ifndef NO_CA
597 for(u32ii = 0; u32ii < TSP_PIDFLT1_NUM; u32ii++)
598 {
599 presource->TSPPvrcaParams._u16Flt1PidList[u32ii] = DRVTSP_PID_NULL;
600 presource->TSPPvrcaParams._u16Flt2PidList[u32ii] = DRVTSP_PID_NULL;
601 }
602 for(u32ii = 0; u32ii < (DSCMB_FLT_NUM + DSCMB_FLT_SHAREKEY_NUM); u32ii++)
603 {
604 presource->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii] = DRVTSP_PID_NULL;
605 }
606 presource->TSPPvrcaParams._u32Flt1Flag_DscmbPVR = 0UL;
607 presource->TSPPvrcaParams._u32Flt1Flag_DscmbRef = 0UL;
608 presource->TSPPvrcaParams._bFLT1Dup_Enable = FALSE;
609 presource->TSPPvrcaParams._bCIPHSSMode = FALSE;
610 #endif
611 presource->TSPPvrcaParams._bPVRCA_Start = FALSE;
612
613 for(u32ii = 0; u32ii < TSP_PVR_IF_NUM; u32ii++)
614 {
615 presource->_PvrEvtNotify[u32ii] = E_DRVTSP_EVENT_DATA_INIT;
616 presource->_PvrCallback[u32ii] = 0;
617 }
618 #endif
619
620 presource->_phyTspFWDramBuf = 0UL;
621 presource->_u32TspFwDramBufSize = 0UL;
622
623 presource->_u32OrgCAMode = 0UL;
624
625 return TRUE;
626
627 }
628
_TSP_SwStateReset(MS_BOOL bInited)629 static void _TSP_SwStateReset(MS_BOOL bInited)
630 {
631 MS_U32 u32EngId, u32FilterId;
632 MS_U32 u32SecId = 0;
633
634 if(bInited == TRUE)
635 return;
636
637 for (u32EngId = 0; u32EngId < TSP_ENGINE_NUM; u32EngId++)
638 {
639 //TS0 Pid filter
640 for (u32FilterId = 0; u32FilterId < TSP_SECFLT_NUM; u32FilterId++)
641 {
642 _ptsp_res->_TspState[u32EngId].FltState[u32FilterId] = E_DRVTSP_FLT_STATE_NA;
643 _ptsp_res->_TspState[u32EngId].FltType[u32FilterId] = E_DRVTSP_FLT_TYPE_SECTION; // for section filter
644 _ptsp_res->_TspState[u32EngId].SecFltState[u32SecId] = E_DRVTSP_FLT_STATE_NA;
645 _ptsp_res->_TspState[u32EngId].SecBufState[u32SecId] = E_DRVTSP_FLT_STATE_NA;
646 _ptsp_res->_TspState[u32EngId].SecFltMode[u32SecId] = E_DRVTSP_FLT_MODE_CONTI;
647 _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecId] = E_DRVTSP_EVENT_DATA_INIT;
648 _ptsp_res->_TspState[u32EngId].SecFltCallback[u32SecId++] = NULL;
649 }
650
651 //TS1 Pid filter
652 for (; u32FilterId < (TSP_SECFLT_NUM + TSP_PIDFLT1_NUM); u32FilterId++)
653 {
654 _ptsp_res->_TspState[u32EngId].FltState[u32FilterId] = E_DRVTSP_FLT_STATE_FREE;
655 _ptsp_res->_TspState[u32EngId].FltType[u32FilterId] = E_DRVTSP_FLT_TYPE_PVR;
656 }
657
658 //TS2 Pid filter
659 #ifdef TS2_IF_SUPPORT
660
661 #ifndef TS2_LIVE_SUPPORT
662 for (; u32FilterId < (TSP_SECFLT_NUM + TSP_PIDFLT1_NUM + TSP_PIDFLT2_NUM); u32FilterId++)
663 #else
664 for (; u32FilterId < (TSP_SECFLT_NUM + TSP_PIDFLT1_NUM + TSP_SECFLT2_NUM); u32FilterId++)
665 #endif
666 {
667 _ptsp_res->_TspState[u32EngId].FltState[u32FilterId] = E_DRVTSP_FLT_STATE_FREE;
668
669 #ifndef TS2_LIVE_SUPPORT
670 _ptsp_res->_TspState[u32EngId].FltType[u32FilterId] = E_DRVTSP_FLT_TYPE_CB;
671 #else
672 _ptsp_res->_TspState[u32EngId].FltType[u32FilterId] = E_DRVTSP_FLT_TYPE_SECTION; // for section filter
673 _ptsp_res->_TspState[u32EngId].SecFltState[u32SecId] = E_DRVTSP_FLT_STATE_NA;
674 _ptsp_res->_TspState[u32EngId].SecBufState[u32SecId] = E_DRVTSP_FLT_STATE_NA;
675 _ptsp_res->_TspState[u32EngId].SecFltMode[u32SecId] = E_DRVTSP_FLT_MODE_CONTI;
676 _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecId] = E_DRVTSP_EVENT_DATA_INIT;
677 _ptsp_res->_TspState[u32EngId].SecFltCallback[u32SecId++] = NULL;
678 #endif
679 }
680 #endif
681
682 //HWPCR Pid filter
683 #ifdef HWPCR_ENABLE
684 _ptsp_res->_TspState[u32EngId].FltType[u32FilterId] = E_DRVTSP_FLT_TYPE_PCR;
685 #endif
686
687 }
688
689 }
690
_TSP_SW_Exit(void)691 static void _TSP_SW_Exit(void)
692 {
693 MS_U8 u8ii;
694
695 #ifndef MSOS_TYPE_LINUX_KERNEL
696 MS_U32 u32Timer, u32CurTime = 0;
697
698 _TSP_EXT_LOCK();
699 _db_flag = 1;
700 _TSP_EXT_UNLOCK();
701
702 _TSP_IND_UNLOCK();
703 u32Timer = MsOS_GetSystemTime();
704 // check _s32TspTaskId for NOS case
705 while(_s32TspTaskId > 0)
706 {
707 _TSP_SetEvent(TSP_TASK_EVENT_FLT_FREE);
708 _TSP_EXT_LOCK();
709 if (_db_flag == 2)
710 {
711 _TSP_EXT_UNLOCK();
712 break;
713 }
714 _TSP_EXT_UNLOCK();
715
716 u32CurTime = MsOS_GetSystemTime();
717 if(u32CurTime < u32Timer)
718 {
719 ULOGD("TSP", "[%s][%d] Systemtime Change %d \n", __FUNCTION__, __LINE__, (unsigned int)u32CurTime);
720 u32Timer = u32CurTime;
721 }
722 if ((u32CurTime-u32Timer) > 1000)
723 {
724 ULOGE("TSP", "[%s][%d] TSP task exit timeout!!!!!!\n", __FUNCTION__, __LINE__);
725 break;
726 }
727
728 }
729
730 _TSP_IND_LOCK();
731 /*if(_s32TspTaskId > 0)
732 {
733 MsOS_DeleteTask(_s32TspTaskId);
734 _s32TspTaskId = -1;
735 }*/
736 #else
737 //to free CB process task, so send one event
738 _TSP_SetEvent(TSP_TASK_EVENT_GROUP_SELF);
739 #endif
740
741 for (u8ii = 0; u8ii < ((TSP_SECFLT_NUM_All+31)>>5); u8ii++)
742 {
743 if(_s32TspSecRdyId[u8ii] != -1)
744 {
745 OSAL_TSP_EventDelete(_s32TspSecRdyId[u8ii]);
746 _s32TspSecRdyId[u8ii] = -1;
747 }
748 if(_s32TspSecOvfId[u8ii] != -1)
749 {
750 OSAL_TSP_EventDelete(_s32TspSecOvfId[u8ii]);
751 _s32TspSecOvfId[u8ii] = -1;
752 }
753 if(_s32TspSecCrcId[u8ii] != -1)
754 {
755 OSAL_TSP_EventDelete(_s32TspSecCrcId[u8ii]);
756 _s32TspSecCrcId[u8ii] = -1;
757 }
758 if(_s32TspFltDisableId[u8ii] != -1)
759 {
760 OSAL_TSP_EventDelete(_s32TspFltDisableId[u8ii]);
761 _s32TspFltDisableId[u8ii] = -1;
762 }
763 }
764
765 #if 0
766 for (u8ii = 0; u8ii < ((TSP_PIDFLT_NUM_ALL+31)>>5); u8ii++)
767 {
768 if(_s32EventFree0[u8ii] != -1)
769 {
770 OSAL_TSP_EventDelete(_s32EventFree0[u8ii]);
771 _s32EventFree0[u8ii] = -1;
772 }
773 if(_s32EventFreeDefer0[u8ii] != -1)
774 {
775 OSAL_TSP_EventDelete(_s32EventFreeDefer0[u8ii]);
776 _s32EventFreeDefer0[u8ii] = -1;
777 }
778 if(_s32DoneFlags[u8ii] != -1)
779 {
780 OSAL_TSP_EventDelete(_s32DoneFlags[u8ii]);
781 _s32DoneFlags[u8ii] = -1;
782 }
783 }
784 #endif
785
786 if (_s32ExtMutexId != -1)
787 {
788 _TSP_EXT_LOCK();
789 _TSP_EXT_UNLOCK();
790 MsOS_DeleteMutex(_s32ExtMutexId);
791 _s32ExtMutexId = -1;
792 _db_flag = 0;
793 }
794
795 if (_s32TspEventId != -1)
796 {
797 #ifdef DMX_UTOPIA_2K
798 MsOS_DelayTask(3);
799 #endif
800
801 while(OSAL_TSP_EventDelete(_s32TspEventId) == FALSE)
802 {
803 MsOS_DelayTask(3);
804 printf("Waiting for evet deleting... \n");
805 }
806 _s32TspEventId = -1;
807 }
808
809 //checking if stiil there are other processes exist
810 if(--_ptsp_res->_u32ProcessNum > 0)
811 return;
812
813 if (_ptsp_res->_s32IntRegMutexId != -1)
814 {
815 _TSP_INT_LOCK();
816 _TSP_INT_UNLOCK();
817 MsOS_DeleteMutex(_ptsp_res->_s32IntRegMutexId);
818 _ptsp_res->_s32IntRegMutexId = -1;
819 }
820
821 if (_ptsp_res->_s32IndMutexId != -1)
822 {
823 MsOS_ReleaseMutex(_ptsp_res->_s32IndMutexId);
824 MsOS_DeleteMutex(_ptsp_res->_s32IndMutexId);
825 _ptsp_res->_s32IndMutexId = -1;
826 }
827
828 if (_ptsp_res->_s32TspMutexId != -1)
829 {
830 MsOS_ReleaseMutex(_ptsp_res->_s32TspMutexId);
831 MsOS_DeleteMutex(_ptsp_res->_s32TspMutexId);
832 _ptsp_res->_s32TspMutexId = -1;
833 }
834
835 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_EXIT;
836 _ptsp_res->_bSWInitReady = FALSE;
837
838 }
839
840
_TSP_Close(void)841 static void _TSP_Close(void)
842 {
843 HAL_TSP_Int_Disable(TSP_HWINT_ALL);
844 #ifdef TS2_IF_SUPPORT
845 HAL_TSP_Int2_Disable(TSP_HWINT2_ALL);
846 #endif
847 OSAL_TSP_IntDisable();
848 OSAL_TSP_IntDetach();
849 HAL_TSP_WbDmaEnable(FALSE);
850 HAL_TSP_SetCtrlMode(0, 0, TSP_IF_NUM);
851 _TSP_SW_Exit();
852 HAL_TSP_PowerCtrl(DISABLE);
853 HAL_TSP_HW_Lock_Release();
854 }
855
856
_TSP_RegStateStore(void)857 static void _TSP_RegStateStore(void)
858 {
859 HAL_TSP_Int_Disable(TSP_HWINT_ALL);
860 #ifdef TS2_IF_SUPPORT
861 HAL_TSP_Int2_Disable(TSP_HWINT2_ALL);
862 #endif
863 OSAL_TSP_IntDisable();
864 OSAL_TSP_IntDetach();
865 HAL_TSP_SaveFltState();
866 }
867
868
_TSP_RegStateRestore(void)869 static void _TSP_RegStateRestore(void)
870 {
871 HAL_TSP_RestoreFltState();
872 }
873
874 #ifndef NO_CA
875
876 #if 0
_TSP_DumpDscmbDupArray(void)877 static MS_BOOL _TSP_DumpDscmbDupArray(void)
878 {
879 MS_U32 u32ii = 0;
880
881 ULOGD("TSP", "[%s][%d]\n", __FUNCTION__, __LINE__);
882
883 for(u32ii = 0; u32ii < DSCMB_FLT_NUM_ALL; u32ii++)
884 {
885 ULOGD("TSP", "FLT1 %ld, %x \n", u32ii, _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii]);
886 ULOGD("TSP", "FLT0 %ld, %x \n", u32ii, _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii]);
887 ULOGD("TSP", "FLT2 %ld, %x \n", u32ii, _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ii]);
888 }
889 ULOGD("TSP", "_u32Flt1Flag_DscmbRef %lx , _u32Flt1Flag_DscmbPVR %lx\n",
890 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef, _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR);
891
892 return TRUE;
893 }
894 #endif
895
_TSP_SetNewDscmbPid2FLT1(MS_U32 u32EngId,MS_U32 u32Flt1Id,MS_U16 u32Pid)896 static MS_BOOL _TSP_SetNewDscmbPid2FLT1(MS_U32 u32EngId, MS_U32 u32Flt1Id, MS_U16 u32Pid)
897 {
898 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32Flt1Id + TSP_SECFLT_NUM), u32Pid);
899 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32Flt1Id] = u32Pid;
900 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32Flt1Id);
901
902 return TRUE;
903 }
904
_TSP_FreeDscmbPid_In_FLT1(MS_U32 u32EngId,MS_U32 u32Flt1Id)905 static MS_BOOL _TSP_FreeDscmbPid_In_FLT1(MS_U32 u32EngId, MS_U32 u32Flt1Id)
906 {
907 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32Flt1Id] = DRVTSP_PID_NULL;
908 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef &= ~(1 << u32Flt1Id);
909 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32Flt1Id + TSP_SECFLT_NUM), DRVTSP_PID_NULL);
910
911 return TRUE;
912 }
913
_TSP_FreeDupDscmbPidFlt(MS_U32 u32EngId,MS_U32 u32FltGroupId,MS_U32 u32CaMode)914 static MS_BOOL _TSP_FreeDupDscmbPidFlt(MS_U32 u32EngId, MS_U32 u32FltGroupId, MS_U32 u32CaMode)
915 {
916 MS_U32 u32ii = 0, u32jj = 0, u32kk = 0;
917
918 #ifdef EXT_PVR1_FLT
919 MS_U32 u32DscmbFltNum = DSCMB_FLT_NUM_ALL;
920 #else
921 MS_U32 u32DscmbFltNum = DSCMB_FLT_NUM;
922 #endif
923
924 //MS_BOOL bScmbLive0 = ((u32CaMode & TSP_CA_OUTPUT_PLAY_LIVE) ? TRUE: FALSE);
925
926 #ifdef TS2_LIVE_SUPPORT
927 MS_BOOL bScmbLive1 = (((u32CaMode & (TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_PLAY_LIVE2)) == TSP_CA_OUTPUT_PLAY_LIVE2)? TRUE: FALSE);
928 MS_BOOL bScmbRc1 = ((u32CaMode &TSP_CA_OUTPUT_PLAY_LIVE2) ? TRUE: FALSE);
929 #endif
930
931 if(((u32CaMode & TSP_CA_INPUT_TSIF1) == 0) || ((u32CaMode & TSP_CA_OUTPUT_REC) != 0))
932 return FALSE;
933
934 //Free FLT0
935 if((u32FltGroupId == 0) &&
936 ((u32CaMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)))
937 {
938 PVRCA_DBG(ULOGD("TSP", "[%s][%d] Free FLT0 list \n", __FUNCTION__, __LINE__));
939
940 for(u32ii = 0; u32ii < u32DscmbFltNum; u32ii++)
941 {
942 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii] == DRVTSP_PID_NULL)
943 continue;
944
945 //Remove all duplicate filter in Group1
946 for(u32jj = 0; u32jj < u32DscmbFltNum; u32jj++)
947 {
948 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii] == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32jj])
949 {
950 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef &= ~(1 << u32jj);
951 if(((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef|_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR) & (1 << u32jj)) == 0)
952 {
953 _TSP_FreeDscmbPid_In_FLT1(u32EngId, u32jj);
954 PVRCA_DBG(sd_print("Free Group0: FLT0 id %ld, FLT1 id %ld, PID 0x%x \n", u32ii, u32jj, _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii]));
955 }
956 }
957 }
958
959 for(u32kk = 0; u32kk < u32DscmbFltNum; u32kk++)
960 {
961 if(u32kk == u32ii)
962 continue;
963
964 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32kk] == _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii])
965 {
966 PVRCA_DBG(ULOGD("TSP", "[%s]Free Group0: FLT0 id %ld, FLT1 id %ld, PID 0x%x \n", __FUNCTION__, u32kk, u32jj, _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32kk]));
967 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32kk] = DRVTSP_PID_NULL;
968 }
969 }
970
971 PVRCA_DBG(ULOGD("TSP", "[%s]Free Group0: FLT0 id %ld, FLT1 id %ld, PID 0x%x \n", __FUNCTION__, u32ii, u32jj, _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii]));
972 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii] = DRVTSP_PID_NULL;
973
974 }
975
976 return TRUE;
977 }
978
979 //Free FLT2
980 #ifdef TS2_LIVE_SUPPORT
981 if((u32FltGroupId == 2) &&
982 ((u32CaMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_PLAY_LIVE2)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2)))
983 {
984 PVRCA_DBG(ULOGD("TSP", "[%s][%d] Free FLT2 list \n", __FUNCTION__, __LINE__));
985
986 for(u32ii = 0; u32ii < DSCMB_FLT_NUM; u32ii++)
987 {
988 if(_ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ii] == DRVTSP_PID_NULL)
989 continue;
990
991 //Remove all duplicate filter in Group1
992 for(u32jj = 0; u32jj < DSCMB_FLT_NUM; u32jj++)
993 {
994 if(_ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ii] == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32jj])
995 {
996 if(bScmbLive1)
997 {
998 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef &= ~(1 << u32jj);
999 }
1000 if(bScmbRc1)
1001 {
1002 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR &= ~(1 << u32jj);
1003 }
1004 if(((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef|_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR) & (1 << u32jj)) == 0)
1005 {
1006 _TSP_FreeDscmbPid_In_FLT1(u32EngId, u32jj);
1007 PVRCA_DBG(sd_print("Free Group2: FLT2 id %ld, FLT1 id %ld, PID 0x%x \n", u32ii, u32jj, _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ii]));
1008 }
1009 }
1010 }
1011
1012 //check if any other FLT2 filter using the same pid
1013 for(u32kk = 0; u32kk < DSCMB_FLT_NUM; u32kk++)
1014 {
1015 if(u32kk == u32ii)
1016 continue;
1017
1018 if(_ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32kk] == _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ii])
1019 {
1020 PVRCA_DBG(ULOGD("TSP", "[%s]Free Group2: FLT2 id %ld, FLT1 id %ld, PID 0x%x \n", __FUNCTION__, u32kk, u32jj, _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32kk]));
1021 _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32kk] = DRVTSP_PID_NULL;
1022 }
1023 }
1024 PVRCA_DBG(ULOGD("TSP", "[%s]Free Group2: FLT2 id %ld, FLT1 id %ld, PID 0x%x \n", __FUNCTION__, u32ii, u32jj, _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ii]));
1025 _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ii] = DRVTSP_PID_NULL;
1026
1027 }
1028
1029 return TRUE;
1030 }
1031 #endif
1032
1033 return FALSE;
1034 }
1035
_TSP_DupDscmbPidFlt(MS_U32 u32EngId,MS_U32 OrgFltId,MS_U32 DupFltId)1036 static MS_BOOL _TSP_DupDscmbPidFlt(MS_U32 u32EngId, MS_U32 OrgFltId, MS_U32 DupFltId)
1037 {
1038 MS_U32 u32pid = DRVTSP_PID_NULL, u32ii = 0;
1039 MS_U32 u32OrgFltListIdx = 0;
1040
1041 #ifdef EXT_PVR1_FLT
1042 MS_U32 u32DscmbFltNum = DSCMB_FLT_NUM_ALL;
1043 #else
1044 MS_U32 u32DscmbFltNum = DSCMB_FLT_NUM;
1045 #endif
1046
1047 PVRCA_DBG(ULOGD("TSP", "[%s][%d] OrgFltId %ld, DupFltId %ld, FltType %lx\n",
1048 __FUNCTION__, __LINE__, OrgFltId, DupFltId, _ptsp_res->_TspState[u32EngId].FltType[OrgFltId]));
1049
1050 if( (_ptsp_res->_TspState[u32EngId].FltType[OrgFltId] == E_DRVTSP_FLT_TYPE_SECTION) ||
1051 (_ptsp_res->_TspState[u32EngId].FltType[OrgFltId] == E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI) ||
1052 (_ptsp_res->_TspState[u32EngId].FltType[OrgFltId] == E_DRVTSP_FLT_TYPE_PACKET) ||
1053 (_ptsp_res->_TspState[u32EngId].FltType[OrgFltId] == E_DRVTSP_FLT_TYPE_SECTION_VER) ||
1054 (_ptsp_res->_TspState[u32EngId].FltType[OrgFltId] == E_DRVTSP_FLT_TYPE_PCR))
1055 {
1056 return FALSE;
1057 }
1058
1059 u32pid = HAL_TSP_PidFlt_GetPid(HAL_TSP_GetPidFltReg(u32EngId, OrgFltId));
1060 PVRCA_DBG(ULOGD("TSP", "[%s][%d] Org pid %lx\n", __FUNCTION__, __LINE__, u32pid));
1061 if(u32pid == DRVTSP_PID_NULL)
1062 {
1063 return FALSE;
1064 }
1065
1066 //Group TS0 -> Group TS1
1067 if(OrgFltId <= DSCMB_FLT_END_ID)
1068 {
1069 #ifdef EXT_PVR1_FLT
1070 if(OrgFltId < DSCMB_FLT_START_ID)
1071 {
1072 u32OrgFltListIdx = OrgFltId + DSCMB_FLT_NUM;
1073 }
1074 else
1075 #endif
1076 {
1077 u32OrgFltListIdx = OrgFltId - DSCMB_FLT_START_ID;
1078 }
1079
1080 PVRCA_DBG(ULOGD("TSP", "[%s][%d] #1 u32OrgFltListIdx %ld \n" ,__FUNCTION__, __LINE__, u32OrgFltListIdx));
1081
1082 //searching the same pid in FLT1
1083 for(u32ii = 0; u32ii < u32DscmbFltNum; u32ii++)
1084 {
1085 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] == u32pid)
1086 {
1087 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32ii);
1088 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32OrgFltListIdx] = u32pid;
1089 PVRCA_DBG(ULOGD("TSP", "[%s] Repeate: OrgFltId %ld, DupFltId %ld, u32pid 0x%lx\n", __FUNCTION__, OrgFltId, u32ii+TSP_SECFLT_NUM, u32pid));
1090 return TRUE;
1091 }
1092 }
1093
1094 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32OrgFltListIdx] = u32pid;
1095
1096 }
1097 #ifdef TS2_LIVE_SUPPORT
1098 else if((OrgFltId >= (TSP_SECFLT_NUM+TSP_PIDFLT1_NUM)) && (OrgFltId < (TSP_SECFLT_NUM+TSP_PIDFLT1_NUM + DSCMB_FLT_NUM)))//Group TS2 -> Group TS1
1099 {
1100 u32OrgFltListIdx = OrgFltId - TSP_SECFLT_NUM - TSP_PIDFLT1_NUM;
1101
1102 PVRCA_DBG(ULOGD("TSP", "[%s][%d] #2 u32OrgFltListIdx %ld \n" , __FUNCTION__, __LINE__, u32OrgFltListIdx));
1103
1104 //TS2 has no share key filters
1105 if(u32OrgFltListIdx >= DSCMB_FLT_NUM)
1106 {
1107 return FALSE;
1108 }
1109
1110 //searching the same pid in FLT1 and before current index
1111 for(u32ii = 0; u32ii < DSCMB_FLT_NUM; u32ii++)
1112 {
1113 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] == u32pid)
1114 {
1115 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32ii);
1116 _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32OrgFltListIdx] = u32pid;
1117 PVRCA_DBG(ULOGD("TSP", "[%s][%d] Repeate: OrgFltId %ld, DupFltId %ld, u32pid 0x%lx\n", __FUNCTION__, __LINE__, OrgFltId, u32ii+TSP_SECFLT_NUM+TSP_PIDFLT1_NUM, u32pid));
1118 return TRUE;
1119 }
1120 }
1121
1122 _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32OrgFltListIdx] = u32pid;
1123 }
1124 #endif
1125 else
1126 {
1127 PVRCA_DBG(ULOGD("TSP", "[%s][%d] 333 OrgFltId %ld \n" , __FUNCTION__, __LINE__, OrgFltId));
1128 return FALSE;
1129 }
1130
1131 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, DupFltId), u32pid);
1132 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[DupFltId - TSP_SECFLT_NUM] = u32pid;
1133 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << (DupFltId - TSP_SECFLT_NUM));
1134
1135 PVRCA_DBG(ULOGD("TSP", "[%s][%d] OrgFltId %ld, DupFltId %ld, u32pid 0x%lx\n", __FUNCTION__, __LINE__, OrgFltId, DupFltId, u32pid));
1136
1137 return TRUE;
1138 }
1139
1140 // If dscmb source from TS1, when live filter PIDs changing, also change dscmb PID mapping. (PVR filters)
_TSP_FLT1_DupFLT0_Pid(MS_U32 u32EngId,MS_U32 u32Flt0Id,MS_U32 u32Pid)1141 static MS_BOOL _TSP_FLT1_DupFLT0_Pid(MS_U32 u32EngId, MS_U32 u32Flt0Id, MS_U32 u32Pid)
1142 {
1143 MS_U32 u32ii = 0, u32jj = 0, u32kk = 0, u32Flt1_id = 0;
1144 MS_U32 u32mask = 0, u32Flt0ListId = 0;
1145 MS_BOOL bFreeDscmbPid = FALSE;
1146
1147 #ifdef EXT_PVR1_FLT
1148 MS_U32 u32DscmbFltNum = DSCMB_FLT_NUM_ALL;
1149 #else
1150 MS_U32 u32DscmbFltNum = DSCMB_FLT_NUM;
1151 #endif
1152
1153 if( (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_SECTION) ||
1154 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI) ||
1155 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_PACKET) ||
1156 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_SECTION_VER) ||
1157 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_PCR))
1158 {
1159 return FALSE;
1160 }
1161
1162 // Not in TS1 CA mode , not need to duplicate FLT0 pid to FLT1
1163 if((HAL_TSP_CSA_Get_ScrmPath() & TSP_CA_INPUT_TSIF1) == 0)
1164 {
1165 return FALSE;
1166 }
1167
1168 //If CA output to TS2 only, not need to duplicate FLT0 to FLT1
1169 #ifdef TS2_LIVE_SUPPORT
1170 if((HAL_TSP_CSA_Get_ScrmPath() & (TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_PLAY_LIVE2)) == TSP_CA_OUTPUT_PLAY_LIVE2)
1171 {
1172 return FALSE;
1173 }
1174 #endif
1175
1176 //If Not PVRCA case, just duplicate FLT0 to FLT1 directly
1177 if(_ptsp_res->TSPPvrcaParams._bFLT1Dup_Enable == FALSE)
1178 {
1179 if((HAL_TSP_CSA_Get_ScrmPath() & TSP_CA_OUTPUT_PLAY_LIVE) == 0)
1180 {
1181 return FALSE;
1182 }
1183
1184 if(u32Flt0Id > DSCMB_FLT_END_ID)
1185 {
1186 return FALSE;
1187 }
1188 #ifdef EXT_PVR1_FLT
1189 // mapping FLT0 #0~#15 to FLT1 #16~#31
1190 if(u32Flt0Id <= DSCMB_FLT_SHAREKEY_END_ID)
1191 {
1192 u32Flt1_id = DSCMB_FLT_NUM + u32Flt0Id;
1193 }
1194 #endif
1195
1196 // mapping FLT0 #16~#31 to FLT1 #0~#15
1197 if((u32Flt0Id <= DSCMB_FLT_END_ID) && (u32Flt0Id >= DSCMB_FLT_START_ID))
1198 {
1199 u32Flt1_id = u32Flt0Id - DSCMB_FLT_START_ID;
1200 }
1201 u32Flt0ListId = u32Flt1_id;
1202
1203 PVRCA_DBG(ULOGD("TSP", "[%s] u32Flt0Id %ld, New PID 0x%lx, Old PID 0x%x\n",
1204 __FUNCTION__, u32Flt0Id, u32Pid, _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt0Id]));
1205
1206 //=============================================//
1207 // Only put one pid in DSCMB list //
1208 //=============================================//
1209
1210 //Free PID filter
1211 if(u32Pid == DRVTSP_PID_NULL)
1212 {
1213 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt0ListId] == DRVTSP_PID_NULL)
1214 {
1215 return FALSE;
1216 }
1217
1218 for(u32ii = 0; u32ii < u32DscmbFltNum; u32ii++)
1219 {
1220 // Find the same Pid in FLT1 list
1221 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt0ListId] == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii])
1222 {
1223 //Check if the sam pid in FLT0, still use for dscmbling...
1224 for(u32jj = 0; u32jj < u32DscmbFltNum; u32jj++)
1225 {
1226 if(u32jj == u32Flt0ListId)
1227 continue;
1228 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32jj] == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii])
1229 {
1230 break; //dscmb pid is still used
1231 }
1232 }
1233 if(u32jj == u32DscmbFltNum)
1234 {
1235 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef &= ~(1 << u32ii);
1236 }
1237 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt0ListId] = DRVTSP_PID_NULL;
1238
1239 if(((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR|_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef) & (1 << u32ii)) != 0)
1240 {
1241 return FALSE;
1242 }
1243 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32ii + TSP_SECFLT_NUM), DRVTSP_PID_NULL);
1244 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] = DRVTSP_PID_NULL;
1245 PVRCA_DBG(ULOGD("TSP", "[%s] Free Null pid, u32Flt0Id %ld, Flt1Id 0x%ld\n", __FUNCTION__, u32Flt0Id, u32ii));
1246 return TRUE;
1247 }
1248 }
1249
1250 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt0ListId] = DRVTSP_PID_NULL;
1251 return FALSE;
1252 }
1253
1254 //--- Checking mapping position first ----
1255
1256 //--- 1st, find the same pid already in FLT1 list.....
1257 for(u32ii = 0; u32ii < u32DscmbFltNum; u32ii++)
1258 {
1259 // Find the same Pid in FLT1 list
1260 if(u32Pid == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii])
1261 {
1262 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32ii);
1263 break;
1264 }
1265 }
1266
1267 //Sam pid found, check if the mapping position pid used, if not, free it
1268 if(u32ii < u32DscmbFltNum)
1269 {
1270 //ckeck if current pid is still for dscmbling....
1271 for(u32jj = 0; u32jj < u32DscmbFltNum; u32jj++)
1272 {
1273 if(u32jj == u32Flt0ListId)
1274 continue;
1275 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt0ListId] == _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32jj])
1276 {
1277 break;
1278 }
1279 }
1280 //if mapping dscmb pid is not used....
1281 if(u32jj == u32DscmbFltNum)
1282 {
1283 for(u32kk = 0; u32kk < u32DscmbFltNum; u32kk++)
1284 {
1285 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt0ListId] == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32kk])
1286 {
1287 break;
1288 }
1289 }
1290
1291 if(u32kk < u32DscmbFltNum)
1292 {
1293 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef &= ~(1 << u32kk);
1294 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32kk + TSP_SECFLT_NUM), DRVTSP_PID_NULL);
1295 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32kk] = DRVTSP_PID_NULL;
1296 }
1297 }
1298
1299 PVRCA_DBG(ULOGD("TSP", "[%s]Du32Flt0ListId %ld , u32Flt1_id %ld ---------------------\n", __FUNCTION__, u32Flt0ListId, u32ii));
1300
1301 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt0ListId] = u32Pid;
1302 return TRUE;
1303 }
1304 //--- 1st, end...
1305
1306 //2nd, find mapping position if empty, use it
1307 if(((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR| _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef) & (1 << u32Flt1_id)) == 0)
1308 {
1309 goto UPDATE_PARAM;
1310 }
1311
1312 //--- 3rd, if mapping position is not empty, checking if the dscmb pid still used...
1313 for(u32ii = 0; u32ii < u32DscmbFltNum; u32ii++)
1314 {
1315 if(u32ii == u32Flt0ListId)
1316 continue;
1317 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32Flt1_id] == _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii])
1318 {
1319 break;
1320 }
1321 }
1322 if(u32ii == u32DscmbFltNum)
1323 {
1324 goto UPDATE_PARAM;
1325 }
1326 //--- 3rd, end...
1327
1328 //4th, find any empty position for new pid, because mapping postion is occupied
1329 for(u32ii = 0; u32ii < u32DscmbFltNum; u32ii++)
1330 {
1331 if(((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR| _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef) & (1 << u32ii)) == 0)
1332 {
1333 u32Flt1_id = u32ii;
1334 goto UPDATE_PARAM;
1335 }
1336 }
1337
1338 PVRCA_DBG(ULOGD("TSP", "[%s][%d] failed \n", __FUNCTION__, __LINE__));
1339
1340 return FALSE;
1341
1342 UPDATE_PARAM:
1343 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32Flt1_id);
1344 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt0ListId] = u32Pid;
1345 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32Flt1_id] = u32Pid;
1346 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32Flt1_id + TSP_SECFLT_NUM), u32Pid);
1347
1348 PVRCA_DBG(ULOGD("TSP", "[%s] u32Flt0Id %ld, u32Flt1_id %ld, PID 0x%lx\n", __FUNCTION__, u32Flt0Id, u32Flt1_id, u32Pid));
1349
1350 return TRUE;
1351 }
1352
1353 PVRCA_DBG(ULOGD("TSP", "[%s] u32Flt0Id %ld, PID 0x%lx\n", __FUNCTION__, u32Flt0Id, u32Pid));
1354
1355 // transfer FLT0 index to FLT1 index
1356 if((u32Flt0Id >= DSCMB_FLT_START_ID) && (u32Flt0Id <= DSCMB_FLT_END_ID))
1357 {
1358 u32Flt1_id = u32Flt0Id - DSCMB_FLT_START_ID;
1359 }
1360 #ifdef EXT_PVR1_FLT
1361 else if((u32Flt0Id >= DSCMB_FLT_SHAREKEY_START_ID) && (u32Flt0Id <= DSCMB_FLT_SHAREKEY_END_ID))
1362 {
1363 u32Flt1_id = DSCMB_FLT_NUM + u32Flt0Id - DSCMB_FLT_SHAREKEY_START_ID;
1364 }
1365 #endif
1366 else
1367 {
1368 return FALSE; //not in dscmb filter range, not need to duplicate
1369 }
1370
1371 // if pid is null or section type, free this dscmb pid setting
1372 if( (u32Pid == DRVTSP_PID_NULL) ||
1373 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_SECTION) ||
1374 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI) ||
1375 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_PACKET) ||
1376 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_SECTION_VER))
1377 {
1378 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt1_id] == DRVTSP_PID_NULL)
1379 {
1380 return TRUE;
1381 }
1382 else
1383 {
1384 bFreeDscmbPid = TRUE;
1385 }
1386 }
1387
1388 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32Flt0Id %ld, PID 0x%lx\n", __FUNCTION__, __LINE__, u32Flt0Id, u32Pid));
1389
1390 //------------------------------------------------------------------------------ //
1391
1392 // Finding the same pid with live dscmb pid in PVR pid list, and release it
1393 if(_ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt1_id] != DRVTSP_PID_NULL)
1394 {
1395 for(u32ii = 0; u32ii < u32DscmbFltNum; u32ii++)
1396 {
1397 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] == DRVTSP_PID_NULL)
1398 continue;
1399
1400 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] == _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt1_id])
1401 {
1402 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef &= ~(1 << u32ii);
1403 if((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR & (1 << u32ii)) == 0)
1404 {
1405 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] = DRVTSP_PID_NULL;
1406 if(bFreeDscmbPid)
1407 {
1408 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32ii + TSP_SECFLT_NUM), DRVTSP_PID_NULL);
1409 }
1410 }
1411 break;
1412 }
1413 }
1414 }
1415
1416 // free dscmb pid
1417 if(bFreeDscmbPid)
1418 {
1419 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt1_id] = DRVTSP_PID_NULL;
1420
1421 PVRCA_DBG(ULOGD("TSP", "_u32Flt1Flag_DscmbRef 0x%lx, _u32Flt1Flag_DscmbPVR 0x%lx\n", \
1422 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef, _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR));
1423 PVRCA_DBG(ULOGD("TSP", "#1 _u16Flt0DscmbPidList[%ld] 0x%x\n", u32Flt1_id, _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt1_id]));
1424 return TRUE;
1425 }
1426
1427 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt1_id] = u32Pid;
1428
1429 // Searching new pid in FLT1 list
1430 for(u32ii = 0; u32ii < u32DscmbFltNum; u32ii++)
1431 {
1432 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] == DRVTSP_PID_NULL)
1433 continue;
1434
1435 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] == u32Pid)
1436 {
1437 // If the same pid index is in the back, free it and setting the new pid in the front
1438 if((u32ii > u32Flt1_id) && ((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR & (1 << u32Flt1_id)) == 0))
1439 {
1440 _TSP_SetNewDscmbPid2FLT1(u32EngId, u32Flt1_id, u32Pid);
1441 _TSP_FreeDscmbPid_In_FLT1(u32EngId, u32ii);
1442 }
1443 else
1444 {
1445 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32ii);
1446 }
1447 PVRCA_DBG(ULOGD("TSP", "_u32Flt1Flag_DscmbRef 0x%lx, _u32Flt1Flag_DscmbPVR 0x%lx\n", \
1448 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef, _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR));
1449 PVRCA_DBG(ULOGD("TSP", "#2 _u16Flt0DscmbPidList[%ld] 0x%x, _u16Flt1PidList[%ld] 0x%x\n", \
1450 u32Flt1_id, _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt1_id], u32ii, _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii]));
1451 return TRUE;
1452 }
1453 }
1454
1455 // If not found the new pid in FLT1 list, setting one to FLT1 list
1456 if(u32ii == u32DscmbFltNum)
1457 {
1458 u32mask = _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef | _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR;
1459
1460 //check corresponding position first
1461 if((u32mask & (1 << u32Flt1_id)) == 0)
1462 {
1463 u32ii = u32Flt1_id;
1464 }
1465 else
1466 {
1467 //finding a new empty position
1468 for(u32ii = 0; u32ii < u32DscmbFltNum; u32ii++)
1469 {
1470 if((u32mask & 0x01) == 0)
1471 {
1472 break;
1473 }
1474 u32mask >>= 1;
1475 }
1476 }
1477
1478 if(u32ii < u32DscmbFltNum)
1479 {
1480 _TSP_SetNewDscmbPid2FLT1(u32EngId, u32ii, u32Pid);
1481 PVRCA_DBG(ULOGD("TSP", "_u32Flt1Flag_DscmbRef 0x%lx, _u32Flt1Flag_DscmbPVR 0x%lx\n", \
1482 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef, _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR));
1483 PVRCA_DBG(ULOGD("TSP", "#3 _u16Flt0DscmbPidList[%ld] 0x%x, _u16Flt1PidList[%ld] 0x%x\n", \
1484 u32Flt1_id, _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32Flt1_id], u32ii, _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii]));
1485 return TRUE;
1486 }
1487 else
1488 {
1489 return FALSE;
1490 }
1491 }
1492
1493 return FALSE;
1494 }
1495
1496 // If dscmb source from TS1, and output to TS2, must duplicate FLT2 Pid to FLT1
1497 #ifdef TS2_LIVE_SUPPORT
_TSP_FLT1_DupFLT2_Pid(MS_U32 u32EngId,MS_U32 u32Flt2Id,MS_U32 u32Pid)1498 static MS_BOOL _TSP_FLT1_DupFLT2_Pid(MS_U32 u32EngId, MS_U32 u32Flt2Id, MS_U32 u32Pid)
1499 {
1500 MS_U32 u32CaPath = 0;
1501 MS_U32 u32ArrayIdx = 0, u32ii = 0, u32jj = 0, u32kk = 0, u32FLt1Id = 0;
1502
1503 //only process FLT2
1504 if(u32Flt2Id < (TSP_SECFLT_NUM + TSP_PIDFLT1_NUM))
1505 return FALSE;
1506
1507 // if pid is section type, free this dscmb pid setting
1508 if( (_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_SECTION) ||
1509 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI) ||
1510 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_PACKET) ||
1511 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_SECTION_VER) ||
1512 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_PCR))
1513 {
1514 return FALSE;
1515 }
1516
1517 u32CaPath = HAL_TSP_CSA_Get_ScrmPath();
1518
1519 //If CA input is TS2, not need to duplicate FLT2 to FLT1
1520 if(u32CaPath & TSP_CA_INPUT_TSIF2_EN)
1521 {
1522 return FALSE;
1523 }
1524
1525 if((u32CaPath & TSP_CA_OUTPUT_PLAY_LIVE2) == 0)
1526 {
1527 return FALSE;
1528 }
1529
1530 //=============================================//
1531 // Only put one pid in DSCMB list //
1532 //=============================================//
1533
1534 u32ArrayIdx = u32Flt2Id - TSP_PIDFLT1_NUM - TSP_SECFLT_NUM;
1535
1536 PVRCA_DBG(ULOGD("TSP", "[%s] u32Flt2Id %ld, New PID 0x%lx, Old PID 0x%x\n",
1537 __FUNCTION__, u32Flt2Id, u32Pid, _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ArrayIdx]));
1538
1539 //Free PID filter
1540 if(u32Pid == DRVTSP_PID_NULL)
1541 {
1542 if(_ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ArrayIdx] == DRVTSP_PID_NULL)
1543 {
1544 return FALSE;
1545 }
1546
1547 for(u32ii = 0; u32ii < DSCMB_FLT_NUM; u32ii++)
1548 {
1549 // Find the same Pid in FLT1 list
1550 if(_ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ArrayIdx] == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii])
1551 {
1552 //Check if the sam pid in FLT2, still use this dscmb pid...
1553 for(u32jj = 0; u32jj < DSCMB_FLT_NUM; u32jj++)
1554 {
1555 if(u32jj == u32ArrayIdx)
1556 continue;
1557 if(_ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32jj] == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii])
1558 {
1559 break; //dscmb pid is still used
1560 }
1561 }
1562 if(u32jj == DSCMB_FLT_NUM)
1563 {
1564 if(_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_CB)
1565 {
1566 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR &= ~(1 << u32ii);
1567 }
1568 else
1569 {
1570 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef &= ~(1 << u32ii);
1571 }
1572 }
1573 _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ArrayIdx] = DRVTSP_PID_NULL;
1574 if(((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR|_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef) & (1 << u32ii)) != 0)
1575 {
1576 PVRCA_DBG(ULOGE("TSP", "[%s][%d] Free Null pid used, u32Flt2Id %ld, Flt1Id 0x%ld\n", __FUNCTION__, __LINE__, u32ArrayIdx, u32ii));
1577 return FALSE;
1578 }
1579 PVRCA_DBG(ULOGD("TSP", "[%s] Free Null pid, u32Flt2Id %ld, Flt1Id 0x%ld\n", __FUNCTION__, u32ArrayIdx, u32ii));
1580 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32ii + TSP_SECFLT_NUM), DRVTSP_PID_NULL);
1581 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] = DRVTSP_PID_NULL;
1582 return TRUE;
1583 }
1584 }
1585
1586 _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ArrayIdx] = DRVTSP_PID_NULL;
1587
1588 return FALSE;
1589 }
1590
1591 //--- Checking mapping position first ----
1592
1593 //--- 1st, find the same pid already in FLT1 list.....
1594 for(u32ii = 0; u32ii < DSCMB_FLT_NUM; u32ii++)
1595 {
1596 // Find the same Pid in FLT1 list
1597 if(u32Pid == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii])
1598 {
1599 if(_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_CB)
1600 {
1601 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR |= (1 << u32ii);
1602 }
1603 else
1604 {
1605 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32ii);
1606 }
1607 break;
1608 }
1609 }
1610 //Sam pid found, check if the mapping position pid used, if not, free it
1611 if(u32ii < DSCMB_FLT_NUM)
1612 {
1613 for(u32jj = 0; u32jj < DSCMB_FLT_NUM; u32jj++)
1614 {
1615 if(u32jj == u32ArrayIdx)
1616 continue;
1617 if(_ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ArrayIdx] == _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32jj])
1618 {
1619 break;
1620 }
1621 }
1622 //Finding the same dscmb pid, if it is not used any more..., free it
1623 if(u32jj == DSCMB_FLT_NUM)
1624 {
1625 for(u32kk = 0; u32kk < DSCMB_FLT_NUM; u32kk++)
1626 {
1627 if(_ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ArrayIdx] == _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32kk])
1628 {
1629 break;
1630 }
1631 }
1632 if(u32kk < DSCMB_FLT_NUM)
1633 {
1634 if(_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_CB)
1635 {
1636 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR &= ~(1 << u32kk);
1637 }
1638 else
1639 {
1640 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef &= ~(1 << u32kk);
1641 }
1642 if(((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR| _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef) & (1 << u32kk)) == 0)
1643 {
1644 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32kk + TSP_SECFLT_NUM), DRVTSP_PID_NULL);
1645 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32kk] = DRVTSP_PID_NULL;
1646 }
1647 }
1648 }
1649 _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ArrayIdx] = u32Pid;
1650 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32Flt2ListId %ld , u32Flt1_id %ld ---------------------\n",
1651 __FUNCTION__, __LINE__, u32ArrayIdx, u32ii));
1652 return TRUE;
1653 }
1654 //--- 1st, end...
1655
1656 //2nd, find mapping position if empty, use it
1657 if(((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR| _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef) & (1 << u32ArrayIdx)) == 0)
1658 {
1659 if(_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_CB)
1660 {
1661 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR |= (1 << u32ArrayIdx);
1662 }
1663 else
1664 {
1665 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32ArrayIdx);
1666 }
1667 u32FLt1Id = u32ArrayIdx;
1668 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32Flt2ListId %ld , u32Flt1_id %ld ---------------------\n",
1669 __FUNCTION__, __LINE__, u32ArrayIdx, u32FLt1Id));
1670 goto SET_PID;
1671 }
1672
1673 //--- 3rd, if mapping position is not empty, checking if the dscmb pid still used...
1674 for(u32ii = 0; u32ii < DSCMB_FLT_NUM; u32ii++)
1675 {
1676 if(u32ii == u32ArrayIdx)
1677 continue;
1678 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ArrayIdx] == _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ii])
1679 {
1680 break;
1681 }
1682 }
1683 if(u32ii == DSCMB_FLT_NUM)
1684 {
1685 if(_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_CB)
1686 {
1687 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR |= (1 << u32ArrayIdx);
1688 }
1689 else
1690 {
1691 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32ArrayIdx);
1692 }
1693 u32FLt1Id = u32ArrayIdx;
1694 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32Flt2ListId %ld , u32Flt1_id %ld ---------------------\n",
1695 __FUNCTION__, __LINE__, u32ArrayIdx, u32FLt1Id));
1696 goto SET_PID;
1697 }
1698 //--- 3rd, end...
1699
1700 //4th, find any empty position for new pid, because mapping postion is occupied
1701 for(u32ii = 0; u32ii < DSCMB_FLT_NUM; u32ii++)
1702 {
1703 if(((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR| _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef) & (1 << u32ii)) == 0)
1704 {
1705 if(_ptsp_res->_TspState[u32EngId].FltType[u32Flt2Id] == E_DRVTSP_FLT_TYPE_CB)
1706 {
1707 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR |= (1 << u32ii);
1708 }
1709 else
1710 {
1711 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32ii);
1712 }
1713 u32FLt1Id = u32ii;
1714 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32Flt2ListId %ld , u32Flt1_id %ld ---------------------\n",
1715 __FUNCTION__, __LINE__, u32ArrayIdx, u32FLt1Id));
1716 goto SET_PID;
1717 }
1718 }
1719
1720 PVRCA_DBG(ULOGE("TSP", "[%s][%d] failed \n", __FUNCTION__, __LINE__));
1721
1722 return FALSE;
1723
1724 SET_PID:
1725 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32FLt1Id + TSP_SECFLT_NUM), u32Pid);
1726 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32FLt1Id] = u32Pid;
1727 _ptsp_res->TSPPvrcaParams._u16Flt2PidList[u32ArrayIdx] = u32Pid;
1728 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32Flt2Id %ld, u32Flt1Id %ld, PID 0x%lx\n", __FUNCTION__, __LINE__, u32Flt2Id, u32FLt1Id, u32Pid));
1729 return TRUE;
1730
1731 }
1732 #endif //end TS2_IF_SUPPORT
1733
1734 #endif
1735
_TSP_PidFlt_Init(MS_U32 u32EngId,MS_U32 u32PidFltId)1736 static void _TSP_PidFlt_Init(MS_U32 u32EngId, MS_U32 u32PidFltId)
1737 {
1738 #ifdef HWPCR_ENABLE
1739 if(u32PidFltId >= TSP_HWPCR_FLT_START_ID)
1740 {
1741 MS_U32 idx = u32PidFltId - TSP_HWPCR_FLT_START_ID;
1742
1743 HAL_TSP_PidFlt_HWPcrFlt_Enable(idx, FALSE);
1744 HAL_TSP_PidFlt_SetHWPcrPid(idx, DRVTSP_PID_NULL);
1745 HAL_TSP_HWPcr_SelSrc(idx, 0);
1746 }
1747 else
1748 {
1749 #endif
1750 REG_PidFlt *pPidFilter = HAL_TSP_GetPidFltReg(u32EngId, u32PidFltId);
1751
1752 HAL_TSP_PidFlt_SetPid(pPidFilter, DRVTSP_PID_NULL);
1753 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_NONE);
1754 HAL_TSP_PidFlt_SelSecFlt(pPidFilter, TSP_PIDFLT_SECFLT_NULL);
1755 _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId] = DRVTSP_MAP_NULL;
1756
1757 #ifndef NO_CA
1758 _TSP_FLT1_DupFLT0_Pid(0, u32PidFltId, DRVTSP_PID_NULL);
1759 #endif
1760
1761 #ifdef HWPCR_ENABLE
1762 }
1763 #endif
1764 }
1765
_TSP_PidFlt_Disable(MS_U32 u32EngId,MS_U32 u32PidFltId)1766 static void _TSP_PidFlt_Disable(MS_U32 u32EngId, MS_U32 u32PidFltId)
1767 {
1768 #ifdef HWPCR_ENABLE
1769 if(u32PidFltId >= TSP_HWPCR_FLT_START_ID)
1770 {
1771 MS_U32 u32Idx = u32PidFltId - TSP_HWPCR_FLT_START_ID;
1772
1773 HAL_TSP_PidFlt_HWPcrFlt_Enable(u32Idx, FALSE);
1774 #if (TSP_HWPCR_BY_HK == 1)
1775 HAL_TSP_HWPcr_Int_Enable(u32Idx, FALSE);
1776 _TSP_RemoveHwPcrNotifyId(u32Idx);
1777 #endif
1778 }
1779 else
1780 {
1781 #endif
1782
1783 REG_PidFlt *pPidFilter = HAL_TSP_GetPidFltReg(u32EngId, u32PidFltId);
1784
1785 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_NONE);
1786 //HAL_TSP_SecFlt_SetRmnCount(&(_TspSec[u32EngId].Flt[u32PidFltId]), 0);
1787
1788 #ifdef HWPCR_ENABLE
1789 }
1790 #endif
1791
1792 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] &= (DrvTSP_FltState)(~E_DRVTSP_FLT_STATE_ENABLE);
1793 }
1794
1795 //Note: This is only for PID filter & Section filter to be one by one mapping, and section filter number is equal to pid filter number.
_TSP_PidFlt_Alloc(MS_U32 u32EngId,DrvTSP_FltType eFilterType,MS_U32 * pu32PidFltId)1796 static MS_BOOL _TSP_PidFlt_Alloc(MS_U32 u32EngId, DrvTSP_FltType eFilterType, MS_U32 *pu32PidFltId)
1797 {
1798 int i = 0;
1799 MS_U32 pid_idx_start = 0;
1800 MS_U32 pid_idx_end = 0;
1801 MS_BOOL bFound = FALSE;
1802
1803 *pu32PidFltId = 0xFFFFFFFF;
1804
1805 // input parameter validation
1806 if ( (u32EngId >= TSP_ENGINE_NUM) ||
1807 ((eFilterType&~E_DRVTSP_FLT_MASK) >= E_DRVTSP_FLT_TYPE_LAST_ENUM) )
1808 {
1809 TSP_ASSERT(0, TSP_DBG("[TSP_ERROR][%06d] (EngId, FilterType)= (%d %x)\n", __LINE__, (unsigned int)u32EngId, (unsigned int)eFilterType));
1810 return FALSE;
1811 }
1812
1813 //TS2 live pid filter allocate
1814 #ifdef TS2_IF_SUPPORT
1815 if ((E_DRVTSP_FLT_TYPE_CB== (eFilterType&~E_DRVTSP_FLT_MASK))
1816 || ((eFilterType & E_DRVTSP_FLT_SOURCE_TYPE_TS2) &&
1817 ((E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK)) || ((eFilterType & E_DRVTSP_FLT_TYPE_SECTION_MASK) == 0))))
1818 {
1819 pid_idx_start = (TSP_PIDFLT_NUM_ALL & 0xFFFFFFFE) - 1; //except of HW PCR
1820 pid_idx_end = TSP_SECFLT_NUM + TSP_PIDFLT1_NUM;
1821 for(i = (int)pid_idx_start; i >= (int)pid_idx_end; i--)
1822 {
1823 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1824 {
1825 bFound = TRUE;
1826 break;
1827 }
1828 }
1829 }
1830 else if((eFilterType&E_DRVTSP_FLT_MASK) == E_DRVTSP_FLT_SOURCE_TYPE_TS2)
1831 {
1832 pid_idx_start = TSP_SECFLT_NUM+TSP_PIDFLT1_NUM;
1833 pid_idx_end = TSP_PIDFLT_NUM_ALL & 0xFFFFFFFE; //except of HW PCR
1834 for(i = (int)pid_idx_start; i < (int)pid_idx_end; i++)
1835 {
1836 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1837 {
1838 bFound = TRUE;
1839 break;
1840 }
1841 }
1842 }
1843 else
1844 #endif
1845
1846 #ifdef HWPCR_ENABLE
1847 if(E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK))
1848 {
1849 for(i = TSP_HWPCR_FLT_START_ID; i < TSP_PIDFLT_NUM_ALL; i++)
1850 {
1851 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1852 {
1853 bFound = TRUE;
1854 break;
1855 }
1856 }
1857 }
1858 else
1859 #endif
1860 #ifdef DSCMB_SHAREKEY_FLT
1861 if (E_DRVTSP_FLT_TYPE_SCMB_SHAREKEY == (eFilterType & E_DRVTSP_FLT_TYPE_SCMB_SHAREKEY))
1862 {
1863 for (i = DSCMB_FLT_SHAREKEY_END_ID; i >= DSCMB_FLT_SHAREKEY_START_ID; i--)
1864 {
1865 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1866 {
1867 bFound = TRUE;
1868 break;
1869 }
1870 }
1871 }
1872 else
1873 #endif
1874 if ((E_DRVTSP_FLT_TYPE_SCMB == (eFilterType & E_DRVTSP_FLT_SCMB_MASK)) ||
1875 #ifndef HWPCR_ENABLE
1876 (E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1877 #endif
1878 (E_DRVTSP_FLT_TYPE_VIDEO == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1879 (E_DRVTSP_FLT_TYPE_AUDIO == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1880 (E_DRVTSP_FLT_TYPE_AUDIO2 == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1881 (E_DRVTSP_FLT_TYPE_VIDEO3D == (eFilterType&~E_DRVTSP_FLT_MASK)) )
1882 {
1883 #ifndef NO_CA
1884 for (i = DSCMB_FLT_END_ID; i >= DSCMB_FLT_START_ID; i--)
1885 #else
1886 for (i = TSP_SECFLT_NUM - 1; i >= 0; i--)
1887 #endif
1888 {
1889 //Reserved filter #31 for NMatch temp writting, can not be used for section data
1890 if((i == 31) && (!((E_DRVTSP_FLT_TYPE_VIDEO == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1891 (E_DRVTSP_FLT_TYPE_AUDIO == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1892 (E_DRVTSP_FLT_TYPE_AUDIO2 == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1893 (E_DRVTSP_FLT_TYPE_VIDEO3D == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
1894 (E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK)))))
1895 {
1896 continue;
1897 }
1898
1899 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1900 {
1901 bFound = TRUE;
1902 break;
1903 }
1904 }
1905
1906 if((bFound == FALSE) && (eFilterType & E_DRVTSP_FLT_SCMB_MASK))
1907 {
1908 TSP_ASSERT(0, TSP_DBG("[TSP_ERROR][%06d] No Free dscmb filters !!!\n", __LINE__));
1909 }
1910
1911 //if not scmb type, find another filter range
1912 #ifndef NO_CA
1913 if((bFound == FALSE) && ((eFilterType & E_DRVTSP_FLT_SCMB_MASK) == 0))
1914 {
1915 pid_idx_start= TSP_SECFLT_NUM - 1;
1916 pid_idx_end= 0;
1917 for (i = (int)pid_idx_start; i >= (int)pid_idx_end; i--)
1918 {
1919 //dscmb range has checked, skip
1920 if(i == DSCMB_FLT_END_ID)
1921 {
1922 i = DSCMB_FLT_START_ID;
1923 continue;
1924 }
1925 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1926 {
1927 bFound = TRUE;
1928 break;
1929 }
1930 }
1931 }
1932 #endif
1933 }
1934 else
1935 {
1936 if (E_DRVTSP_FLT_TYPE_PVR== (eFilterType&~E_DRVTSP_FLT_MASK))
1937 {
1938 #ifndef NO_PVR
1939 if ((eFilterType&E_DRVTSP_FLT_SOURCE_TYPE_MASK) == E_DRVTSP_FLT_SOURCE_TYPE_FILE)
1940 {
1941 pid_idx_start= 0;
1942 pid_idx_end= TSP_SECFLT_NUM;
1943 }
1944 else
1945 {
1946 pid_idx_start= TSP_SECFLT_NUM;
1947 pid_idx_end= TSP_SECFLT_NUM + TSP_PIDFLT1_NUM;
1948 }
1949 #endif
1950 }
1951 else
1952 {
1953 pid_idx_start= 0;
1954 pid_idx_end= TSP_SECFLT_NUM;
1955 }
1956
1957 for (i = (int)pid_idx_start; i < (int)pid_idx_end; i++)
1958 {
1959 //Reserved filter #31 for NMatch temp writting, can not be used for section data
1960 if(i == 31)
1961 {
1962 continue;
1963 }
1964
1965 if (_ptsp_res->_TspState[u32EngId].FltState[i] == E_DRVTSP_FLT_STATE_FREE)
1966 {
1967 bFound = TRUE;
1968 break;
1969 }
1970 }
1971
1972 }
1973
1974 if (bFound == FALSE)
1975 {
1976 TSP_ASSERT(0, TSP_DBG("[TSP_ERROR][%06d] No free fitler found 0x%02x\n", __LINE__, i));
1977 return FALSE;
1978 }
1979
1980 _ptsp_res->_TspState[u32EngId].FltState[i] = E_DRVTSP_FLT_STATE_ALLOC;
1981 _ptsp_res->_TspState[u32EngId].FltType[i] = (eFilterType&(DrvTSP_FltType)(~E_DRVTSP_FLT_MASK));
1982
1983 if ((eFilterType&E_DRVTSP_FLT_SOURCE_TYPE_MASK) == E_DRVTSP_FLT_SOURCE_TYPE_LIVE)
1984 {
1985 _ptsp_res->_TspState[u32EngId].FltSource[i] = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
1986 }
1987 else if ((eFilterType&E_DRVTSP_FLT_SOURCE_TYPE_MASK) == E_DRVTSP_FLT_SOURCE_TYPE_FILE)
1988 {
1989 _ptsp_res->_TspState[u32EngId].FltSource[i] = E_DRVTSP_FLT_SOURCE_TYPE_FILE;
1990 }
1991 else if ((eFilterType&E_DRVTSP_FLT_SOURCE_TYPE_MASK) == E_DRVTSP_FLT_SOURCE_TYPE_TS2)
1992 {
1993 _ptsp_res->_TspState[u32EngId].FltSource[i] = E_DRVTSP_FLT_SOURCE_TYPE_TS2;
1994 }
1995
1996 _TSP_PidFlt_Init(u32EngId, i);
1997 *pu32PidFltId = i;
1998
1999 //ULOGD("TSP", "[%s] eFilterType %lx , id %d\n", __FUNCTION__, eFilterType, i);
2000
2001 return TRUE;
2002 }
2003
_TSP_PidFlt_Free(MS_U32 u32EngId,MS_U32 u32PidFltId,MS_BOOL bResetState)2004 static TSP_Result _TSP_PidFlt_Free(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_BOOL bResetState)
2005 {
2006 MS_U32 u32SecFltId = _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId];
2007
2008 if ( (u32EngId >= TSP_ENGINE_NUM) ||
2009 (u32PidFltId >= TSP_PIDFLT_NUM_ALL) ||
2010 (_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] == E_DRVTSP_FLT_STATE_FREE) )
2011 {
2012 //TSP_DBG("[TSP_ERROR][%06d] (EngId, PidFltId, FilterState)= (%ld %ld %d)\n", __LINE__, u32EngId, u32PidFltId, _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId]);
2013 MS_CRITICAL_MSG(TSP_DBG("[TSP_ERROR][%06d] Bad free parmeter\n",__LINE__));;
2014 return (TSP_Result)FALSE;
2015 }
2016
2017 _TSP_PidFlt_Disable(u32EngId, u32PidFltId);
2018
2019 // Release Filter
2020 _TSP_PidFlt_Init(u32EngId, u32PidFltId);
2021
2022 #ifdef HWPCR_ENABLE
2023 if(u32PidFltId < TSP_HWPCR_FLT_START_ID)
2024 {
2025 #endif
2026 HAL_TSP_PidFlt_SelSecFlt(HAL_TSP_GetPidFltReg(u32EngId, u32PidFltId), TSP_PIDFLT_SECFLT_NULL);
2027 _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId] = DRVTSP_MAP_NULL;
2028 #ifdef HWPCR_ENABLE
2029 }
2030 #endif
2031
2032 // clear all event while filter free
2033 if(u32SecFltId < TSP_SECFLT_NUM_All)
2034 {
2035 MS_U32 u32Dummy = 0;
2036 _TSP_GetSecOvfId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
2037 _TSP_GetSecCrcId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
2038 _TSP_GetSecRdyId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
2039 _TSP_GetFltDisableId(u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
2040 }
2041
2042 if (bResetState)
2043 {
2044 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] = E_DRVTSP_FLT_STATE_FREE;
2045 }
2046
2047 // Reset call back function without PVR
2048 if (u32SecFltId < TSP_SECFLT_NUM_All)
2049 {
2050 _ptsp_res->_TspState[u32EngId].SecFltCallback[u32SecFltId] = NULL;
2051 _ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId] = E_DRVTSP_FLT_MODE_CONTI;
2052 }
2053
2054 return (TSP_Result)TRUE;
2055 }
2056
_TSP_PidFlt_StateGet(MS_U32 u32EngId,MS_U32 u32PidFltId,DrvTSP_FltState * peState)2057 static MS_BOOL _TSP_PidFlt_StateGet(MS_U32 u32EngId, MS_U32 u32PidFltId, DrvTSP_FltState *peState)
2058 {
2059 MS_U32 u32SecFltId;
2060 MS_U32 u32GroupId = (((u32PidFltId & 0x1f) > 0) ? 1: 0);
2061 REG_SecFlt *pSecFilter = NULL;
2062 REG_PidFlt *pPidFilter = NULL;
2063
2064 TSP_ASSERT(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
2065 TSP_ASSERT(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFlt Id %d\n", __LINE__, (unsigned int)u32PidFltId));
2066 TSP_ASSERT(peState, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
2067
2068 *peState= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId];
2069
2070 #ifdef HWPCR_ENABLE
2071 if(u32PidFltId >= TSP_HWPCR_FLT_START_ID)
2072 {
2073 return TRUE;
2074 }
2075 #endif
2076
2077 pPidFilter= HAL_TSP_GetPidFltReg(u32EngId, u32PidFltId);
2078 if(u32PidFltId < TSP_SECFLT_NUM)
2079 {
2080 if (HAL_TSP_Scmb_Status(0, u32GroupId, u32PidFltId) || HAL_TSP_Scmb_Status(1, u32GroupId, u32PidFltId))
2081 {
2082 *peState |= E_DRVTSP_FLT_STATE_SCRAMBLED;
2083 }
2084 }
2085
2086 switch (_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
2087 {
2088 case E_DRVTSP_FLT_TYPE_VIDEO:
2089 case E_DRVTSP_FLT_TYPE_AUDIO:
2090 case E_DRVTSP_FLT_TYPE_AUDIO2:
2091 case E_DRVTSP_FLT_TYPE_VIDEO3D:
2092 break;
2093 case E_DRVTSP_FLT_TYPE_SECTION:
2094 case E_DRVTSP_FLT_TYPE_PES:
2095 case E_DRVTSP_FLT_TYPE_PACKET:
2096 case E_DRVTSP_FLT_TYPE_TELETEXT:
2097 case E_DRVTSP_FLT_TYPE_SECTION_VER:
2098 case E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI:
2099 u32SecFltId = HAL_TSP_PidFlt_GetSecFlt(pPidFilter);
2100 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
2101 if (HAL_TSP_SecBuf_GetBufRead(pSecFilter) != HAL_TSP_SecBuf_GetBufWrite(pSecFilter))
2102 {
2103 *peState |= E_DRVTSP_FLT_STATE_STREAM_AVAIL;
2104 }
2105 break;
2106 case E_DRVTSP_FLT_TYPE_PCR:
2107 default:
2108 break;
2109 }
2110 return TRUE;
2111 }
2112
2113
_TSP_SecFlt_SetType(REG_SecFlt * pSecFilter,DrvTSP_FltType eSecFltType)2114 static void _TSP_SecFlt_SetType(REG_SecFlt *pSecFilter, DrvTSP_FltType eSecFltType)
2115 {
2116 MS_U32 u32FltType = TSP_SECFLT_TYPE_SEC;
2117
2118 switch (eSecFltType)
2119 {
2120 case E_DRVTSP_FLT_TYPE_TELETEXT:
2121 u32FltType = TSP_SECFLT_TYPE_TTX;
2122 break;
2123 case E_DRVTSP_FLT_TYPE_PCR:
2124 u32FltType = TSP_SECFLT_TYPE_PCR;
2125 break;
2126 case E_DRVTSP_FLT_TYPE_PES:
2127 u32FltType = TSP_SECFLT_TYPE_PES;
2128 break;
2129 case E_DRVTSP_FLT_TYPE_SECTION:
2130 u32FltType = TSP_SECFLT_TYPE_SEC;
2131 break;
2132 case E_DRVTSP_FLT_TYPE_PACKET:
2133 u32FltType = TSP_SECFLT_TYPE_PKT;
2134 break;
2135 case E_DRVTSP_FLT_TYPE_ECM:
2136 u32FltType = TSP_SECFLT_TYPE_ECM;
2137 break;
2138 case E_DRVTSP_FLT_TYPE_EMM:
2139 u32FltType = TSP_SECFLT_TYPE_EMM;
2140 break;
2141 case E_DRVTSP_FLT_TYPE_SECTION_VER:
2142 u32FltType = TSP_SECFLT_TYPE_VER;
2143 break;
2144 case E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI:
2145 u32FltType = TSP_SECFLT_TYPE_SEC_NO_PUSI;
2146 break;
2147 case E_DRVTSP_FLT_TYPE_PVR:
2148 #ifdef TS2_IF_SUPPORT
2149 case E_DRVTSP_FLT_TYPE_CB:
2150 #endif
2151 default:
2152 break;
2153 }
2154 HAL_TSP_SecFlt_SetType(pSecFilter, u32FltType);
2155 }
2156
_TSP_SecFlt_StateGet(MS_U32 u32EngId,MS_U32 u32SecFltId,DrvTSP_FltState * peState)2157 static MS_BOOL _TSP_SecFlt_StateGet(MS_U32 u32EngId, MS_U32 u32SecFltId, DrvTSP_FltState *peState)
2158 {
2159 REG_SecFlt *pSecFilter = NULL;
2160
2161 TSP_ASSERT(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
2162 TSP_ASSERT(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
2163 TSP_ASSERT(peState, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
2164
2165 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
2166 *peState = _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId];
2167 if (HAL_TSP_SecFlt_GetState(pSecFilter) & TSP_SECFLT_STATE_OVERFLOW)
2168 {
2169 *peState |= E_DRVTSP_FLT_STATE_OVERFLOW;
2170 }
2171 return TRUE;
2172 }
2173
_TSP_SecFlt_Init(MS_U32 u32EngId,MS_U32 u32SecFltId)2174 static void _TSP_SecFlt_Init(MS_U32 u32EngId, MS_U32 u32SecFltId)
2175 {
2176 static MS_U8 u8Mask[TSP_FILTER_DEPTH] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2177 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
2178 static MS_U8 u8NMask[TSP_FILTER_DEPTH] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2179 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
2180 REG_SecFlt *pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
2181
2182 HAL_TSP_SecFlt_ClrCtrl(pSecFilter);
2183
2184 HAL_TSP_SecFlt_SelSecBuf(pSecFilter, TSP_SECFLT_BUF_NULL, FALSE);
2185 HAL_TSP_SecFlt_SetMatch(pSecFilter, u8Mask);
2186 HAL_TSP_SecFlt_SetMask(pSecFilter, u8NMask);
2187 //HAL_TSP_SecFlt_SetNMask(&(_TspSec[u32EngId].Flt[u32SecFltId]), u8Mask);
2188 _TSP_SecFlt_SetType(pSecFilter, E_DRVTSP_FLT_TYPE_SECTION);
2189 HAL_TSP_SecFlt_SetReqCount(pSecFilter, 0);
2190 HAL_TSP_SecFlt_ResetState(pSecFilter);
2191 _ptsp_res->_TspState[0].SecFltEvtNotify[u32SecFltId] = E_DRVTSP_EVENT_DATA_INIT;
2192 _ptsp_res->_TspState[0].SecFltCallback[u32SecFltId] = NULL;
2193 }
2194
_TSP_SecFlt_Alloc(MS_U32 u32EngId,DrvTSP_FltType eFilterType,MS_U32 * pu32SecFltId)2195 static MS_BOOL _TSP_SecFlt_Alloc(MS_U32 u32EngId, DrvTSP_FltType eFilterType, MS_U32 *pu32SecFltId)
2196 {
2197 int i = 0, flt_idx_start = 0, flt_idx_end = 0;
2198 MS_BOOL bFound = FALSE;
2199 MS_U8 u8SecFlt_num = TSP_SECFLT_NUM;
2200
2201 i = *pu32SecFltId;
2202 *pu32SecFltId = 0xFFFFFFFF;
2203
2204 if ((i < TSP_SECFLT_NUM_All) && (_ptsp_res->_TspState[u32EngId].SecFltState[i] == E_DRVTSP_FLT_STATE_FREE))
2205 {
2206 bFound = TRUE;
2207 goto SECFLT_ALC_END;
2208 }
2209
2210 #ifdef DSCMB_SHAREKEY_FLT
2211 if (E_DRVTSP_FLT_TYPE_SCMB_SHAREKEY == (eFilterType & E_DRVTSP_FLT_TYPE_SCMB_SHAREKEY))
2212 {
2213 for (i = DSCMB_FLT_SHAREKEY_END_ID; i >= DSCMB_FLT_SHAREKEY_START_ID; i--)
2214 {
2215 if (_ptsp_res->_TspState[u32EngId].SecFltState[i] == E_DRVTSP_FLT_STATE_FREE)
2216 {
2217 bFound = TRUE;
2218 break;
2219 }
2220 }
2221 }
2222 else
2223 #endif
2224 if ((E_DRVTSP_FLT_TYPE_SCMB == (eFilterType & E_DRVTSP_FLT_SCMB_MASK)) ||
2225 (E_DRVTSP_FLT_TYPE_VIDEO== (eFilterType&~E_DRVTSP_FLT_MASK))||
2226 (E_DRVTSP_FLT_TYPE_AUDIO== (eFilterType&~E_DRVTSP_FLT_MASK))||
2227 (E_DRVTSP_FLT_TYPE_AUDIO2== (eFilterType&~E_DRVTSP_FLT_MASK))||
2228 (E_DRVTSP_FLT_TYPE_VIDEO3D== (eFilterType&~E_DRVTSP_FLT_MASK))||
2229 (E_DRVTSP_FLT_TYPE_PCR== (eFilterType&~E_DRVTSP_FLT_MASK)))
2230 {
2231 for (i = DSCMB_FLT_END_ID; i >= 0; i--)
2232 {
2233 //Reserved filter #31 for NMatch temp writting, can not be used for section data
2234 if((i == 31) && (!((E_DRVTSP_FLT_TYPE_VIDEO == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
2235 (E_DRVTSP_FLT_TYPE_AUDIO == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
2236 (E_DRVTSP_FLT_TYPE_AUDIO2 == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
2237 (E_DRVTSP_FLT_TYPE_VIDEO3D == (eFilterType&~E_DRVTSP_FLT_MASK)) ||
2238 (E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK)))))
2239 {
2240 continue;
2241 }
2242
2243 if (_ptsp_res->_TspState[u32EngId].SecFltState[i] == E_DRVTSP_FLT_STATE_FREE)
2244 {
2245 bFound = TRUE;
2246 break;
2247 }
2248 }
2249 if((bFound == FALSE) && (u8SecFlt_num > (DSCMB_FLT_END_ID+1)))
2250 {
2251 flt_idx_start= TSP_SECFLT_NUM - 1;
2252 flt_idx_end= DSCMB_FLT_END_ID;
2253 for (i = flt_idx_start ; i > flt_idx_end ; i--)
2254 {
2255 if (_ptsp_res->_TspState[u32EngId].SecFltState[i] == E_DRVTSP_FLT_STATE_FREE)
2256 {
2257 bFound = TRUE;
2258 break;
2259 }
2260 }
2261 }
2262 }
2263 else
2264 {
2265 for (i = 0; i < TSP_SECFLT_NUM; i++)
2266 {
2267 //Reserved filter #31 for NMatch temp writting, can not be used for section data
2268 if(i == 31)
2269 {
2270 continue;
2271 }
2272
2273 if (_ptsp_res->_TspState[u32EngId].SecFltState[i] == E_DRVTSP_FLT_STATE_FREE)
2274 {
2275 bFound = TRUE;
2276 break;
2277 }
2278 }
2279 }
2280
2281 SECFLT_ALC_END:
2282
2283 if (bFound == FALSE)
2284 {
2285 TSP_DBG("[TSP_ERROR][%06d] Allocate Sec Filter Failed\n", __LINE__);
2286 return FALSE;
2287 }
2288
2289 _ptsp_res->_TspState[u32EngId].SecFltState[i] = E_DRVTSP_FLT_STATE_ALLOC;
2290 _TSP_SecFlt_Init(u32EngId, i);
2291 *pu32SecFltId = i;
2292 _TSP_SetSecNotifyId(*pu32SecFltId); //for isr processing checking
2293
2294 //ULOGD("TSP", "[%s] %d \n", __FUNCTION__, i);
2295
2296 return TRUE;
2297 }
2298
_TSP_SecFlt_Free(MS_U32 u32EngId,MS_U32 u32SecFltId,MS_BOOL bResetState)2299 static MS_BOOL _TSP_SecFlt_Free(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_BOOL bResetState)
2300 {
2301 //REG_SecFlt *pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
2302
2303 //HAL_TSP_SecFlt_ResetEmmIdx(pSecFilter);
2304 //HAL_TSP_SecFlt_SelSecBuf(pSecFilter, TSP_SECFLT_BUF_NULL, FALSE);
2305 if (bResetState)
2306 {
2307 // clear all event while filter free,
2308 MS_U32 u32Dummy = 0;
2309 _TSP_GetSecOvfId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
2310 _TSP_GetSecCrcId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
2311 _TSP_GetSecRdyId (u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
2312 _TSP_GetFltDisableId(u32SecFltId, &u32Dummy, OSAL_EVENT_OR_CLEAR);
2313
2314 _TSP_RemoveSecNotifyId(u32SecFltId);
2315 _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId] = E_DRVTSP_FLT_STATE_FREE;
2316
2317 //ULOGD("TSP", "[%s] %ld \n", __FUNCTION__, u32SecFltId);
2318 }
2319
2320 _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] = E_DRVTSP_EVENT_DATA_INIT;
2321 return TRUE;
2322 }
2323
2324
_TSP_SecBuf_Init(MS_U32 u32EngId,MS_U32 u32SecBufId)2325 static void _TSP_SecBuf_Init(MS_U32 u32EngId, MS_U32 u32SecBufId)
2326 {
2327 REG_SecFlt *pSecBuf= _TSP_GET_SECFLT_REG(u32SecBufId);
2328
2329 HAL_TSP_SecBuf_SetBuffer(pSecBuf, 0UL, 0UL);
2330 HAL_TSP_SecBuf_ResetBuffer(pSecBuf);
2331 }
2332
_TSP_SecBuf_Alloc(MS_U32 u32EngId,MS_U32 * pu32SecBufId)2333 static MS_BOOL _TSP_SecBuf_Alloc(MS_U32 u32EngId, MS_U32 *pu32SecBufId)
2334 {
2335 int i = *pu32SecBufId;
2336
2337 *pu32SecBufId = 0xFFFFFFFF;
2338
2339 if ((i < TSP_SECBUF_NUM) && (_ptsp_res->_TspState[u32EngId].SecBufState[i] == E_DRVTSP_FLT_STATE_FREE))
2340 {
2341 goto SECBUF_ALC_END;
2342 }
2343
2344 for (i = 0; i < TSP_SECBUF_NUM; i++)
2345 {
2346 //Reserved filter #31 for NMatch temp writting, can not be used for section data
2347 if(i == 31)
2348 {
2349 continue;
2350 }
2351
2352 if (_ptsp_res->_TspState[u32EngId].SecBufState[i] == E_DRVTSP_FLT_STATE_FREE)
2353 {
2354 break;
2355 }
2356 }
2357 if (i == TSP_SECBUF_NUM)
2358 {
2359 TSP_DBG("[TSP_ERROR][%06d] Allocate Sec Buf Failed\n", __LINE__);
2360 return FALSE;
2361 }
2362
2363 SECBUF_ALC_END:
2364 _ptsp_res->_TspState[u32EngId].SecBufState[i] = E_DRVTSP_FLT_STATE_ALLOC;
2365 *pu32SecBufId = i;
2366
2367 //ULOGD("TSP", "[%s] %d \n", __FUNCTION__, i);
2368 return TRUE;
2369 }
2370
_TSP_SecBuf_Free(MS_U32 u32EngId,MS_U32 u32SecBufId)2371 static MS_BOOL _TSP_SecBuf_Free(MS_U32 u32EngId, MS_U32 u32SecBufId)
2372 {
2373 _ptsp_res->_TspState[u32EngId].SecBufState[u32SecBufId] = E_DRVTSP_FLT_STATE_FREE;
2374 return TRUE;
2375 }
2376
_TSP_RegStateReset(void)2377 static void _TSP_RegStateReset(void)
2378 {
2379 MS_U32 u32EngId;
2380 MS_U32 u32FilterId;
2381
2382 for (u32EngId = 0; u32EngId < TSP_ENGINE_NUM; u32EngId++)
2383 {
2384 for (u32FilterId = 0; u32FilterId < TSP_PIDFLT_NUM_ALL; u32FilterId++)
2385 {
2386 _TSP_PidFlt_Init(u32EngId, u32FilterId);
2387 }
2388 for (u32FilterId = 0; u32FilterId < TSP_SECFLT_NUM_All; u32FilterId++)
2389 {
2390 _TSP_SecBuf_Init(u32EngId, u32FilterId);
2391 //HAL_TSP_SecBuf_SetBuffer(&(_TspSec[u32EngId].Flt[u32FilterId]), 0, 0);
2392 _TSP_SecFlt_Init(u32EngId, u32FilterId);
2393 }
2394 }
2395 }
2396
_TSP_SelPad(MS_U32 u32EngId,DrvTSP_If eIf,DrvTSP_If_Set * pIfSet)2397 static TSP_Result _TSP_SelPad(MS_U32 u32EngId, DrvTSP_If eIf, DrvTSP_If_Set* pIfSet)
2398 {
2399 MS_U32 u32Flow = 0;
2400
2401 if (u32EngId>= TSP_ENGINE_NUM)
2402 {
2403 return DRVTSP_FAIL;
2404 }
2405
2406 switch (eIf)
2407 {
2408 case E_DRVTSP_IF_PLAYBACK:
2409 u32Flow = 0;
2410 break;
2411 #ifndef NO_PVR
2412 case E_DRVTSP_IF_PVR0:
2413 u32Flow = 1;
2414 break;
2415 #endif
2416 #ifdef TS2_IF_SUPPORT
2417 case E_DRVTSP_IF_PVR1:
2418 u32Flow = 2;
2419 break;
2420 #endif
2421 default:
2422 MS_ASSERT(0);
2423 return DRVTSP_FAIL;
2424 }
2425
2426 HAL_TSP_SelPad(u32EngId, u32Flow, (MS_U32)pIfSet->ePad);
2427 HAL_TSP_SelPad_ClkInv(u32EngId, u32Flow, pIfSet->bClkInv);
2428 HAL_TSP_SelPad_ExtSync(u32EngId, pIfSet->bExtSync, u32Flow);
2429 HAL_TSP_SelPad_Parl(u32EngId, pIfSet->bParallel, u32Flow);
2430
2431 #ifdef TS2_IF_SUPPORT
2432 if((pIfSet->bParallel == FALSE) && (pIfSet->ePad == E_DRVTSP_PAD_EXT_INPUT2))
2433 {
2434 HAL_TSP_TS2Out_En(TRUE);
2435 }
2436 else
2437 {
2438 HAL_TSP_TS2Out_En(FALSE);
2439 }
2440 #endif
2441
2442 return DRVTSP_OK;
2443 }
2444
2445 #if 0
_TSP_IsPidFltFreeDefer(MS_U32 u32PidFltId)2446 static MS_BOOL _TSP_IsPidFltFreeDefer(MS_U32 u32PidFltId)
2447 {
2448 MS_U32 u32Flag = 0;
2449
2450 if (u32PidFltId < TSP_SECFLT_NUM)
2451 {
2452 _TSP_GetEventFreeDefer0Id(u32PidFltId, &u32Flag, E_AND);
2453 return ((u32Flag & (1 << (u32PidFltId & 0x1F))) ? TRUE: FALSE);
2454 }
2455 else
2456 {
2457 return FALSE;
2458 }
2459 }
2460
_TSP_SetPidFltFreeDefer(MS_U32 u32PidFltId)2461 static void _TSP_SetPidFltFreeDefer(MS_U32 u32PidFltId)
2462 {
2463 if (u32PidFltId < TSP_SECFLT_NUM)
2464 {
2465 _TSP_SetEventFreeDefer0Id(u32PidFltId);
2466 }
2467 }
2468
_TSP_ResetPidFltFreeDefer(MS_U32 u32PidFltId)2469 static void _TSP_ResetPidFltFreeDefer(MS_U32 u32PidFltId)
2470 {
2471 MS_U32 u32Flag = 0;
2472
2473 if (u32PidFltId < TSP_SECFLT_NUM)
2474 {
2475 _TSP_GetEventFreeDefer0Id(u32PidFltId, &u32Flag, E_OR_CLEAR);
2476 }
2477 }
2478 #endif
2479
2480 #if 0
_TSP_IsAskPidFltFree(MS_U32 u32PidFltId)2481 static MS_BOOL _TSP_IsAskPidFltFree(MS_U32 u32PidFltId)
2482 {
2483 MS_U32 u32Flag = 0;
2484
2485 //PVR pid filter, not set to section filter free queue
2486 #ifndef TS2_LIVE_SUPPORT
2487 if(u32PidFltId >= TSP_SECFLT_NUM)
2488 return TRUE;
2489 #else
2490 if((u32PidFltId >= TSP_SECFLT_NUM) && (u32PidFltId < (TSP_SECFLT_NUM + TSP_PIDFLT1_NUM)))
2491 return TRUE;
2492 #endif
2493
2494 _TSP_GetEventFree0Id(u32PidFltId, &u32Flag, E_AND);
2495 return ((u32Flag & (1 << (u32PidFltId & 0x1F))) ? TRUE: FALSE);
2496 }
2497
_TSP_AskPidFltFree(MS_U32 u32PidFltId)2498 static void _TSP_AskPidFltFree(MS_U32 u32PidFltId)
2499 {
2500 //PVR pid filter, not set to section filter free queue
2501 #ifndef TS2_LIVE_SUPPORT
2502 if(u32PidFltId >= TSP_SECFLT_NUM)
2503 return;
2504 #else
2505 if((u32PidFltId >= TSP_SECFLT_NUM) && (u32PidFltId < (TSP_SECFLT_NUM + TSP_PIDFLT1_NUM)))
2506 return;
2507 #endif
2508
2509 _TSP_SetEventFree0Id(u32PidFltId);
2510
2511 }
2512
2513 //Free Section PID filters, 32 filters for one group
2514 //For 64 pid filters, there are 2 gropus
2515 //For 128 pid filters, there are 4 groups
2516 //Free Section PID filters
_TSP_GetAskPidFltFree0List(MS_U32 u32Group)2517 static MS_U32 _TSP_GetAskPidFltFree0List(MS_U32 u32Group)
2518 {
2519 MS_U32 u32Flag = 0;
2520
2521 _TSP_GetModeEventFree0(u32Group, 0xFFFFFFFF, &u32Flag, E_OR);
2522
2523 return u32Flag;
2524 }
2525
2526 //Free Section PID filters
2527 //For 64 pid filters, there are 2 gropus
2528 //For 128 pid filters, there are 4 groups
_TSP_ClrAskPidFltFree0List(MS_U32 u32Group,MS_U32 u32Mask)2529 static void _TSP_ClrAskPidFltFree0List(MS_U32 u32Group, MS_U32 u32Mask)
2530 {
2531 MS_U32 u32Flag;
2532
2533 _TSP_GetModeEventFree0(u32Group, u32Mask, &u32Flag, E_OR_CLEAR);
2534 }
2535
2536 #endif
2537
2538 //For pid filter and section filter are one by one mappig
_TSP_Flt_StateGet(MS_U32 u32EngId,MS_U32 u32FltId,DrvTSP_FltState * peState)2539 static MS_BOOL _TSP_Flt_StateGet(MS_U32 u32EngId, MS_U32 u32FltId, DrvTSP_FltState *peState)
2540 {
2541 MS_U32 u32SecId = u32FltId;
2542 DrvTSP_FltState PidFltState;
2543 DrvTSP_FltState SecFltState;
2544
2545 if (!_TSP_PidFlt_StateGet(u32EngId, u32FltId, &PidFltState))
2546 {
2547 return FALSE;
2548 }
2549 *peState= PidFltState;
2550
2551 if (u32FltId >= TSP_SECFLT_NUM
2552 #ifdef TS2_LIVE_SUPPORT
2553 && (u32FltId < (TSP_SECFLT_NUM+TSP_PIDFLT1_NUM))
2554 #endif
2555 )
2556 {
2557 return TRUE;
2558 }
2559
2560 #ifdef TS2_LIVE_SUPPORT
2561 if (u32FltId >= TSP_SECFLT_NUM)
2562 {
2563 u32SecId -= TSP_PIDFLT1_NUM;
2564 }
2565 #endif
2566
2567 if (!_TSP_SecFlt_StateGet(u32EngId, u32SecId, &SecFltState))
2568 {
2569 return FALSE;
2570 }
2571 *peState|= SecFltState;
2572 return TRUE;
2573 }
2574
2575 #ifndef NO_CA
2576 // Duplicate live dscmb PIDs to FLT1 for DSCMB reference when siwtcing to TS1 PVRCA
2577 // Paired with _TSP_Free_AllFLT1
2578 //
2579 // PVR1 filter arrange
2580 // ----------------- 0
2581 // | DSCM |
2582 // ----------------- 16
2583 // | Share DSCMB |
2584 // ----------------- 32
_TSP_FLT1_Duplicate_FLT0(MS_U32 u32EngId)2585 static MS_BOOL _TSP_FLT1_Duplicate_FLT0(MS_U32 u32EngId)
2586 {
2587 MS_U32 u32ii, u32jj;
2588 MS_U32 u32DMXID = 0, u32PID = DRVTSP_PID_NULL;
2589 MS_U32 u32Flt0Id = 0;
2590
2591 #ifdef EXT_PVR1_FLT
2592 MS_U32 u32DscmbFltNume = DSCMB_FLT_NUM_ALL;
2593 #else
2594 MS_U32 u32DscmbFltNume = DSCMB_FLT_NUM;
2595 #endif
2596
2597 PVRCA_DBG(ULOGD("TSP", "\n[%s]\n", __FUNCTION__));
2598
2599 if(_ptsp_res->TSPPvrcaParams._bFLT1Dup_Enable == TRUE)
2600 {
2601 return FALSE;
2602 }
2603
2604 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef = 0;
2605 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR = 0;
2606
2607 for(u32ii = 0; u32ii < TSP_PIDFLT1_NUM; u32ii++)
2608 {
2609 u32DMXID = u32ii + TSP_SECFLT_NUM;
2610 _ptsp_res->_TspState[0].FltState[u32ii + TSP_SECFLT_NUM] = E_DRVTSP_FLT_STATE_ALLOC;
2611 _ptsp_res->_TspState[0].FltType[u32ii + TSP_SECFLT_NUM] = E_DRVTSP_FLT_TYPE_PVR;
2612 _ptsp_res->_TspState[0].FltSource[u32ii + TSP_SECFLT_NUM] = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
2613
2614 //Getting PIDs of PVR1 filter, if pid filter is allocated for recording
2615 u32PID = HAL_TSP_PidFlt_GetPid(HAL_TSP_GetPidFltReg(u32EngId, u32DMXID));
2616 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] = u32PID;
2617
2618 if(u32ii < DSCMB_FLT_NUM)
2619 {
2620 u32Flt0Id = u32ii + DSCMB_FLT_START_ID;
2621 }
2622 #ifdef EXT_PVR1_FLT
2623 else if (u32ii < u32DscmbFltNume)//share dscmb filter
2624 {
2625 u32Flt0Id = u32ii - DSCMB_FLT_NUM + DSCMB_FLT_SHAREKEY_START_ID;
2626 }
2627 #endif
2628 else
2629 {
2630 continue;
2631 }
2632
2633 PVRCA_DBG(ULOGD("TSP", "[%s]u32Flt0Id %ld\n", __FUNCTION__, u32Flt0Id));
2634
2635 if (_ptsp_res->_TspState[u32EngId].FltState[u32Flt0Id] == E_DRVTSP_FLT_STATE_FREE)
2636 continue;
2637
2638 if((_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_SECTION) ||
2639 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI) ||
2640 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_PACKET) ||
2641 (_ptsp_res->_TspState[u32EngId].FltType[u32Flt0Id] == E_DRVTSP_FLT_TYPE_SECTION_VER))
2642 {
2643 //not dscmb type
2644 continue;
2645 }
2646
2647 u32PID = HAL_TSP_PidFlt_GetPid(HAL_TSP_GetPidFltReg(u32EngId, u32Flt0Id));
2648
2649 if(u32PID == DRVTSP_PID_NULL)
2650 {
2651 continue;
2652 }
2653
2654 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii] = (MS_U16)u32PID;
2655
2656 PVRCA_DBG(ULOGD("TSP", "[%s]u32Flt0Id %ld, u32PID %lx \n", __FUNCTION__, u32Flt0Id, u32PID));
2657
2658 // Searching FLT1 list, if pid repeated, do not set it again
2659 for(u32jj = 0; u32jj < u32DscmbFltNume; u32jj++)
2660 {
2661 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32jj] == DRVTSP_PID_NULL)
2662 continue;
2663
2664 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32jj] == (MS_U16)u32PID)
2665 {
2666 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef |= (1 << u32jj);
2667 break;
2668 }
2669 }
2670
2671 // If not exsit in FLT1 list, setting a new one
2672 if(u32jj == u32DscmbFltNume)
2673 {
2674 _TSP_SetNewDscmbPid2FLT1(u32EngId, u32ii, u32PID);
2675 PVRCA_DBG(ULOGD("TSP", "[%s]FLT %ld: PID 0x%lx, _u32Flt1Flag_DscmbRef 0x%lx\n", __FUNCTION__,u32ii, u32PID, _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef));
2676 }
2677 }
2678
2679 _ptsp_res->TSPPvrcaParams._bFLT1Dup_Enable = TRUE;
2680
2681 return TRUE;
2682 }
2683
2684 // Free all FLT1 when PVRCA close
2685 // Paired with _TSP_FLT1_Duplicate_FLT0
_TSP_Free_AllFLT1(void)2686 static MS_BOOL _TSP_Free_AllFLT1(void)
2687 {
2688 MS_U32 u32ii, u32Dmxid;
2689 TSP_Result Res = DRVTSP_OK;
2690
2691 PVRCA_DBG(ULOGD("TSP", "[%s]\n", __FUNCTION__));
2692
2693 if(_ptsp_res->TSPPvrcaParams._bFLT1Dup_Enable == FALSE)
2694 {
2695 return TRUE;
2696 }
2697
2698 for(u32ii = 0; u32ii < TSP_PIDFLT1_NUM; u32ii++)
2699 {
2700 u32Dmxid = u32ii+TSP_SECFLT_NUM;
2701 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(0, u32Dmxid), DRVTSP_PID_NULL);
2702 if(_TSP_PidFlt_Free(0, u32Dmxid, TRUE) != DRVTSP_OK)
2703 {
2704 Res = DRVTSP_FAIL;
2705 }
2706 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] = DRVTSP_PID_NULL;
2707 }
2708
2709 for(u32ii = 0; u32ii < DSCMB_FLT_NUM_ALL; u32ii++)
2710 {
2711 _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii] = DRVTSP_PID_NULL;
2712 }
2713
2714 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR = 0;
2715 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef = 0;
2716
2717 _ptsp_res->TSPPvrcaParams._bFLT1Dup_Enable = FALSE;
2718
2719 return (Res == DRVTSP_OK);
2720 }
2721
2722 #endif //udef NO_PVR
2723
2724
2725 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
_TSP_PCR_Adjust(MS_U32 u32EngId)2726 static MS_BOOL _TSP_PCR_Adjust(MS_U32 u32EngId)
2727 {
2728 MS_U32 u32Pcr = 0, u32Pcr_H = 0, u32Diff = 0, u32STC = 0;
2729
2730 HAL_TSP_HWPcr_Read(u32EngId, &u32Pcr, &u32Pcr_H);
2731
2732 if(_u8ResetPcr[u32EngId] >= 2)
2733 {
2734 if(_u8ResetPcr[u32EngId] == 3)
2735 {
2736 HAL_TSP_Stc_ctrl(u32EngId, STC_SYNTH_DEFAULT);
2737 }
2738 HAL_TSP_SetSTC(u32EngId, u32Pcr, u32Pcr_H);
2739 _u8ResetPcr[u32EngId] = 0;
2740 _u32PrevStcBase[u32EngId] = u32Pcr;
2741 _u32PrevPllControl[u32EngId] = HAL_TSP_GetSTCSynth(u32EngId);
2742 }
2743
2744 HAL_TSP_STC_Update_Disable(u32EngId, TRUE);
2745 u32STC = HAL_TSP_GetSTC(u32EngId);
2746 HAL_TSP_STC_Update_Disable(u32EngId, FALSE);
2747
2748 //ULOGD("TSP", "Pcr %08lx, STC %08lx \n", u32Pcr, u32STC);
2749 if((u32STC - _u32PrevStcBase[u32EngId]) > 0x4000)
2750 {
2751 //ULOGD("TSP", "STC_DIFF = %08lx ==== \n\n",u32STC -_u32PrevStcBase[u32EngId]);
2752 _u32PrevStcBase[u32EngId] = u32STC;
2753
2754 if(_u32PrevStcBase[u32EngId] > u32Pcr)
2755 {
2756 u32Diff = _u32PrevStcBase[u32EngId] - u32Pcr;
2757 if( u32Diff <= 0x02)
2758 {
2759 _u8ResetPcr[u32EngId] = 0;
2760 }
2761 else if( u32Diff < 0x1000)
2762 {
2763 _u32PrevPllControl[u32EngId] += ((u32Diff) >> 3 ); //now = error x alpha + prev
2764 HAL_TSP_Stc_ctrl(u32EngId, _u32PrevPllControl[u32EngId] + ((u32Diff)>>6)); //out = now + error x beta
2765 _u8ResetPcr[u32EngId] = 0;
2766 //ULOGD("TSP", "======== Set STC CONTROL <++> %08lx PCR/Diff = %08lx/%08lx \n",
2767 // _u32PrevPllControl[u32EngId] + ((_u32PrevStcBase[u32EngId] - u32Pcr)>>6),u32Pcr,_u32PrevStcBase[u32EngId]-u32Pcr);
2768 }
2769 else
2770 {
2771 _u8ResetPcr[u32EngId]++;
2772 }
2773 }
2774 else
2775 {
2776 u32Diff = u32Pcr - _u32PrevStcBase[u32EngId] ;
2777 if(( u32Diff) <= 0x02)
2778 {
2779 _u8ResetPcr[u32EngId] = 0;
2780 }
2781 else if((u32Diff) < 0x1000)
2782 {
2783 _u32PrevPllControl[u32EngId] -= ((u32Diff)>> 3); //now = error x alpha + prev
2784 HAL_TSP_Stc_ctrl(u32EngId, _u32PrevPllControl[u32EngId] - ((u32Diff)>> 6)); //out = now + error x beta
2785 _u8ResetPcr[u32EngId] = 0;
2786 //ULOGD("TSP", "======== Set STC CONTROL <--> %08lx PCR/Diff = %08lx/%08lx \n",
2787 // _u32PrevPllControl[u32EngId] - ((u32Pcr - _u32PrevStcBase[u32EngId] )>>6),u32Pcr,u32Pcr-_u32PrevStcBase[u32EngId] );
2788 }
2789 else
2790 {
2791 _u8ResetPcr[u32EngId]++;
2792 }
2793 }
2794 }
2795
2796 return TRUE;
2797 }
2798
2799 #endif //HWPCR_ENABLE
2800
2801 //--------------------------------------------------------------------------------------------------
2802 // Interrupt service routine of TSP
2803 // Arguments: None
2804 // Return: None
2805 //--------------------------------------------------------------------------------------------------
2806 #ifdef MSOS_TYPE_LINUX_KERNEL
2807 //static irqreturn_t _TSP_Isr(int irq,void *dev_id)
_TSP_Isr(void)2808 static void _TSP_Isr(void)
2809 #else
2810 static void _TSP_Isr(void)
2811 #endif
2812 {
2813 MS_U32 u32HwInt;
2814 MS_U32 u32SwInt;
2815 #ifdef TS2_IF_SUPPORT
2816 MS_U32 u32HwInt2;
2817 #endif
2818
2819 _ptsp_res->_u32DbgIntrCount++;
2820 //HAL_TSP_ISR_SAVE_ALL();
2821
2822 _TSP_INT_LOCK();
2823 u32HwInt = HAL_TSP_HW_INT_STATUS();
2824 u32SwInt = HAL_TSP_SW_INT_STATUS();
2825
2826 #ifdef TS2_IF_SUPPORT
2827 u32HwInt2 = HAL_TSP_HW_INT2_STATUS();
2828 #endif
2829
2830 _TSP_INT_UNLOCK();
2831
2832 //ULOGD("TSP", "u32HwInt %lx, u32SwInt %lx\n", u32HwInt, u32SwInt);
2833
2834 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
2835 if (u32HwInt2 & TSP_HWINT2_PCR_UPDATE_END)
2836 {
2837 if(_TSP_ChkHwPcrNotifyId(0)
2838 {
2839 _TSP_PCR_Adjust(0);
2840 }
2841 else
2842 {
2843 u32HwInt2 &= ~TSP_HWINT2_PCR_UPDATE_END;
2844 }
2845 }
2846 #endif
2847
2848 #ifndef NO_PVR
2849 if (HAS_FLAG(u32HwInt, TSP_HWINT_HW_PVR_MASK))
2850 {
2851 if(_TSP_ChkPvrNotifyId(0))
2852 {
2853 _TSP_SetEvent(HAS_FLAG(u32HwInt, TSP_HWINT_HW_PVR_MASK)); // Trigger task
2854 }
2855 else
2856 {
2857 u32HwInt &= ~TSP_HWINT_HW_PVR_MASK;
2858 }
2859 }
2860 #endif //udef NO_PVR
2861
2862 #ifdef TS2_IF_SUPPORT
2863 if (HAS_FLAG(u32HwInt2, TSP_HWINT2_HW_PVR1_MASK))
2864 {
2865 if(_TSP_ChkPvrNotifyId(1))
2866 {
2867 _TSP_SetEvent(HAS_FLAG(u32HwInt2, TSP_HWINT2_HW_PVR1_MASK)); // Trigger task
2868 }
2869 else
2870 {
2871 u32HwInt2 &= ~TSP_HWINT2_HW_PVR1_MASK;
2872 }
2873 }
2874 #endif
2875
2876 if (u32SwInt & TSP_SWINT_CTRL_FIRE)
2877 {
2878 MS_U32 u32EngId;
2879 //MS_U32 u32PidFltId;
2880 MS_U32 u32SecFltId;
2881 MS_U32 u32IntStat;
2882 //REG_SecFlt* pSecFilter;
2883
2884 u32EngId = (u32SwInt & TSP_SWINT_INFO_ENG_MASK) >> TSP_SWINT_INFO_ENG_SHFT;
2885 u32IntStat = (u32SwInt & TSP_SWINT_STATUS_CMD_MASK) >> TSP_SWINT_STATUS_CMD_SHFT;
2886 u32SecFltId = (u32SwInt & TSP_SWINT_INFO_SEC_MASK) >> TSP_SWINT_INFO_SEC_SHFT;
2887 //pSecFilter = &(_TspSec[u32EngId].Flt[u32SecFltId]);
2888
2889 #if DMX_DEBUG
2890 extern DMX_FLT_DBG_INFO stDmxDbgInfo[];
2891
2892 if(u32IntStat == TSP_SWINT_STATUS_SEC_RDY ||
2893 u32IntStat == TSP_SWINT_STATUS_REQ_RDY )
2894 {
2895 stDmxDbgInfo[u32SecFltId].u32Int_rdy ++;
2896 }
2897 else if(u32IntStat == TSP_SWINT_STATUS_BUF_OVFLOW)
2898 {
2899 stDmxDbgInfo[u32SecFltId].u32Int_ovf ++;
2900 }
2901 else if(u32IntStat == TSP_SWINT_STATUS_SEC_CRCERR)
2902 {
2903 stDmxDbgInfo[u32SecFltId].u32Int_crc ++;
2904 }
2905 #endif
2906
2907 if(_ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId] == E_DRVTSP_FLT_STATE_FREE)
2908 goto CLEAR_INT;
2909
2910 if(_TSP_ChkSecNotifyId(u32SecFltId) == FALSE)
2911 {
2912 u32SwInt = 0;
2913 u32IntStat = 0;
2914 u32HwInt &= ~TSP_HWINT_TSP_SW_INT_STATUS;
2915 }
2916
2917 switch (u32IntStat)
2918 {
2919 #ifndef NO_FILEIN
2920 case TSP_SWINT_CMD_DMA_PAUSE:
2921 HAL_TSP_TsDma_Pause();
2922 break;
2923
2924 case TSP_SWINT_CMD_DMA_RESUME:
2925 HAL_TSP_TsDma_Resume();
2926 break;
2927 #endif //udef NO_FILEIN
2928 case TSP_SWINT_STATUS_SEC_RDY:
2929 case TSP_SWINT_STATUS_REQ_RDY:
2930 case TSP_SWINT_STATUS_SEC_CRCERR:
2931 //ULOGD("TSP", "SEC %ld\n", u32SecFltId);
2932 if (TSP_SWINT_STATUS_SEC_CRCERR == u32IntStat && (_ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId] & E_DRVTSP_FLT_MODE_CRCCHK))
2933 {
2934 //printf("ERR %d\n", (int)u32SecFltId);
2935 if (_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_SEC_CRCERR)
2936 {
2937 _TSP_SetSecCrcId(u32SecFltId); // Set section event flag
2938 }
2939 else
2940 {
2941 break;
2942 }
2943 }
2944 else
2945 {
2946 //printf("SEC %d\n", (int)u32SecFltId);
2947 _TSP_SetSecRdyId(u32SecFltId); // Set section event flag
2948 }
2949
2950 if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_POLL)
2951 {
2952 _TSP_SetEvent(TSP_TASK_EVENT_SECTION_POLL); // Trigger task
2953 }
2954 else if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_SELF)
2955 {
2956 _TSP_SetEvent(TSP_TASK_EVENT_SECTION_SELF); // Trigger task
2957 #ifdef MSOS_TYPE_LINUX_KERNEL
2958 wake_up_interruptible(&(tsp_wq_head[u32SecFltId]));
2959 #endif
2960 }
2961 break;
2962
2963 case TSP_SWINT_STATUS_BUF_OVFLOW:
2964 //ULOGD("TSP", "OVF %ld\n", u32SecFltId);
2965 _TSP_SetSecOvfId(u32SecFltId); // Set section event flag
2966 if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_POLL)
2967 {
2968 _TSP_SetEvent(TSP_TASK_EVENT_SECTION_POLL); // Trigger task
2969 }
2970 else if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_SELF)
2971 {
2972 _TSP_SetEvent(TSP_TASK_EVENT_SECTION_SELF); // Trigger task
2973 #ifdef MSOS_TYPE_LINUX_KERNEL
2974 wake_up_interruptible(&(tsp_wq_head[u32SecFltId]));
2975 #endif
2976
2977 }
2978 break;
2979
2980 case TSP_SWINT_STATUS_PKT_OVRUN:
2981 //[TODO] Enable debug message when PCR filter can be handle by hardware.
2982 // TSP_DBG("Packet Overrun %d\n", u32EngId);
2983 break;
2984
2985 case TSP_SWINT_STATUS_SEC_ERROR:
2986 //[ISR print]
2987 // TSP_DBG("SEC error %d-0x%02X\n", u32EngId, u32SecFltId);
2988 break;
2989
2990 case TSP_SWINT_STATUS_DEBUG:
2991 //[ISR print]
2992 // TSP_DBG("DEBUG %d-0x%02X\n", u32EngId, u32SecFltId);
2993 if(_FwDbgInfo.bEnable)
2994 {
2995 //@TODO : after init/exit tsp drvier couple times, event _s32TspEventId creating will fail
2996 _TSP_SetEvent(TSP_TASK_EVENT_FWMSG);
2997 #ifdef MSOS_TYPE_LINUX_KERNEL
2998 wake_up_interruptible(&(tsp_wq_head[u32SecFltId]));
2999 #endif
3000
3001 }
3002 break;
3003
3004 default:
3005 //[ISR print]
3006 //DBG_TSP(TSP_DBG("Unknown TSP interrupt %d\n", u32EngId));
3007 break;
3008 }
3009 }
3010
3011 CLEAR_INT:
3012
3013 //If it still has interrupt status, it should be processed by another process again, do not clear interrupt status
3014
3015 _TSP_INT_LOCK();
3016
3017 if(u32SwInt)
3018 {
3019 HAL_TSP_Int_ClearSw();
3020 }
3021
3022 if(u32HwInt)
3023 {
3024 HAL_TSP_Int_ClearHw(u32HwInt);
3025 }
3026 #ifdef TS2_IF_SUPPORT
3027 if(u32HwInt2)
3028 {
3029 HAL_TSP_Int_ClearHw2(u32HwInt2);
3030 }
3031 #endif
3032
3033 _TSP_INT_UNLOCK();
3034
3035 //HAL_TSP_ISR_RESTORE_ALL();
3036 #ifdef MSOS_TYPE_LINUX_KERNEL
3037 //return IRQ_HANDLED;
3038 #endif
3039
3040 OSAL_TSP_IntEnable();
3041 }
3042
3043 void MDrv_TSP_SecFlt_Update(MS_U32 u32EngId, MS_U32 u32SecFltId)
3044 {
3045 _TSP_SetSecRdyId(u32SecFltId);
3046 }
3047
3048 static MS_BOOL _TSP_Isr_Proc_SecRdyCrc(MS_U32 u32EngId, MS_U32 u32FltId, MS_U32 u32CbOpt, MS_U32* pu32Evt)
3049 {
3050 MS_BOOL bData = 0;
3051 MS_U32 u32Event;
3052 MS_U32 u32Events;
3053 MS_U32 u32EvtNotify;
3054 P_DrvTSP_EvtCallback pfEvtCallback = NULL;
3055 static DrvTSP_Msg msg;
3056 MS_PHY phyRead;
3057 MS_U32 u32PIDFlt;
3058 REG_SecFlt *pSecFilter = _TSP_GET_SECFLT_REG(u32FltId);
3059
3060 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_DATA_INIT;
3061
3062 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
3063 {
3064 _TSP_GetEvent(u32Events, TSP_TASK_EVENT_SECTION_POLL, OSAL_EVENT_OR_CLEAR, 0);
3065 }
3066
3067 _TSP_IND_LOCK();
3068
3069 //using section filter ID to find the mapping pid filter id
3070 for(u32PIDFlt = 0; u32PIDFlt < TSP_PIDFLT_NUM; u32PIDFlt++)
3071 {
3072 if(_ptsp_res->_TspState[u32EngId].FltMap[u32PIDFlt] == u32FltId)
3073 {
3074 break;
3075 }
3076 }
3077
3078 if (TSP_PIDFLT_NUM == u32PIDFlt)
3079 goto PRCSEC_END;
3080
3081 if (!(_ptsp_res->_TspState[u32EngId].FltState[u32PIDFlt] & E_DRVTSP_FLT_STATE_ENABLE))
3082 {
3083 // TSP_DBG("[%s][%d] %d 0x%08x\n", __FUNCTION__, __LINE__,
3084 //(int)u32FltId, (int)_ptsp_res->_TspState[u32EngId].FltState[u32FltId]);
3085 goto PRCSEC_END;
3086 }
3087
3088 if (_TSP_GetFltDisableId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR))
3089 {
3090 //No need to disable filter here or Overflow callback will miss.
3091 _TSP_PidFlt_Disable(u32EngId, u32PIDFlt); // critical section
3092 //_TSP_GetSecRdyId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
3093 //_TSP_GetSecOvfId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
3094 }
3095 phyRead = HAL_TSP_SecBuf_GetBufRead(pSecFilter);
3096 bData = (phyRead != HAL_TSP_SecBuf_GetBufWrite(pSecFilter))? TRUE: FALSE; // critical section
3097
3098 if (bData)
3099 {
3100 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
3101 {
3102 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_DATA_READY;
3103 }
3104 else
3105 {
3106 //_TSP_SECFLT_LOCK(u32EngId, u32FltId);
3107 u32EvtNotify = _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32FltId];
3108 pfEvtCallback = _ptsp_res->_TspState[u32EngId].SecFltCallback[u32FltId];
3109 if ((u32EvtNotify & E_DRVTSP_EVENT_DATA_READY) && pfEvtCallback)
3110 {
3111 if(_ptsp_res->_TspState[u32EngId].FltState[u32PIDFlt] & E_DRVTSP_FLT_STATE_FREEING)
3112 {
3113 //ULOGD("TSP", "[%s][%d]Warning!! Filter %u is closing %x\n", __FUNCTION__, __LINE__, (unsigned int)u32PIDFlt, (unsigned int)stDrvState);
3114 _TSP_IND_UNLOCK();
3115 return FALSE;
3116 }
3117 else
3118 {
3119 _ptsp_res->_TspState[u32EngId].FltState[u32PIDFlt] |= E_DRVTSP_FLT_STATE_CBRUN;
3120 }
3121
3122 msg.FltInfo = (u32EngId <<MSG_FLTINFO_ENG_ID_SHFT) | (u32FltId <<MSG_FLTINFO_SEC_ID_SHFT);
3123 _u32TaskLine = __LINE__;
3124 //_TSP_SECFLT_UNLOCK(u32EngId, u32FltId);
3125 _TSP_IND_UNLOCK();
3126 pfEvtCallback(E_DRVTSP_EVENT_DATA_READY, &msg);
3127 _u32TaskLine = __LINE__;
3128
3129 _TSP_IND_LOCK();
3130 _ptsp_res->_TspState[u32EngId].FltState[u32PIDFlt] &= ~E_DRVTSP_FLT_STATE_CBRUN;
3131 if (phyRead == HAL_TSP_SecBuf_GetBufRead(pSecFilter))
3132 {
3133 _TSP_GetSecRdyId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
3134 }
3135 }
3136 }
3137 }
3138 else
3139 {
3140 //_TSP_GetSecRdyId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
3141 }
3142
3143 //Clear evets,
3144 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
3145 {
3146 _TSP_GetSecRdyId(u32FltId, &u32Event, OSAL_EVENT_OR_CLEAR);
3147 }
3148
3149 PRCSEC_END:
3150
3151 _TSP_IND_UNLOCK();
3152
3153 if (bData)
3154 {
3155 return TRUE;
3156 }
3157
3158 return FALSE;
3159 }
3160
3161 static MS_BOOL _TSP_Isr_Proc_SecCrcErr(MS_U32 u32EngId, MS_U32 u32FltId, MS_U32 u32CbOpt, MS_U32* pu32Evt)
3162 {
3163 MS_U32 u32Events;
3164 MS_U32 u32EvtNotify;
3165 P_DrvTSP_EvtCallback pfEvtCallback = NULL;
3166 static DrvTSP_Msg msg;
3167 MS_U32 u32PIDFlt;
3168
3169 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_DATA_INIT;
3170
3171 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
3172 {
3173 _TSP_GetEvent(u32Events, TSP_TASK_EVENT_SECTION_POLL, OSAL_EVENT_OR_CLEAR, 0);
3174 }
3175
3176 //using section filter ID to find the mapping pid filter id
3177 for(u32PIDFlt = 0; u32PIDFlt < TSP_PIDFLT_NUM; u32PIDFlt++)
3178 {
3179 if(_ptsp_res->_TspState[u32EngId].FltMap[u32PIDFlt] == u32FltId)
3180 break;
3181 }
3182 if(u32PIDFlt == TSP_PIDFLT_NUM)
3183 {
3184 return FALSE;
3185 }
3186
3187 if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32FltId] & E_DRVTSP_EVENT_SEC_CRCERR) == 0)
3188 {
3189 return FALSE;
3190 }
3191
3192 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
3193 {
3194 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_SEC_CRCERR;
3195 }
3196 else
3197 {
3198 //_TSP_SECFLT_LOCK(u32EngId, u32SecFltId);
3199 _TSP_IND_LOCK();
3200 u32EvtNotify = _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32FltId];
3201 pfEvtCallback = _ptsp_res->_TspState[u32EngId].SecFltCallback[u32FltId];
3202 if ((u32EvtNotify & E_DRVTSP_EVENT_SEC_CRCERR) && pfEvtCallback)
3203 {
3204 msg.FltInfo = (u32EngId <<MSG_FLTINFO_ENG_ID_SHFT) | (u32FltId <<MSG_FLTINFO_SEC_ID_SHFT);
3205 //_TSP_SECFLT_UNLOCK(u32EngId, u32SecFltId);
3206 _u32TaskLine = __LINE__;
3207 _TSP_IND_UNLOCK();
3208 pfEvtCallback(E_DRVTSP_EVENT_SEC_CRCERR, &msg);
3209 _u32TaskLine = __LINE__;
3210 }
3211 else
3212 {
3213 _TSP_IND_UNLOCK();
3214 }
3215 }
3216
3217 return TRUE;
3218 }
3219
3220 #ifndef NO_PVR
3221 static void _TSP_Isr_Proc_Pvr(MS_U32 u32CbOpt)
3222 {
3223 MS_U32 u32Events = 0;
3224 static DrvTSP_Msg msg;
3225
3226 if (((_ptsp_res->_PvrEvtNotify[0] & E_DRVTSP_EVENT_CB_MASK) != u32CbOpt)
3227 #ifdef TS2_IF_SUPPORT
3228 && ((_ptsp_res->_PvrEvtNotify[1] & E_DRVTSP_EVENT_CB_MASK) != u32CbOpt)
3229 #endif
3230 )
3231 {
3232 return;
3233 }
3234
3235 if (u32CbOpt == E_DRVTSP_EVENT_CB_POLL)
3236 {
3237 _TSP_GetEvent(u32Events, TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL |
3238 TSP_TASK_EVENT_CBPVR0_RDY_POLL, OSAL_EVENT_OR_CLEAR, 0);
3239 }
3240 else
3241 {
3242 _TSP_GetEvent(u32Events, TSP_TASK_EVENT_PVR0_RDY_SELF | TSP_TASK_EVENT_PVR1_RDY_SELF |
3243 TSP_TASK_EVENT_CBPVR0_RDY_SELF, OSAL_EVENT_OR_CLEAR, 0);
3244 }
3245
3246 if (_ptsp_res->_PvrEvtNotify[0] && _ptsp_res->_PvrCallback[0])
3247 {
3248 switch (u32Events & (TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL | TSP_TASK_EVENT_PVR0_RDY_SELF | TSP_TASK_EVENT_PVR1_RDY_SELF))
3249 {
3250 case TSP_TASK_EVENT_PVR0_RDY_SELF:
3251 case TSP_TASK_EVENT_PVR0_RDY_POLL:
3252 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_FULL))
3253 {
3254 msg.PvrBufId = (0x0 << MSG_PVRBUF_ID_SHFT);
3255 _ptsp_res->_PvrCallback[0](E_DRVTSP_EVENT_PVRBUF_FULL, &msg);
3256 }
3257 break;
3258 case TSP_TASK_EVENT_PVR1_RDY_SELF:
3259 case TSP_TASK_EVENT_PVR1_RDY_POLL:
3260 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_FULL))
3261 {
3262 msg.PvrBufId = (0x1 << MSG_PVRBUF_ID_SHFT);
3263 _ptsp_res->_PvrCallback[0](E_DRVTSP_EVENT_PVRBUF_FULL, &msg);
3264 }
3265 break;
3266 case (TSP_TASK_EVENT_PVR0_RDY_SELF | TSP_TASK_EVENT_PVR1_RDY_SELF):
3267 case (TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL):
3268 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_OVERFLOW))
3269 {
3270 msg.PvrBufId = (MSG_PVRBUF_ID_NULL << MSG_PVRBUF_ID_SHFT);
3271 _ptsp_res->_PvrCallback[0](E_DRVTSP_EVENT_PVRBUF_OVERFLOW, &msg);
3272 }
3273 break;
3274 default:
3275 break;
3276 }
3277 }
3278 #ifdef TS2_IF_SUPPORT
3279 if (_ptsp_res->_PvrEvtNotify[1] && _ptsp_res->_PvrCallback[1])
3280 {
3281 switch (u32Events & (TSP_TASK_EVENT_CBPVR0_RDY_POLL | TSP_TASK_EVENT_CBPVR0_RDY_SELF))
3282 {
3283 case TSP_TASK_EVENT_CBPVR0_RDY_POLL:
3284 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[1], E_DRVTSP_EVENT_CBBUF_FULL))
3285 {
3286 msg.Pvr1BufId = (0x0 << MSG_PVRBUF_ID_SHFT);
3287 _ptsp_res->_PvrCallback[1](E_DRVTSP_EVENT_CBBUF_FULL, &msg);
3288 }
3289 break;
3290 }
3291 }
3292 #endif
3293 }
3294 #endif //udef NO_PVR
3295
3296 static MS_BOOL _TSP_Isr_Proc_SecOvf(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U32 u32CbOpt, MS_U32* pu32Evt)
3297 {
3298 static DrvTSP_Msg msg;
3299 MS_U32 u32EvtNotify, u32Events = 0;
3300 P_DrvTSP_EvtCallback pfEvtCallback = NULL;
3301 MS_U32 u32PidFltId;
3302 MS_BOOL bDisabled = FALSE;
3303
3304 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_DATA_INIT;
3305
3306 _TSP_IND_LOCK();
3307 for (u32PidFltId = 0; u32PidFltId < TSP_PIDFLT_NUM; u32PidFltId++)
3308 {
3309 if(_ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId] == 0xFF)
3310 continue;
3311 if (_ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId] == u32SecFltId)
3312 {
3313 if(_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] & E_DRVTSP_FLT_STATE_ENABLE)
3314 {
3315 _TSP_PidFlt_Disable(u32EngId, u32PidFltId); // ???? move out --> OK // // critical section
3316 bDisabled = TRUE;
3317 }
3318 break;
3319 }
3320 }
3321
3322 if(u32PidFltId == TSP_PIDFLT_NUM)
3323 {
3324 _TSP_IND_UNLOCK();
3325 return TRUE;
3326 }
3327
3328 if (E_DRVTSP_EVENT_CB_POLL == u32CbOpt)
3329 {
3330 *pu32Evt = (MS_U32)E_DRVTSP_EVENT_BUF_OVERFLOW;
3331
3332 //---- if overflow, clear evets to wait restarting--------
3333 _TSP_GetSecOvfId (u32SecFltId, &u32Events, OSAL_EVENT_OR_CLEAR);
3334 _TSP_GetSecCrcId (u32SecFltId, &u32Events, OSAL_EVENT_OR_CLEAR);
3335 _TSP_GetSecRdyId (u32SecFltId, &u32Events, OSAL_EVENT_OR_CLEAR);
3336 //-------------------------------------------------------------------------
3337 }
3338 else
3339 {
3340 //_TSP_SECFLT_LOCK(u32EngId, u32SecFltId);
3341 u32EvtNotify = _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId];
3342 pfEvtCallback = _ptsp_res->_TspState[u32EngId].SecFltCallback[u32SecFltId];
3343 if (_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] == E_DRVTSP_FLT_STATE_FREE && (bDisabled == FALSE))
3344 {
3345 goto PROC_END;
3346 }
3347
3348 if ((u32EvtNotify & E_DRVTSP_EVENT_BUF_OVERFLOW) && pfEvtCallback)
3349 {
3350 if(_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] & E_DRVTSP_FLT_STATE_FREEING)
3351 {
3352 //ULOGD("TSP", "[%s][%d]Warning!! Filter %u is closing %x\n", __FUNCTION__, __LINE__, (unsigned int)u32PidFltId, (unsigned int)stDrvState);
3353 goto PROC_END;
3354 }
3355 else
3356 {
3357 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] |= E_DRVTSP_FLT_STATE_CBRUN;
3358 }
3359 _TSP_IND_UNLOCK();
3360 msg.FltInfo = (u32EngId <<MSG_FLTINFO_ENG_ID_SHFT) | (u32SecFltId <<MSG_FLTINFO_SEC_ID_SHFT);
3361 _u32TaskLine = __LINE__;
3362 pfEvtCallback(E_DRVTSP_EVENT_BUF_OVERFLOW, &msg);
3363 _u32TaskLine = __LINE__;
3364
3365 _TSP_IND_LOCK();
3366 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] &= ~E_DRVTSP_FLT_STATE_CBRUN;
3367 }
3368 }
3369
3370 PROC_END:
3371
3372 _TSP_IND_UNLOCK();
3373 return TRUE;
3374 }
3375
3376 #ifdef MSOS_TYPE_LINUX_KERNEL
3377 static void _TSP_Isr_ProcSelf(MS_U32 u32PrcEvt, TSP_Result* pRet)
3378 {
3379 #else
3380 static void _TSP_Isr_ProcSelf(OSAL_TSP_ProcTypeParam* pData)
3381 {
3382 TSP_Result* pRet = (TSP_Result*)pData->pRet;
3383 #endif
3384 MS_U32 u32Events = 0, u32SecRdy = 0, u32SecOvf = 0, u32SecCrc = 0;;//, u32SecFree = 0;
3385 MS_U32 i = 0, j = 0;
3386 MS_U32 u32Evt = 0;
3387 //MS_U32 u32PidFltId;
3388 //MS_U32 u32Mask, u32AskFreeFltList = 0;
3389 //MS_U32 u32GroupNum = (TSP_PIDFLT_NUM_ALL+31)>>5;
3390 MS_U32 u32SecFltId = 0;
3391 //MS_U32 u32TempEvent = 0;
3392
3393 #if 0
3394 _TSP_GetEvent(u32TempEvent, TSP_TASK_EVENT_FWMSG, OSAL_EVENT_OR_CLEAR, 0);
3395 if(u32TempEvent & (TSP_TASK_EVENT_FWMSG))
3396 {
3397 _DumpFwMsg();
3398 }
3399 #endif
3400
3401 #ifdef MSOS_TYPE_LINUX_KERNEL
3402 u32Events = u32PrcEvt;
3403 #else
3404 _TSP_GetEvent(u32Events, TSP_TASK_EVENT_GROUP_SELF | TSP_TASK_EVENT_FLT_FREE, OSAL_EVENT_OR_CLEAR, MSOS_WAIT_FOREVER);
3405 *pRet = DRVTSP_FAIL;
3406 #endif
3407
3408 //ULOGD("TSP", "TSP Evt %lx %ld\n", u32Events, MsOS_GetSystemTime());
3409
3410 _u32TaskLine = __LINE__;
3411
3412 #ifndef NO_PVR
3413 if (u32Events & (TSP_TASK_EVENT_PVR0_RDY_POLL|TSP_TASK_EVENT_PVR1_RDY_POLL))
3414 {
3415 _TSP_Isr_Proc_Pvr(E_DRVTSP_EVENT_CB_SELF);
3416 }
3417 #endif //udef NO_PVR
3418 if (u32Events & TSP_TASK_EVENT_SECTION_SELF)
3419 {
3420 for (i = 0; i < TSP_ENGINE_NUM; i++)
3421 {
3422 for (j = 0; j < ((TSP_SECFLT_NUM_All+31)>>5); j++)
3423 {
3424 _TSP_GetModeSecOvf(j, 0xFFFFFFFF, &u32SecOvf, OSAL_EVENT_OR_CLEAR);
3425 _TSP_GetModeSecRdy(j, 0xFFFFFFFF, &u32SecRdy, OSAL_EVENT_OR_CLEAR);
3426 _TSP_GetModeSecCrc(j, 0xFFFFFFFF, &u32SecCrc, OSAL_EVENT_OR_CLEAR);
3427 while (u32SecRdy)
3428 {
3429 u32SecFltId = MAsm_CPU_GetTrailOne(u32SecRdy) + (j << 5); //[TODO] balance every filter priority
3430 //[NOTE] it may be already balance for long term running
3431 *pRet = (_TSP_Isr_Proc_SecRdyCrc(i, u32SecFltId, E_DRVTSP_EVENT_CB_SELF, &u32Evt))? DRVTSP_OK: DRVTSP_FAIL;
3432 u32SecRdy &= ~(1 << (u32SecFltId & 0x1F));
3433 }
3434
3435 while (u32SecCrc)
3436 {
3437 u32SecFltId = MAsm_CPU_GetTrailOne(u32SecCrc) + (j << 5); //[TODO] balance every filter priority
3438 //[NOTE] it may be already balance for long term running
3439 *pRet = (_TSP_Isr_Proc_SecCrcErr(i, u32SecFltId, E_DRVTSP_EVENT_CB_SELF, &u32Evt))? DRVTSP_OK: DRVTSP_FAIL;
3440 u32SecCrc &= ~(1 << (u32SecFltId & 0x1F));
3441 }
3442
3443 while(u32SecOvf)
3444 {
3445 u32SecFltId = MAsm_CPU_GetTrailOne(u32SecOvf) + (j << 5); //[TODO] balance every filter priority
3446 //[NOTE] it may be already balance for long term running
3447 *pRet = (_TSP_Isr_Proc_SecOvf(i, u32SecFltId, E_DRVTSP_EVENT_CB_SELF, &u32Evt))? DRVTSP_OK: DRVTSP_FAIL;
3448 u32SecOvf &= ~(1 << (u32SecFltId & 0x1F));
3449 }
3450 }
3451 }
3452 }
3453
3454 #if 0
3455 if (u32Events & TSP_TASK_EVENT_FLT_FREE)
3456 {
3457 for (j = 0; j < u32GroupNum; j++)
3458 {
3459 u32Mask = u32AskFreeFltList = _TSP_GetAskPidFltFree0List(j);
3460
3461 if (u32Mask)
3462 {
3463 _TSP_IND_LOCK();
3464 }
3465
3466 while (u32AskFreeFltList)
3467 {
3468 u32PidFltId = MAsm_CPU_GetTrailOne(u32AskFreeFltList) + (j << 5);
3469
3470 if (_ptsp_res->_TspState[0].FltState[u32PidFltId] != E_DRVTSP_FLT_STATE_FREE)
3471 {
3472 u32SecFltId = HAL_TSP_PidFlt_GetSecFlt(HAL_TSP_GetPidFltReg(0, u32PidFltId));
3473 _TSP_GetSecRdyId(u32SecFltId, &u32SecRdy, OSAL_EVENT_OR_CLEAR);
3474 _TSP_GetSecOvfId(u32SecFltId, &u32SecOvf, OSAL_EVENT_OR_CLEAR);
3475 _TSP_SecBuf_Free(0, u32SecFltId);
3476 _TSP_SecFlt_Free(0, u32SecFltId, TRUE);
3477 _TSP_PidFlt_Free(0, u32PidFltId, FALSE);
3478 }
3479 _TSP_FLAG_SetDone(u32PidFltId);
3480 u32AskFreeFltList &= (~(1<<(u32PidFltId & 0x1F)));
3481 }
3482 if (u32Mask)
3483 {
3484 _TSP_ClrAskPidFltFree0List(j, u32Mask);
3485 _TSP_IND_UNLOCK();
3486 }
3487 }
3488 }
3489 #endif
3490 }
3491
3492 static void _TSP_Isr_ProcPoll(OSAL_TSP_ProcTypeParam* pData, MS_U32* pu32Evt)
3493 {
3494 MS_U32 u32Events = 0, u32SecOvf = 0, u32SecCrc = 0;
3495 MS_U32 i = 0;
3496 MS_U32 u32FltId = pData->u32FltId;
3497 TSP_Result* pRet = (TSP_Result*)pData->pRet;
3498 MS_BOOL bRes;
3499 MS_U32 u32FwEvent = 0;
3500
3501 _TSP_GetEvent(u32FwEvent, TSP_TASK_EVENT_FWMSG, OSAL_EVENT_OR_CLEAR, 0);
3502 if(u32FwEvent & (TSP_TASK_EVENT_FWMSG))
3503 {
3504 _DumpFwMsg();
3505 }
3506
3507 _TSP_GetEvent(u32Events, TSP_TASK_EVENT_GROUP_POLL, OSAL_EVENT_OR, 0);
3508
3509 *pRet = DRVTSP_FAIL;
3510
3511 #ifndef NO_PVR
3512 if ((u32Events & (TSP_TASK_EVENT_PVR0_RDY_POLL|TSP_TASK_EVENT_PVR1_RDY_POLL|TSP_TASK_EVENT_CBPVR0_RDY_POLL))
3513 && (u32FltId >= TSP_SECFLT_NUM) && (u32FltId < (TSP_SECFLT_NUM+ TSP_PIDFLT1_NUM)))
3514 {
3515 _TSP_Isr_Proc_Pvr(E_DRVTSP_EVENT_CB_POLL);
3516 return;
3517 }
3518 #endif //udef NO_PVR
3519
3520 for (i = 0; i < TSP_ENGINE_NUM; i++)
3521 {
3522 MS_U32 u32SecFltId;
3523
3524 REG_PidFlt *pPidFilter = HAL_TSP_GetPidFltReg(i, u32FltId);
3525 u32SecFltId = HAL_TSP_PidFlt_GetSecFlt(pPidFilter);
3526
3527 *pRet = (_TSP_Isr_Proc_SecRdyCrc(i, u32SecFltId, E_DRVTSP_EVENT_CB_POLL, pu32Evt))? DRVTSP_OK: DRVTSP_FAIL;
3528 if (DRVTSP_FAIL == *pRet)
3529 {
3530 bRes = _TSP_GetSecCrcId(u32SecFltId, &u32SecCrc, OSAL_EVENT_OR);
3531
3532 if (bRes)
3533 {
3534 *pRet = (_TSP_Isr_Proc_SecCrcErr(i, u32SecFltId, E_DRVTSP_EVENT_CB_POLL, pu32Evt))? DRVTSP_OK: DRVTSP_FAIL;
3535 }
3536 }
3537 if (DRVTSP_FAIL == *pRet)
3538 {
3539 bRes = _TSP_GetSecOvfId(u32SecFltId, &u32SecOvf, OSAL_EVENT_OR);
3540
3541 if (bRes)
3542 {
3543 *pRet = (_TSP_Isr_Proc_SecOvf(i, u32SecFltId, E_DRVTSP_EVENT_CB_POLL, pu32Evt))? DRVTSP_OK: DRVTSP_FAIL;
3544 }
3545 }
3546 }
3547 }
3548
3549 #ifndef MSOS_TYPE_LINUX_KERNEL
3550 static void _TSP_Isr_Proc_Task(OSAL_TSP_ProcTypeParam* pDummy, MS_U32* pu32Dummy)
3551 {
3552 TSP_Result Ret;
3553 OSAL_TSP_ProcTypeParam Data;
3554
3555 Data.u32FltId = 0xFFFFFFFF;
3556 Data.pRet = (void*)&Ret;
3557 Data.bInfiniteWait = TRUE;
3558 Data.bFromTask = TRUE;
3559
3560 while (1)
3561 {
3562 _TSP_EXT_LOCK();
3563 if (_db_flag == 1)
3564 {
3565 _db_flag = 2;
3566 _TSP_EXT_UNLOCK();
3567 break;
3568 }
3569 _TSP_EXT_UNLOCK();
3570 _TSP_Isr_ProcSelf(&Data);
3571 } // Task while loop
3572
3573 _s32TspTaskId = -1;
3574 TSP_DBG("TSP ISR Proc End!!!\n");
3575
3576 }
3577 #endif
3578
3579 static char tsp_mutex[] = "TSP_Mutex";
3580 static char tsp_ind_mutex[] = "TSP_Ind_Mutex";
3581 static char tsp_int_mutex[] = "TSP_Int_Mutex";
3582 static char tsp_ext_mutex[] = "TSP_Ext_Mutex";
3583 static char tsp_event[] = "TSP_Event";
3584
3585 static char tsp_secRdy[] = "TSP_SecRdy";
3586 static char tsp_crcerr[] = "TSP_CrcErr";
3587 static char tsp_secovf[] = "TSP_SecOvf";
3588 static char tsp_fltdis[] = "TSP_FltDis";
3589 //static char freelist0[] = "TSP_FreeList0";
3590 //static char freelistdefer0[] = "TSP_FreeListDefer0";
3591 //static char tsp_done[] = "TSP_Done";
3592 #ifndef MSOS_TYPE_LINUX_KERNEL
3593 static char tsp_isr_task[] = "TSP_ISR_Task";
3594 #endif
3595
3596 static TSP_Result _TSP_Init(MS_BOOL bResetSwState, MS_BOOL bRestoreRegState)
3597 {
3598 MS_VIRT virtTspBank,virtIRBank;
3599 MS_PHY phyTspBankSize,phyIrBankSize;
3600 MS_BOOL bAlive;
3601 MS_U32 u32FwSize = 0;
3602 MS_PHY phyFwAddr = 0;
3603 MS_U8 u8ii;
3604
3605 if (FALSE == MDrv_MMIO_GetBASE(&virtTspBank, &phyTspBankSize, MS_MODULE_TSP))
3606 {
3607 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE fail\n"));
3608 MS_ASSERT(0);
3609 }
3610 if (FALSE == MDrv_MMIO_GetBASE(&virtIRBank, &phyIrBankSize, MS_MODULE_IR))
3611 {
3612 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE (PM base)fail\n"));
3613 MS_ASSERT(0);
3614 }
3615
3616 HAL_TSP_SetBank(virtTspBank, virtIRBank);
3617
3618 #ifdef STC64_SUPPORT
3619 HAL_TSP_STC64_Mode_En(TRUE);
3620 #endif
3621
3622 bAlive = HAL_TSP_Alive();
3623 if (!bAlive)
3624 {
3625 HAL_TSP_PowerCtrl(ENABLE);
3626 HAL_TSP_Reset(0);
3627 // Diable interrupt
3628 HAL_TSP_Int_Disable(TSP_HWINT_ALL);
3629 #ifdef TS2_IF_SUPPORT
3630 HAL_TSP_Int2_Disable(TSP_HWINT2_STATUS_MASK);
3631 #endif
3632 }
3633 else if(bResetSwState == FALSE)
3634 {
3635 HAL_ResetAll();
3636 MsOS_DelayTask(5);
3637 }
3638
3639 // IntDisable
3640 // IntDetach
3641 OSAL_TSP_IntDisable();
3642 //#ifndef MSOS_TYPE_LINUX_KERNEL
3643 OSAL_TSP_IntDetach();
3644 //#endif
3645
3646 if (!bAlive)
3647 {
3648 // Disable CPU
3649 HAL_TSP_SetCtrlMode(0, 0x0, TSP_IF_NUM); // Disable TSP0(Reset CPU), Software_Reset
3650
3651 // Richard: Enable indirect access
3652 HAL_TSP_Ind_Enable();
3653 HAL_TSP_HW_Lock_Init(); //Note: SW_Reset must be free first, then XIU can be written
3654 #ifndef NO_FILEIN
3655 _TSP_CmdQ_Init();
3656 #endif
3657 HAL_TSP_WbDmaEnable(TRUE);
3658
3659 #ifndef NO_FILEIN
3660 HAL_TSP_Scmb_Detect(TRUE);
3661 #endif
3662 HAL_TSP_DoubleBuf_Disable();
3663
3664 // Mark : Byte enable setting, fix HW bug. (Important)
3665 HAL_TSP_HwPatch();
3666 }
3667
3668 if (bResetSwState)
3669 {
3670 _TSP_SwStateReset(FALSE);
3671 }
3672
3673 if (!bAlive)
3674 {
3675 //if(bRestoreRegState == 0)
3676 {
3677 _TSP_RegStateReset();
3678 }
3679
3680 if (_TSP_GetFirmware(&phyFwAddr, &u32FwSize) == FALSE)
3681 {
3682 MS_CRITICAL_MSG(TSP_DBG ("TSP init fail: Please set FW address and size\n"));
3683 return DRVTSP_FAIL;
3684 }
3685
3686 //TSP_DBG("[%s][%d]Reset CMDQ\n",__FUNCTION__,__LINE__);
3687 #ifndef NO_FILEIN
3688 if(!HAL_TSP_CmdQ_Reset())
3689 {
3690 return DRVTSP_FAIL;
3691 }
3692 #endif
3693
3694 HAL_TSP_CPU_SetBase(phyFwAddr, u32FwSize);
3695 // Synthesizer Tuning
3696 // For difference : 100 - 4000 STC
3697 // Step: 10 STC
3698 // HAL_TSP_SetFwMsg(0x03A4); // Catch up n*10 STC in 1/20 sec
3699
3700 HAL_TSP_SetCtrlMode(0, TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); // Enable TSP CPU
3701
3702 //TSP_DBG ("**************************DDD TSP protect miu00000000000000000\n");
3703 HAL_TSP_OrzWriteProtect_Enable(TRUE, 0, 0);
3704
3705 HAL_Reset_WB();
3706
3707 HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); // Enable TSP CPU
3708
3709 HAL_TSP_Int_ClearSw();
3710 HAL_TSP_Int_ClearHw(TSP_HWINT_ALL);
3711 #ifdef TS2_IF_SUPPORT
3712 HAL_TSP_Int_ClearHw2(TSP_HWINT2_STATUS_MASK);
3713 #endif
3714
3715 while (FALSE == HAL_TSP_Alive())
3716 {
3717 MS_CRITICAL_MSG(TSP_DBG("Reset TSP CPU fail\n"));
3718 HAL_TSP_SetCtrlMode(0, 0, TSP_IF_NUM);
3719 HAL_TSP_CPU_SetBase(phyFwAddr, u32FwSize);
3720 HAL_TSP_SetCtrlMode(0, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);// | TSP_CTRL_CLK_GATING_DISABLE); // Enable TSP CPU
3721 }
3722
3723 HAL_TSP_Check_FW_VER();
3724
3725 HAL_TSP_Int_ClearSw();
3726 HAL_TSP_Int_ClearHw(TSP_HWINT_ALL);
3727 #ifdef TS2_IF_SUPPORT
3728 HAL_TSP_Int_ClearHw2(TSP_HWINT2_STATUS_MASK);
3729 #endif
3730
3731 // Implicity MDrv_TSP_Reset()
3732 #ifndef NO_FILEIN
3733 HAL_TSP_TsDma_SetDelay(0x0A); // Set TsDma delay, //jyliu.tsp, how come the value?
3734 #endif
3735
3736 _FwDbgInfo.bEnable = FALSE;
3737 _FwDbgInfo.phyBufAddr = 0x0;
3738 _FwDbgInfo.u32Size = 0x0;
3739 _FwDbgInfo.u32ReadPos = 0x0;
3740 _FwDbgInfo.u32WritePos = 0x0;
3741
3742 }
3743
3744 // STC control by TSP need indirect R/W enable
3745 for(u8ii = 0; u8ii < STC_SYNTH_NUM; u8ii++)
3746 {
3747 HAL_TSP_Stc_ctrl(u8ii, STC_SYNTH_DEFAULT);
3748 }
3749
3750 // Enable SYNC_RISING_DETECT and VALID_FALLING_DETECT for Serial mode
3751 HAL_TSP_Enable_ValidSync_Dectect();
3752
3753 // Disable TSIF1
3754 #ifndef NO_PVR
3755 //HAL_TSP_PVR_Enable(FALSE);
3756 #endif
3757
3758 #ifdef MSOS_TYPE_LINUX_KERNEL
3759 for (u8ii= 0; u8ii< TSP_SECFLT_NUM_All; u8ii++)
3760 {
3761 init_waitqueue_head(&(tsp_wq_head[u8ii]));
3762 }
3763 #endif
3764
3765 OSAL_TSP_IntAttach(_TSP_Isr);
3766 //#ifndef MSOS_TYPE_LINUX_KERNEL
3767 OSAL_TSP_IntEnable();
3768 //#endif
3769
3770 if (!bAlive)
3771 {
3772 // [URANUS] Richard: Refine the interrupt selection later.
3773 HAL_TSP_Int_Enable(TSP_HWINT_TSP_SW_INT_STATUS); // Enable TSP hardware interrupt
3774 }
3775
3776 #ifndef NO_PVR
3777 for (u8ii = 0; u8ii < TSP_PVR_IF_NUM; u8ii++)
3778 {
3779 _ptsp_res->_PvrEvtNotify[u8ii] = E_DRVTSP_EVENT_DATA_INIT;
3780 _ptsp_res->_PvrCallback[u8ii] = NULL;
3781 }
3782 for (u8ii = 0; u8ii < ((TSP_PVR_IF_NUM+31)>>5); u8ii++)
3783 {
3784 _u32PvrNotifyId[u8ii] = 0;
3785 }
3786 #endif
3787
3788 _ptsp_res->_s32TspMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_mutex); // MsOS_CreateMutex(E_MSOS_FIFO, "TSP_Mutex");
3789 _ptsp_res->_s32IndMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_ind_mutex); // MsOS_CreateMutex(E_MSOS_FIFO, "TSP_Mutex");
3790 _ptsp_res->_s32IntRegMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_int_mutex);
3791 _s32ExtMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_ext_mutex);
3792 _s32TspEventId = OSAL_TSP_EventCreate((MS_U8*)tsp_event); // MsOS_CreateEventGroup("TSP_Event");
3793
3794 for (u8ii = 0; u8ii < (MS_U8)((TSP_SECFLT_NUM_All+31)>>5); u8ii++)
3795 {
3796 _s32TspSecRdyId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_secRdy);
3797 _s32TspSecOvfId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_crcerr);
3798 _s32TspSecCrcId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_secovf);
3799 _s32TspFltDisableId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_fltdis);
3800
3801 if(bResetSwState)
3802 {
3803 _u32SecNotifyId[u8ii] = 0;
3804 }
3805 }
3806
3807 #if 0
3808 for (u8ii = 0; u8ii < ((TSP_PIDFLT_NUM_ALL+31)>>5); u8ii++)
3809 {
3810 _s32EventFree0[u8ii] = OSAL_TSP_EventCreate((MS_U8*)freelist0);
3811 _s32EventFreeDefer0[u8ii] = OSAL_TSP_EventCreate((MS_U8*)freelistdefer0);
3812 _s32DoneFlags[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_done);
3813 }
3814 #endif
3815
3816 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
3817 if(bResetSwState)
3818 {
3819 for (u8ii = 0; u8ii < (MS_U8)((TSP_PCRFLT_NUM+31)>>5); u8ii++)
3820 {
3821 _u32HwPcrNotifyId[u8ii] = 0;
3822 }
3823 }
3824 #endif
3825
3826 #ifndef MSOS_TYPE_LINUX_KERNEL
3827 _s32TspTaskId = OSAL_TSP_TaskCreate(_TSP_Isr_Proc_Task, (MS_U8*)tsp_isr_task);
3828 #endif
3829
3830 _ptsp_res->_bSWInitReady = TRUE;
3831 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_INIT;
3832 _ptsp_res->_u32LastErr = DRVTSP_OK;
3833 _ptsp_res->_u32ProcessNum = 1UL;
3834
3835 if(bResetSwState)
3836 {
3837 #ifdef VQ_ENABLE
3838 _ptsp_res->_u32NULLFileFilterID = 0xFFFFFFFFUL;
3839 #endif
3840 _ptsp_res->_bLiveSING_FilePP = FALSE;
3841 }
3842 #ifdef VQ_ENABLE
3843 else
3844 {
3845 _ptsp_res->_u32NULLFileFilterID = 15UL;
3846 }
3847 #endif
3848
3849 if (bRestoreRegState)
3850 {
3851 if((_ptsp_res->_phyTspFWDramBuf > 0) && (_ptsp_res->_u32TspFwDramBufSize > 0))
3852 {
3853 HAL_TSP_OrzWriteProtect_Enable(TRUE, _ptsp_res->_phyTspFWDramBuf, _ptsp_res->_u32TspFwDramBufSize);
3854 HAL_TSP_SecFlt_SetDataAddr(_ptsp_res->_phyTspFWDramBuf);
3855 }
3856 _TSP_RegStateRestore();
3857 }
3858
3859 return (TSP_Result)(_ptsp_res->_u32LastErr);
3860 }
3861
3862
3863 //-------------------------------------------------------------------------------------------------
3864 // Global Functions
3865 //-------------------------------------------------------------------------------------------------
3866
3867 //-------------------------------------------------------------------------------------------------
3868 /// Poweroff TSP driver and TSP engine
3869 /// @return TSP_Result
3870 /// @note
3871 //-------------------------------------------------------------------------------------------------
3872 TSP_Result MDrv_TSP_PowerOff(void)
3873 {
3874 _TSP_ENTRY();
3875 _TSP_Close();
3876 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_POWEROFF;
3877 // this is not a bug. Intend to lock to mutex to prevent alive task accessing TSP after power off
3878 return DRVTSP_OK;
3879 }
3880
3881 //-------------------------------------------------------------------------------------------------
3882 /// Relsase TSP indirect register read/write semaphone
3883 /// @return TSP_Result
3884 /// @note
3885 //-------------------------------------------------------------------------------------------------
3886 TSP_Result MDrv_TSP_HW_Lock_Release(void)
3887 {
3888 HAL_TSP_HW_Lock_Release();
3889
3890 return DRVTSP_OK;
3891 }
3892
3893 //-------------------------------------------------------------------------------------------------
3894 /// Close TSP driver and reset software/register state
3895 /// @return TSP_Result
3896 /// @note
3897 //-------------------------------------------------------------------------------------------------
3898 TSP_Result MDrv_TSP_Exit(void)
3899 {
3900 MS_U8 i;
3901
3902 _TSP_ENTRY();
3903
3904 //checking if stiil other process exist, only close sw thread
3905 if(_ptsp_res->_u32ProcessNum > 1)
3906 {
3907 _TSP_SW_Exit();
3908 _TSP_RETURN(DRVTSP_OK);
3909 }
3910
3911 for (i = 0; i < TSP_ENGINE_NUM; i++)
3912 {
3913 _ptsp_res->_TspState[i].TSPStatus = E_DRVTSP_SW_EXIT;
3914 }
3915
3916 if(HAL_TSP_Alive())
3917 {
3918 _TSP_SwStateReset(TRUE);
3919 }
3920 else
3921 {
3922 _TSP_SwStateReset(FALSE);
3923 }
3924 _TSP_RegStateReset();
3925 _TSP_Close();
3926
3927 // this is not a bug. Intend to lock to mutex to prevent alive task accessing TSP after power off
3928 return DRVTSP_OK;
3929 }
3930
3931 //-------------------------------------------------------------------------------------------------
3932 /// Suspend TSP driver
3933 /// @return TSP_Result
3934 /// @note
3935 /// Save TSP driver states to DRAM
3936 //-------------------------------------------------------------------------------------------------
3937 TSP_Result MDrv_TSP_Suspend(void)
3938 {
3939 MS_U16 u16Clk = 0;
3940
3941 if(!((_ptsp_res->_TspState[0].TSPStatus == E_DRVTSP_SW_INIT) || (_ptsp_res->_TspState[0].TSPStatus == E_DRVTSP_SW_RESUME)))
3942 return DRVTSP_FAIL;
3943
3944 MDrv_TSP_GetTSIFStatus(E_DRVTSP_IF_PLAYBACK, &(_ptsp_res->_ifset_save), &u16Clk);
3945
3946 _TSP_ENTRY();
3947
3948 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_SUSPEND;
3949 _ptsp_res->_bSuspend = TRUE;
3950 _TSP_RegStateStore();
3951 HAL_TSP_WbDmaEnable(FALSE);
3952 HAL_TSP_SetCtrlMode(0, 0, TSP_IF_NUM);
3953 _TSP_SW_Exit();
3954 HAL_TSP_HW_Lock_Release();
3955 if(_ptsp_res->_u32ProcessNum > 0)
3956 {
3957 _TSP_RETURN(DRVTSP_OK);
3958 }
3959 // this is not a bug. Intend to lock to mutex to prevent alive task accessing TSP after power off
3960 return DRVTSP_OK;
3961 }
3962
3963 //-------------------------------------------------------------------------------------------------
3964 /// Resume TSP driver
3965 /// @return TSP_Result
3966 /// @note
3967 /// Restore TSP driver states from DRAM
3968 //-------------------------------------------------------------------------------------------------
3969 TSP_Result MDrv_TSP_Resume(MS_PHY phyFWAddr, MS_U32 u32FWSize)
3970 {
3971 TSP_Result ret;
3972
3973 // Reset TSP register
3974 //HAL_ResetAll();
3975 //MsOS_DelayTask(5);
3976
3977 _ptsp_res->_bSuspend = FALSE;
3978 _ptsp_res->_TspState[0].TSPStatus = E_DRVTSP_SW_RESUME;
3979
3980 _ptsp_res->_phyFwAddr = phyFWAddr;
3981 _ptsp_res->_u32FwSize = u32FWSize;
3982
3983 if(_TSP_Init(FALSE, TRUE) != DRVTSP_OK)
3984 return DRVTSP_FAIL;
3985
3986 if(MDrv_TSP_SetOperateMode(0, E_DRVTSP_CTRL_MODE_TS0) != DRVTSP_OK)
3987 return DRVTSP_FAIL;
3988
3989 _TSP_ENTRY();
3990 ret = _TSP_SelPad(0, E_DRVTSP_IF_PLAYBACK, &(_ptsp_res->_ifset_save));
3991 _TSP_RETURN(ret);
3992 }
3993
3994 // Misc API
3995 //-------------------------------------------------------------------------------------------------
3996 /// Set TSP engine operating mode
3997 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
3998 /// @param eCtrlMode \b IN: TSP engine operating mode
3999 /// @return TSP_Result
4000 /// @note
4001 /// Only one engine can be set to use memory stream input mode, and all kinds
4002 /// of input are mutually exclusive for each engine.\n
4003 /// Only one engine can output to MAD. The TSP engine which is not selected to
4004 /// MAD can not filter any audio stream, it will block the stream.
4005 /// @sa MDrv_TSP_PidFlt_Alloc, MDrv_TSP_PidFlt_Enable, E_DRVTSP_FLT_TYPE_AUDIO
4006 //-------------------------------------------------------------------------------------------------
4007 TSP_Result MDrv_TSP_SetOperateMode(MS_U32 u32EngId, DrvTSP_CtrlMode eCtrlMode) // Set TSP internal operate
4008 {
4009 MS_U32 u32CaMode = 0,u32ii = 0;
4010 REG_PidFlt *pPidFilter = NULL;
4011
4012 PVRCA_DBG(ULOGD("TSP", "[%s][%d] eCtrlMode %ld\n", __FUNCTION__, __LINE__, (MS_U32)eCtrlMode));
4013
4014 _TSP_ENTRY();
4015
4016 if (u32EngId >= TSP_ENGINE_NUM)
4017 {
4018 _TSP_RETURN(DRVTSP_FAIL);
4019 }
4020
4021 // Since VQ enable, using single buffer for live, ping-pong buffer for file as deault path, becase file has no VQ
4022 // If no VQ, using ping-pong buffer for live, single buffer for file as default path.
4023 // when VQ enable, reserve filter 15 for NULL file section PID filter for switch live to single buffer
4024 //-----------------------------------------------------------------------------
4025 // For new VQ architecture with file VQ, not need to create dummy file filter for switch section buffer path
4026 #ifdef VQ_ENABLE
4027 if((_ptsp_res->_u32NULLFileFilterID == 0xFFFFFFFF) && _ptsp_res->_bLiveSING_FilePP)
4028 {
4029 HAL_TSP_DoubleBuf_En(DOUBLE_BUFFER_SWITCH);
4030
4031 _ptsp_res->_u32NULLFileFilterID = 15;
4032 pPidFilter = HAL_TSP_GetPidFltReg(0, _ptsp_res->_u32NULLFileFilterID);
4033 HAL_TSP_PidFlt_SetPid(pPidFilter, DRVTSP_PID_NULL);
4034 HAL_TSP_PidFlt_SelSecFlt(pPidFilter, _ptsp_res->_u32NULLFileFilterID);
4035 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_SECFLT | TSP_PIDFLT_OUT_SECFLT_AF);
4036 HAL_TSP_PidFlt_SelFltSource(pPidFilter, TSP_PIDFLT_IN_FILE);
4037 _ptsp_res->_TspState[u32EngId].FltMap[_ptsp_res->_u32NULLFileFilterID] = DRVTSP_MAP_NULL;
4038 _ptsp_res->_TspState[u32EngId].FltState[_ptsp_res->_u32NULLFileFilterID] = E_DRVTSP_FLT_STATE_ALLOC;
4039 _ptsp_res->_TspState[u32EngId].FltState[_ptsp_res->_u32NULLFileFilterID]|= E_DRVTSP_FLT_STATE_ENABLE;
4040 }
4041 #endif
4042
4043 //reset audio BD mode
4044 #ifndef NO_FILEIN
4045 HAL_TSP_AU_BD_Mode_Enable(FALSE);
4046 #endif
4047
4048 switch (eCtrlMode)
4049 {
4050 case E_DRVTSP_CTRL_MODE_TS0_AUD:
4051 //HAL_TSP_SelAudOut(u32EngId);
4052 case E_DRVTSP_CTRL_MODE_TS0:
4053 HAL_TSP_PS_Path_Disable();
4054 if(!_ptsp_res->_bLiveSING_FilePP)
4055 {
4056 HAL_TSP_DoubleBuf_Disable();
4057 }
4058 #ifndef NO_CA
4059
4060 u32CaMode = HAL_TSP_CSA_Get_ScrmPath();
4061 PVRCA_DBG(ULOGD("TSP", "[%s][%d] Org u32CaMode %lx\n", __FUNCTION__, __LINE__, u32CaMode));
4062 if((u32CaMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)) != (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)) //if TS1 dscmb, not change it...
4063 {
4064 if((u32CaMode & TSP_CA_OUTPUT_REC) == 0)
4065 {
4066 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF0_LIVEIN|TSP_CA_OUTPUT_PLAY_LIVE); //|TSP_CA_AVPAUSE);
4067 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode %lx\n", __FUNCTION__, __LINE__, u32CaMode));
4068 }
4069 }
4070
4071 if(_ptsp_res->TSPPvrcaParams._bCIPHSSMode)
4072 {
4073 HAL_TSP_TSIF1_Enable(FALSE);
4074 _TSP_Free_AllFLT1();
4075 HAL_TSP_LiveAB_En(FALSE);
4076 _ptsp_res->TSPPvrcaParams._bCIPHSSMode = FALSE;
4077 }
4078 #endif
4079
4080 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);
4081 break;
4082 case E_DRVTSP_CTRL_MODE_TS0_NOCA:
4083 HAL_TSP_PS_Path_Disable();
4084 if(!_ptsp_res->_bLiveSING_FilePP)
4085 {
4086 HAL_TSP_DoubleBuf_Disable();
4087 }
4088 u32CaMode = HAL_TSP_CSA_Get_ScrmPath();
4089 _TSP_FreeDupDscmbPidFlt(u32EngId, 0, u32CaMode);
4090 #ifdef TS2_LIVE_SUPPORT
4091 HAL_TSP_CSA_Set_ScrmPath(u32CaMode & ~(TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2|TSP_CA_OUTPUT_PLAY_LIVE));
4092 #else
4093 HAL_TSP_CSA_Set_ScrmPath(u32CaMode & ~(TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE));
4094 #endif
4095 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 0);
4096 break;
4097
4098 #ifndef NO_PVR
4099 case E_DRVTSP_CTRL_MODE_TS1_OUT_LIVE0:
4100 _ptsp_res->_u32OrgCAMode = HAL_TSP_CSA_Get_ScrmPath(); //record CACtrl before switch CA input from TSIF1
4101 //Free duplicate FLT2
4102 #ifdef TS2_LIVE_SUPPORT
4103 if((_ptsp_res->_u32OrgCAMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_PLAY_LIVE2))
4104 == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2))
4105 {
4106 _TSP_FreeDupDscmbPidFlt(u32EngId, 2, _ptsp_res->_u32OrgCAMode);
4107 HAL_TSP_CSA_Set_ScrmPath(_ptsp_res->_u32OrgCAMode & ~TSP_CA_OUTPUT_PLAY_LIVE2);
4108 }
4109 #endif
4110
4111 //duplicateFLT 0 to FLT1
4112 if((_ptsp_res->_u32OrgCAMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)) != (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE))
4113 {
4114 for(u32ii = DSCMB_FLT_START_ID; u32ii <= DSCMB_FLT_END_ID; u32ii++)
4115 {
4116 _TSP_DupDscmbPidFlt(u32EngId, u32ii, TSP_SECFLT_NUM+u32ii-DSCMB_FLT_START_ID);
4117 }
4118 #ifdef EXT_PVR1_FLT
4119 for(u32ii = DSCMB_FLT_SHAREKEY_START_ID; u32ii <= DSCMB_FLT_SHAREKEY_END_ID; u32ii++)
4120 {
4121 _TSP_DupDscmbPidFlt(u32EngId, u32ii, TSP_SECFLT_NUM+DSCMB_FLT_NUM+u32ii);
4122 }
4123 #endif
4124 }
4125 if(_ptsp_res->_u32OrgCAMode & TSP_CA_INPUT_TSIF1)
4126 {
4127 HAL_TSP_CSA_Set_ScrmPath(_ptsp_res->_u32OrgCAMode|TSP_CA_OUTPUT_PLAY_LIVE);
4128 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%lx\n", __FUNCTION__, __LINE__, _ptsp_res->_u32OrgCAMode|TSP_CA_OUTPUT_PLAY_LIVE));
4129 }
4130 else
4131 {
4132 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE);
4133 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%x\n", __FUNCTION__, __LINE__, TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE));
4134 }
4135 case E_DRVTSP_CTRL_MODE_TS1_AUD:
4136 //HAL_TSP_SelAudOut(u32EngId);
4137 case E_DRVTSP_CTRL_MODE_TS1:
4138 case E_DRVTSP_CTRL_MODE_TS1_FILEFLT:
4139 if(eCtrlMode == E_DRVTSP_CTRL_MODE_TS1_FILEFLT)
4140 {
4141 HAL_TSP_LiveAB_En(TRUE);
4142 HAL_TSP_TSIF1_Enable(TRUE);
4143
4144 #ifndef NO_CA
4145 _ptsp_res->TSPPvrcaParams._bCIPHSSMode = TRUE;
4146 _TSP_FLT1_Duplicate_FLT0(0);
4147 _ptsp_res->_u32OrgCAMode = HAL_TSP_CSA_Get_ScrmPath(); //record CACtrl before switch CA input from TSIF1
4148 if(_ptsp_res->TSPPvrcaParams._bPVRCA_Start == TRUE)
4149 {
4150
4151 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_FILE|TSP_CA_OUTPUT_REC);
4152 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%x\n", __FUNCTION__, __LINE__, TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_FILE|TSP_CA_OUTPUT_REC));
4153 _TSP_RETURN(DRVTSP_FAIL);
4154 }
4155 else
4156 {
4157 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_FILE);
4158 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%x\n", __FUNCTION__, __LINE__, TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_FILE));
4159 }
4160 #endif
4161
4162 }
4163 HAL_TSP_PS_Path_Disable();
4164 if(!_ptsp_res->_bLiveSING_FilePP)
4165 {
4166 HAL_TSP_DoubleBuf_Disable();
4167 }
4168 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 1);
4169 break;
4170 #endif
4171
4172 #ifndef NO_FILEIN
4173 case E_DRVTSP_CTRL_MODE_MEM_AUD:
4174 //HAL_TSP_SelAudOut(u32EngId);
4175 case E_DRVTSP_CTRL_MODE_MEM_PVR:
4176 case E_DRVTSP_CTRL_MODE_MEM:
4177 case E_DRVTSP_CTRL_MODE_MEM_NOCA:
4178 HAL_TSP_LiveAB_En(FALSE);
4179 HAL_TSP_PS_Path_Disable();
4180
4181 #ifndef FIVQ_ENABLE
4182 if(!_ptsp_res->_bLiveSING_FilePP)
4183 {
4184 HAL_TSP_DoubleBuf_En(DOUBLE_BUFFER_SWITCH); // [OBERON]:Enable double buffer, set filein->pinpon livein->single
4185 }
4186 #endif
4187
4188 #ifndef NO_CA
4189
4190 _ptsp_res->_u32OrgCAMode = HAL_TSP_CSA_Get_ScrmPath(); //record CACtrl before switch CA input from File0
4191 if(eCtrlMode == E_DRVTSP_CTRL_MODE_MEM_PVR)
4192 {
4193 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF0_FILEIN|TSP_CA_OUTPUT_PLAY_FILE|TSP_CA_OUTPUT_REC|TSP_CA_AVPAUSE);
4194 }
4195 else if ((eCtrlMode == E_DRVTSP_CTRL_MODE_MEM) && ((_ptsp_res->_u32OrgCAMode & TSP_CA_OUTPUT_REC) == 0))
4196 {
4197 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF0_FILEIN|TSP_CA_OUTPUT_PLAY_FILE|TSP_CA_AVPAUSE);
4198 }
4199 else
4200 {
4201 //ts2 record ts0, free live0 duplicate
4202 if(((_ptsp_res->_u32OrgCAMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)) &&
4203 ((_ptsp_res->_u32OrgCAMode & TSP_CA_OUTPUT_REC) == 0))
4204 {
4205 _TSP_FreeDupDscmbPidFlt(u32EngId, 0, _ptsp_res->_u32OrgCAMode);
4206 }
4207 #ifdef TS2_LIVE_SUPPORT
4208 if((_ptsp_res->_u32OrgCAMode & TSP_CA_INPUT_TSIF1) &&
4209 ((_ptsp_res->_u32OrgCAMode & (TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_PLAY_LIVE2|TSP_CA_OUTPUT_REC)) == 0))
4210 #else
4211 if((_ptsp_res->_u32OrgCAMode & TSP_CA_INPUT_TSIF1) &&
4212 ((_ptsp_res->_u32OrgCAMode & (TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_REC)) == 0))
4213 #endif
4214 {
4215 HAL_TSP_CSA_Set_ScrmPath(_ptsp_res->_u32OrgCAMode & ~TSP_CA_INPUT_TSIF1);
4216 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%lx\n", __FUNCTION__, __LINE__, _ptsp_res->_u32OrgCAMode & ~TSP_CA_INPUT_TSIF1));
4217 }
4218 else
4219 {
4220 HAL_TSP_CSA_Set_ScrmPath(_ptsp_res->_u32OrgCAMode & ~TSP_CA_OUTPUT_PLAY_LIVE);
4221 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%lx\n", __FUNCTION__, __LINE__, _ptsp_res->_u32OrgCAMode & ~TSP_CA_OUTPUT_PLAY_LIVE));
4222 }
4223 }
4224 PVRCA_DBG(ULOGD("TSP", "[%s][%d] _ptsp_res->_u32OrgCAMode 0x%lx\n", __FUNCTION__, __LINE__, _ptsp_res->_u32OrgCAMode));
4225
4226 #endif
4227 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST| TSP_CTRL_TSFILE_EN, TSP_IF_NUM);
4228 break;
4229 #endif //udef NO_FILEIN
4230
4231 case E_DRVTSP_CTRL_MODE_VID:
4232 #ifndef NO_CA
4233 HAL_TSP_CSA_Set_ScrmPath(0);
4234 #endif
4235 if(!_ptsp_res->_bLiveSING_FilePP)
4236 {
4237 HAL_TSP_DoubleBuf_Disable();
4238 }
4239 break;
4240
4241 #ifndef NO_PVR
4242 case E_DRVTSP_CTRL_MODE_PVR_TS0:
4243 break;
4244 #ifndef NO_CA
4245 case E_DRVTSP_CTRL_MODE_PVR_TS0_CA:
4246 _ptsp_res->_u32OrgCAMode = HAL_TSP_CSA_Get_ScrmPath(); //record CACtrl before set CA ouput from Rec0
4247 HAL_TSP_CSA_Set_ScrmPath(HAL_TSP_CSA_Get_ScrmPath() | TSP_CA_OUTPUT_REC);
4248 break;
4249 case E_DRVTSP_CTRL_MODE_PVR_CA:
4250 //switch CA form TS0 to TS1
4251 HAL_TSP_TSIF1_Enable(TRUE);
4252 _TSP_FLT1_Duplicate_FLT0(0);
4253 _ptsp_res->_u32OrgCAMode = HAL_TSP_CSA_Get_ScrmPath(); //record CACtrl before set CA input from TSIF1
4254 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_REC/*|TSP_CA_AVPAUSE*/);
4255 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%x\n", __FUNCTION__, __LINE__, TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_REC));
4256
4257 break;
4258
4259 #endif //udef NO_CA
4260 #endif //udef NO_PVR
4261
4262 #ifdef TS2_LIVE_SUPPORT
4263 case E_DRVTSP_CTRL_MODE_PVR_TS2_CA:
4264 _ptsp_res->_u32OrgCAMode = HAL_TSP_CSA_Get_ScrmPath(); //record CACtrl before set CA input from TSIF1
4265 if(((_ptsp_res->_u32OrgCAMode & TSP_CA_INPUT_TSIF1) != 0) &&
4266 ((_ptsp_res->_u32OrgCAMode & TSP_CA_OUTPUT_REC) != 0))
4267 {
4268 HAL_TSP_CSA_Set_ScrmPath(_ptsp_res->_u32OrgCAMode|TSP_CA_OUTPUT_PLAY_LIVE2);
4269 break;
4270 }
4271 //Free duplicate FLT0
4272 #if 0
4273 if(_TSP_FreeDupDscmbPidFlt(u32EngId, 0, _ptsp_res->_u32OrgCAMode))
4274 {
4275 HAL_TSP_CSA_Set_ScrmPath(_ptsp_res->_u32OrgCAMode & ~TSP_CA_OUTPUT_PLAY_LIVE);
4276 }
4277 #endif
4278 //duplicateFLT 2 to FLT1
4279 if((_ptsp_res->_u32OrgCAMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_PLAY_LIVE2))
4280 != (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2))
4281 {
4282 for(u32ii = (TSP_SECFLT_NUM + TSP_PIDFLT1_NUM); u32ii < (TSP_SECFLT_NUM + TSP_PIDFLT1_NUM + DSCMB_FLT_NUM); u32ii++)
4283 {
4284 _TSP_DupDscmbPidFlt(u32EngId, u32ii, u32ii-TSP_PIDFLT1_NUM);
4285 }
4286 HAL_TSP_TSIF1_Enable(TRUE);
4287 if((_ptsp_res->_u32OrgCAMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE))
4288 {
4289 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_PLAY_LIVE2);
4290 }
4291 else
4292 {
4293 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2);
4294 }
4295 }
4296
4297 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%lx\n", __FUNCTION__, __LINE__, _ptsp_res->_u32OrgCAMode));
4298 break;
4299
4300 case E_DRVTSP_CTRL_MODE_TS2_AUD:
4301 HAL_TSP_SelAudOut(u32EngId);
4302 case E_DRVTSP_CTRL_MODE_TS2:
4303 HAL_TSP_PS_Path_Disable();
4304 if(!_ptsp_res->_bLiveSING_FilePP)
4305 {
4306 HAL_TSP_DoubleBuf_Disable();
4307 }
4308 #if 0
4309 u32CaMode = HAL_TSP_CSA_Get_ScrmPath();
4310 if((u32CaMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2|TSP_CA_OUTPUT_PLAY_LIVE)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2))
4311 {
4312 _TSP_FreeDupDscmbPidFlt(u32EngId, 2, _ptsp_res->_u32OrgCAMode);
4313 HAL_TSP_CSA_Set_ScrmPath(_ptsp_res->_u32OrgCAMode & ~TSP_CA_OUTPUT_PLAY_LIVE2);
4314 }
4315 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%lx\n", __FUNCTION__, __LINE__, _ptsp_res->_u32OrgCAMode & ~TSP_CA_OUTPUT_PLAY_LIVE2));
4316 #endif
4317 HAL_TSP_SetCtrlMode(u32EngId, TSP_CTRL_CPU_EN | TSP_CTRL_SW_RST, 2);
4318 break;
4319
4320 #ifdef TS2_LIVE_SUPPORT
4321 case E_DRVTSP_CTRL_MODE_PVR1_CA:
4322 //switch CA to TS1
4323 HAL_TSP_CMD_Run(HAL_CMD_CHK_TSIF2_DSCMB_EN, 0, 0, &u32CaMode);
4324 if(u32CaMode != 0)
4325 {
4326 _ptsp_res->_u32OrgCAMode = HAL_TSP_CSA_Get_ScrmPath(); //record CACtrl before set CA input from TSIF2
4327 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF2_EN|TSP_CA_OUTPUT_PLAY_LIVE2);
4328 PVRCA_DBG(ULOGD("TSP", "[%s][%d] u32CaMode 0x%x\n", __FUNCTION__, __LINE__, TSP_CA_INPUT_TSIF2_EN|TSP_CA_OUTPUT_PLAY_LIVE2));
4329 }
4330 break;
4331 #endif
4332 #endif
4333 default:
4334 _TSP_RETURN(DRVTSP_FAIL);
4335 }
4336
4337 _TSP_RETURN(DRVTSP_OK);
4338 }
4339
4340
4341 //-------------------------------------------------------------------------------------------------
4342 /// Select ChipTop PAD for ts0 and ts1
4343 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4344 /// @param eIf \b IN: TSP TS interface
4345 /// @param pIfSet \b IN: TS interface setting
4346 /// @return TSP_Result
4347 /// @note
4348 /// Uranus: only can select pad0/pad1 to ts0
4349 /// Oberon: can select pad0/pad1 to ts0, pad0/pad1 to ts1.
4350 /// Default setting was pad0->ts0, pad1->ts1.
4351 //-------------------------------------------------------------------------------------------------
4352 TSP_Result MDrv_TSP_SelPad(MS_U32 u32EngId, DrvTSP_If eIf, DrvTSP_If_Set* pIfSet)
4353 {
4354 TSP_Result bRet;
4355 _TSP_ENTRY();
4356 bRet = _TSP_SelPad(u32EngId, eIf, pIfSet);
4357 _TSP_RETURN(bRet);
4358 }
4359
4360 //-------------------------------------------------------------------------------------------------
4361 // Inverting bit order of TS parallel input
4362 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4363 // @param eIf \b IN: TSP TS interface
4364 // @param bInvert \b IN: bit order invert [1:invert 0:not invert]
4365 // @return TSP_Result
4366 // @note
4367 //-------------------------------------------------------------------------------------------------
4368 TSP_Result MDrv_TSP_Parl_BitOrderSwap(MS_U32 u32EngId, DrvTSP_If eIf, MS_BOOL bInvert)
4369 {
4370 MS_U32 u32Flow = 0;
4371 _TSP_ENTRY();
4372 if (u32EngId>= TSP_ENGINE_NUM)
4373 {
4374 _TSP_RETURN(DRVTSP_FAIL);
4375 }
4376 switch (eIf)
4377 {
4378 case E_DRVTSP_IF_PLAYBACK:
4379 u32Flow = 0;
4380 break;
4381
4382 #ifndef NO_PVR
4383 case E_DRVTSP_IF_PVR0:
4384 u32Flow = 1;
4385 break;
4386 #endif
4387
4388 #ifdef TS2_IF_SUPPORT
4389 case E_DRVTSP_IF_PVR1:
4390 u32Flow = 2;
4391 break;
4392 #endif
4393 default:
4394 MS_ASSERT(0);
4395 _TSP_RETURN(DRVTSP_FAIL);
4396 }
4397 HAL_TSP_Parl_BitOrderSwap(u32EngId, u32Flow, bInvert);
4398 _TSP_RETURN(DRVTSP_OK);
4399 }
4400
4401 //-------------------------------------------------------------------------------------------------
4402 /// Reset audio/video fifo or not
4403 /// @return TSP_Result
4404 /// @note
4405 //-------------------------------------------------------------------------------------------------
4406 TSP_Result MDrv_TSP_AVFifo_Reset(DrvTSP_FltType eFilterType, MS_BOOL bFlush)
4407 {
4408 _TSP_ENTRY();
4409 switch (eFilterType)
4410 {
4411 case E_DRVTSP_FLT_TYPE_VIDEO:
4412 HAL_TSP_Flush_AV_FIFO(0, bFlush);
4413 break;
4414 case E_DRVTSP_FLT_TYPE_AUDIO:
4415 HAL_TSP_Flush_AV_FIFO(1, bFlush);
4416 break;
4417 case E_DRVTSP_FLT_TYPE_AUDIO2:
4418 HAL_TSP_Flush_AV_FIFO(2, bFlush);
4419 break;
4420 case E_DRVTSP_FLT_TYPE_VIDEO3D:
4421 HAL_TSP_Flush_AV_FIFO(3, bFlush);
4422 break;
4423 default:
4424 _TSP_RETURN(DRVTSP_FAIL);
4425 }
4426 _TSP_RETURN(DRVTSP_OK);
4427 }
4428
4429 TSP_Result MDrv_TSP_AVFifo_Status(DrvTSP_FltType eFilterType, MS_U32 *u32FifoLevel)
4430 {
4431 *u32FifoLevel = -1;
4432
4433 _TSP_ENTRY();
4434 switch (eFilterType)
4435 {
4436 case E_DRVTSP_FLT_TYPE_VIDEO:
4437 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(0);
4438 break;
4439 case E_DRVTSP_FLT_TYPE_AUDIO:
4440 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(1);
4441 break;
4442 case E_DRVTSP_FLT_TYPE_AUDIO2:
4443 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(2);
4444 break;
4445 case E_DRVTSP_FLT_TYPE_VIDEO3D:
4446 *u32FifoLevel = HAL_TSP_Get_AVFifoLevel(3);
4447 break;
4448 default:
4449 _TSP_RETURN(DRVTSP_FAIL);
4450 }
4451 _TSP_RETURN(DRVTSP_OK);
4452 }
4453
4454 //-------------------------------------------------------------------------------------------------
4455 /// Get Last General Error Return Code
4456 /// @return TSP_Result
4457 /// @note
4458 /// Last error return code is reset after calling this function.
4459 //-------------------------------------------------------------------------------------------------
4460 TSP_Result MDrv_TSP_GetLastErr(void)
4461 {
4462 TSP_Result ret;
4463 ret = (TSP_Result)(_ptsp_res->_u32LastErr);
4464 _ptsp_res->_u32LastErr = DRVTSP_OK;
4465 return ret;
4466 }
4467
4468 //-------------------------------------------------------------------------------------------------
4469 /// Get TSP Flt states
4470 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4471 /// @param u32FltId \b IN: index of Pid Filter [ 0 .. (@ref TSP_PIDFLT_NUM_ALL-1) ]
4472 /// @param peState \b OUT: Flter status
4473 /// @return TSP_Result
4474 /// @note
4475 //-------------------------------------------------------------------------------------------------
4476 TSP_Result MDrv_TSP_Flt_GetState(MS_U32 u32EngId, MS_U32 u32FltId, DrvTSP_FltState *peState)
4477 {
4478 _TSP_ENTRY();
4479 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32FltId, TSP_DBG("[TSP_ERROR][%06d] Bad FltId %d\n", __LINE__, (unsigned int)u32FltId));
4480 if (_TSP_Flt_StateGet(0, u32FltId, peState))
4481 {
4482 _TSP_RETURN(DRVTSP_OK);
4483 }
4484 else
4485 {
4486 _TSP_RETURN(DRVTSP_FAIL);
4487 }
4488 }
4489
4490 //-------------------------------------------------------------------------------------------------
4491 /// Set TS Interface packet mode
4492 /// @param u32TSIf \b IN: TSIF
4493 /// @param eDrvPktMode \b IN: Packet mode
4494 /// @return TSP_Result
4495 /// @note
4496 //-------------------------------------------------------------------------------------------------
4497 TSP_Result MDrv_TSP_SetPacketMode(MS_U32 u32TSIf, DrvTSP_PacketMode eDrvPktMode)
4498 {
4499 _TSP_ENTRY();
4500 HAL_TSP_SetPacketMode(u32TSIf, (MS_U32)eDrvPktMode);
4501 _TSP_RETURN(DRVTSP_OK);
4502 }
4503
4504 //-------------------------------------------------------------------------------------------------
4505 /// Set Sync Byte value to Stream source ID or TS source ID
4506 /// @param u32SrcID \b IN: Index of stream source id or TS source id
4507 /// Stream source ID is from 0 ~7
4508 /// TS source ID is mapping TSIF index
4509 /// @param u8SyncByte \b IN: Sync byte, defalut value is 0x47
4510 ///
4511 /// @return TSP_Result
4512 /// @note
4513 //-------------------------------------------------------------------------------------------------
4514 TSP_Result MDrv_TSP_SetMergeStrSyncByte(MS_U32 u32SrcID, MS_U8 u8SyncByte)
4515 {
4516 _TSP_ENTRY();
4517 HAL_TSP_SetMergeStrSyncByte(u32SrcID, u8SyncByte);
4518 _TSP_RETURN(DRVTSP_OK);
4519 }
4520
4521 //-------------------------------------------------------------------------------------------------
4522 /// Enable remove duplicate A/V packets
4523 /// @param bEnable \b IN: Enable or Disable
4524 /// @return TSP_Result
4525 /// @note
4526 //-------------------------------------------------------------------------------------------------
4527 TSP_Result MDrv_TSP_RemoveDupAVPkt(MS_BOOL bEnable)
4528 {
4529 _TSP_ENTRY();
4530 HAL_TSP_RemoveDupAVPkt(bEnable);
4531 _TSP_RETURN(DRVTSP_OK);
4532 }
4533
4534 //-------------------------------------------------------------------------------------------------
4535 /// Enable remove duplicate A/V packets
4536 /// @param flttype \b IN: FIFO type
4537 /// @param bEnable \b IN: Enable or Disable
4538 /// @return TSP_Result
4539 /// @note
4540 //-------------------------------------------------------------------------------------------------
4541 TSP_Result MDrv_TSP_RemoveDupAVFifoPkt(DrvTSP_FltType flttype, MS_BOOL bEnable)
4542 {
4543 MS_U32 u32FifoIdx = 0;
4544
4545 _TSP_ENTRY();
4546
4547 if(flttype == E_DRVTSP_FLT_TYPE_VIDEO)
4548 {
4549 u32FifoIdx = 0;
4550 }
4551 else if(flttype == E_DRVTSP_FLT_TYPE_AUDIO)
4552 {
4553 u32FifoIdx = 1;
4554 }
4555 else if(flttype == E_DRVTSP_FLT_TYPE_AUDIO2)
4556 {
4557 u32FifoIdx = 2;
4558 }
4559 else if(flttype == E_DRVTSP_FLT_TYPE_VIDEO3D)
4560 {
4561 u32FifoIdx = 3;
4562 }
4563 else
4564 {
4565 _TSP_RETURN(DRVTSP_INVALID_PARAM);
4566 }
4567
4568 HAL_TSP_RemoveDupAVFifoPkt(u32FifoIdx, bEnable);
4569
4570 _TSP_RETURN(DRVTSP_OK);
4571 }
4572
4573 #ifdef STC64_SUPPORT
4574 //-------------------------------------------------------------------------------------------------
4575 /// Enable or Disable STC64 bit mode. Defalut is STC33 mode.
4576 /// @param bEnable \b IN: STC64 system time mode enable
4577 /// @return TSP_Result
4578 /// @note
4579 //-------------------------------------------------------------------------------------------------
4580 TSP_Result MDrv_TSP_STC64_Mode_Enable(MS_BOOL bEnable)
4581 {
4582 _TSP_ENTRY();
4583 HAL_TSP_STC64_Mode_En(bEnable);
4584 _TSP_RETURN(DRVTSP_OK);
4585 }
4586 #endif //STC64_SUPPORT
4587
4588 //-------------------------------------------------------------------------------------------------
4589 /// STC Clock Rate Adjust (27MHz clock)
4590 /// @param u32EngId \b IN: STC engine ID
4591 /// @param u32Percentage \b IN: The percentage of STC clock ratio
4592 /// @return TSP_Result
4593 /// @note
4594 /// StcClk = (InClk * (Stc_CW / (2^27))) / 3.2
4595 //-------------------------------------------------------------------------------------------------
4596 TSP_Result MDrv_TSP_STCClk_Adjust(MS_U32 u32EngId, MS_BOOL bUpClk, MS_U32 u32Percentage)
4597 {
4598 MS_U32 u32CW_New = 0;
4599
4600 _TSP_ENTRY();
4601
4602 if(bUpClk)
4603 {
4604 u32CW_New = (((STC_SYNTH_DEFAULT >> 16) * 100) / u32Percentage) << 16;
4605 u32CW_New += (((STC_SYNTH_DEFAULT & 0xFFFF) * 100) / u32Percentage);
4606 }
4607 else
4608 {
4609 u32CW_New = (((STC_SYNTH_DEFAULT >> 16) * u32Percentage) / 100) << 16;
4610 u32CW_New += (((STC_SYNTH_DEFAULT & 0xFFFF) * u32Percentage) / 100);
4611 }
4612
4613 HAL_TSP_Stc_ctrl(u32EngId, u32CW_New);
4614
4615 _TSP_RETURN(DRVTSP_OK);
4616 }
4617
4618 // Hidden interface. For Mstar use only
4619 //-------------------------------------------------------------------------------------------------
4620 // Set/Get TSP filter information
4621 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4622 // @param pu32StartFlt \b IN/OUT: starting filter id which is availabe
4623 // @param pu32EndFlt \b IN/OUT: starting filter id which is availabe
4624 // @param bSet \b IN: TRUE set, and FALSE for get
4625 // @return TSP_Result
4626 // @note
4627 //-------------------------------------------------------------------------------------------------
4628 TSP_Result MDrv_TSP_Flt_SetOwner(MS_U32 u32EngId, MS_U32 u32FltIdStart, MS_U32 u32FltIdEnd, MS_BOOL bOwner)
4629 {
4630 MS_U32 i = 0, u32PidFltId = 0;
4631 REG_SecFlt *pSecFilter = NULL;
4632
4633 _TSP_ENTRY();
4634 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32FltIdStart, TSP_DBG("[TSP_ERROR][%06d] Bad FltIdStart\n", __LINE__));
4635 TSP_ASSERT2(TSP_SECFLT_NUM_All > u32FltIdEnd, TSP_DBG("[TSP_ERROR][%06d] Bad FltIdEnd\n", __LINE__));
4636 TSP_ASSERT2(u32FltIdEnd >= u32FltIdStart, TSP_DBG("[TSP_ERROR][%06d] u32FltIdEnd < u32FltIdStart\n", __LINE__));
4637
4638 for (i = u32FltIdStart; i <= u32FltIdEnd; i++)
4639 {
4640 u32PidFltId = i;
4641 #ifdef TS2_LIVE_SUPPORT
4642 if(i >= TSP_SECFLT_NUM)
4643 {
4644 u32PidFltId += TSP_PIDFLT1_NUM;
4645 }
4646 #endif
4647
4648 if ((_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] != E_DRVTSP_FLT_STATE_FREE) &&
4649 (_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] != E_DRVTSP_FLT_STATE_NA))
4650 {
4651 MS_ASSERT(0);
4652 }
4653 if ((_ptsp_res->_TspState[u32EngId].SecFltState[i] != E_DRVTSP_FLT_STATE_FREE) &&
4654 (_ptsp_res->_TspState[u32EngId].SecFltState[i] != E_DRVTSP_FLT_STATE_NA))
4655 {
4656 MS_ASSERT(0);
4657 }
4658 if ((_ptsp_res->_TspState[u32EngId].SecBufState[i] != E_DRVTSP_FLT_STATE_FREE) &&
4659 (_ptsp_res->_TspState[u32EngId].SecBufState[i] != E_DRVTSP_FLT_STATE_NA))
4660 {
4661 MS_ASSERT(0);
4662 }
4663
4664 pSecFilter = _TSP_GET_SECFLT_REG(i);
4665 if (bOwner)
4666 {
4667 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] = E_DRVTSP_FLT_STATE_FREE;
4668 _ptsp_res->_TspState[u32EngId].SecFltState[i] = E_DRVTSP_FLT_STATE_FREE;
4669 _ptsp_res->_TspState[u32EngId].SecBufState[i] = E_DRVTSP_FLT_STATE_FREE;
4670 HAL_TSP_SetOwner(pSecFilter, TRUE);
4671 }
4672 else
4673 {
4674 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] = E_DRVTSP_FLT_STATE_NA;
4675 _ptsp_res->_TspState[u32EngId].SecFltState[i] = E_DRVTSP_FLT_STATE_NA;
4676 _ptsp_res->_TspState[u32EngId].SecBufState[i] = E_DRVTSP_FLT_STATE_NA;
4677 HAL_TSP_SetOwner(pSecFilter, FALSE);
4678 }
4679
4680 }
4681 _TSP_RETURN(DRVTSP_OK);
4682 }
4683
4684
4685 //-------------------------------------------------------------------------------------------------
4686 // Ask TSP to process section/pvr data for Non-OS driver. Calling this function in OS environment causes nothing
4687 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4688 // @param u32FltId \b IN: Which filter id to process. 0xFFFFFFFF means process all filters (DMXID)
4689 // @param u32Timeout \b IN: Max time for TSP to process
4690 // @return TSP_Result
4691 // @note
4692 //-------------------------------------------------------------------------------------------------
4693 TSP_Result MDrv_TSP_Proc(MS_U32 u32EngId, MS_U32 u32FltId, TSP_Result* pRet, DrvTSP_Event* pEvt) // for non-OS TSP scheduling
4694 {
4695 OSAL_TSP_ProcTypeParam Data;
4696 _TSP_ENTRY();
4697 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL > u32FltId, TSP_DBG("[TSP_ERROR][%06d] Bad FltId %d\n", __LINE__, (unsigned int)u32FltId));
4698 if (_ptsp_res->_TspState[u32EngId].FltState[u32FltId] == E_DRVTSP_FLT_STATE_NA)
4699 {
4700 _TSP_RETURN(DRVTSP_FAIL);
4701 }
4702 Data.u32FltId = u32FltId;
4703 Data.pRet = (void*)pRet;
4704 Data.bInfiniteWait = FALSE;
4705 Data.bFromTask = FALSE;
4706
4707 _TSP_IND_UNLOCK();
4708 OSAL_TSP_Proc(_TSP_Isr_ProcPoll, &Data, (MS_U32*)pEvt);
4709 _TSP_IND_LOCK();
4710
4711 _TSP_RETURN(DRVTSP_OK);
4712 }
4713
4714
4715 //-------------------------------------------------------------------------------------------------
4716 /// Get current system time clock (STC) of TSP
4717 /// @param u32EngId \b IN: index of STC engine
4718 /// @param pu32STC_32 \b OUT: pointer of STC[32] return
4719 /// @param pu32STC \b OUT: pointer of STC[31:0] return
4720 /// @return TSP_Result
4721 //-------------------------------------------------------------------------------------------------
4722 TSP_Result MDrv_TSP_GetSTC(MS_U32 u32EngId, MS_U32 *pu32STC_32, MS_U32 *pu32STC)
4723 {
4724 _TSP_ENTRY();
4725
4726 //TSP_ASSERT2(TSP_ENGINE_NUM > u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad EngId %ld\n", __LINE__, u32EngId));
4727 TSP_ASSERT2(NULL != pu32STC_32, TSP_DBG("[TSP_ERROR][%06d] Null pointer: pu32STC_32\n", __LINE__));
4728 TSP_ASSERT2(NULL != pu32STC, TSP_DBG("[TSP_ERROR][%06d] Null pointer: pu32STC\n", __LINE__));
4729
4730 HAL_TSP_STC_Update_Disable(u32EngId, TRUE);
4731 *pu32STC = HAL_TSP_GetSTC(u32EngId);
4732 *pu32STC_32 = HAL_TSP_GetSTC_32(u32EngId);
4733 HAL_TSP_STC_Update_Disable(u32EngId, FALSE);
4734
4735 _TSP_RETURN(DRVTSP_OK);
4736 }
4737
4738
4739
4740 //-------------------------------------------------------------------------------------------------
4741 /// Set STC control
4742 /// @param u8Eng \b IN: STC Engine ID
4743 /// @param u8Opt \b IN: STC update control options
4744 /// 0x00 -> Update STC by TSP FW
4745 /// 0x01 -> Update STC by HK
4746 /// 0x02 -> Update STC Once when PCR reset
4747 /// @return TSP_Result
4748 //-------------------------------------------------------------------------------------------------
4749 TSP_Result MDrv_TSP_STC_UpdateCtrl(MS_U8 u8Eng, MS_U8 u8Opt)
4750 {
4751 _TSP_ENTRY();
4752 if (HAL_TSP_STC_UpdateCtrl(u8Eng, u8Opt))
4753 {
4754 _TSP_RETURN(DRVTSP_OK);
4755 }
4756 else
4757 {
4758 _TSP_RETURN(DRVTSP_FAIL);
4759 }
4760 }
4761
4762 //-------------------------------------------------------------------------------------------------
4763 /// Get PRC of TSP
4764 /// @param u32EngId \b IN: index of STC engine
4765 /// @param pu32Pcr_32 \b OUT: pointer of STC[32] return
4766 /// @param pu32Pcr \b OUT: pointer of STC[31:0] return
4767 /// @return TSP_Result
4768 //-------------------------------------------------------------------------------------------------
4769 TSP_Result MDrv_TSP_GetPCR(MS_U32 u32EngId, MS_U32 *pu32Pcr_32, MS_U32 *pu32Pcr)
4770 {
4771 _TSP_ENTRY();
4772
4773 //TSP_ASSERT2(TSP_ENGINE_NUM > u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad EngId %ld\n", __LINE__, u32EngId));
4774 TSP_ASSERT2(NULL != pu32Pcr_32, TSP_DBG("[TSP_ERROR][%06d] Null pointer: pu32Pcr_32\n", __LINE__));
4775 TSP_ASSERT2(NULL != pu32Pcr, TSP_DBG("[TSP_ERROR][%06d] Null pointer: pu32Pcr\n", __LINE__));
4776
4777 if (HAL_TSP_GetPcr(u32EngId, pu32Pcr_32, pu32Pcr))
4778 {
4779 _TSP_RETURN(DRVTSP_OK);
4780 }
4781 _TSP_RETURN(DRVTSP_FAIL);
4782 }
4783
4784
4785 // PIDFlt API
4786 //-------------------------------------------------------------------------------------------------
4787 /// Allocate a PID filter of a TSP unit
4788 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4789 /// @param eFilterType \b IN: type of PID filter to be allocated
4790 /// @param pu32PidFltId \b OUT: pointer of PID filter id return
4791 /// @return TSP_Result
4792 /// @note
4793 /// These filter types have to select a section filter\n
4794 /// @ref E_DRVTSP_FLT_TYPE_SECTION\n
4795 /// @ref E_DRVTSP_FLT_TYPE_PCR\n
4796 /// @ref E_DRVTSP_FLT_TYPE_PES\n
4797 /// @note
4798 /// These filter types also have to setup section buffer for data output\n
4799 /// @ref E_DRVTSP_FLT_TYPE_SECTION\n
4800 /// @ref E_DRVTSP_FLT_TYPE_PES\n
4801 /// @sa MDrv_TSP_PidFlt_SelSecFlt, MDrv_TSP_SecFlt_SetBuffer
4802 //-------------------------------------------------------------------------------------------------
4803 TSP_Result MDrv_TSP_PidFlt_Alloc(MS_U32 u32EngId, DrvTSP_FltType eFilterType, MS_U32 *pu32PidFltId)
4804 {
4805
4806 #ifndef MSOS_TYPE_LINUX_KERNEL
4807 if(MDrv_SYS_Query(E_SYS_QUERY_DTV_SUPPORTED) == FALSE)
4808 {
4809 if((eFilterType & E_DRVTSP_FLT_SOURCE_TYPE_MASK) == E_DRVTSP_FLT_SOURCE_TYPE_LIVE)
4810 {
4811 // block DTV function
4812 ULOGE("TSP", "[TSP_ERROR][%06d] DTV function not supported on this chip\n", __LINE__);
4813 return DRVTSP_NOT_SUPPORTED;
4814 }
4815 }
4816 #endif //end of undef MSOS_TYPE_LINUX_KERNEL
4817
4818 _TSP_ENTRY();
4819
4820 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
4821
4822 *pu32PidFltId= 0xFFFFFFFF;
4823 if (!_TSP_PidFlt_Alloc(u32EngId, eFilterType, pu32PidFltId))
4824 {
4825 TSP_ASSERT2(0, TSP_DBG("[TSP_ERROR][%06d] Allocate Pid Filter fail\n", __LINE__));
4826 _TSP_RETURN(DRVTSP_FAIL);
4827 }
4828 _TSP_PidFlt_Init(u32EngId, *pu32PidFltId);
4829
4830 #ifndef HWPCR_ENABLE
4831 if (E_DRVTSP_FLT_TYPE_PCR == (eFilterType&~E_DRVTSP_FLT_MASK))
4832 {
4833 MS_U32 u32SecFltId = *pu32PidFltId;
4834 REG_SecFlt *pSecFilter = NULL;
4835
4836 if(*pu32PidFltId >= TSP_SECFLT_NUM)
4837 {
4838 u32SecFltId -= TSP_PIDFLT1_NUM;
4839 }
4840 if (!_TSP_SecFlt_Alloc(u32EngId, eFilterType, &u32SecFltId))
4841 {
4842 TSP_ASSERT2(0, TSP_DBG("[TSP_ERROR][%06d] Allocate Section Filter fail\n", __LINE__));
4843 }
4844 HAL_TSP_PidFlt_SelSecFlt(HAL_TSP_GetPidFltReg(u32EngId, *pu32PidFltId), u32SecFltId);
4845 _ptsp_res->_TspState[u32EngId].FltMap[*pu32PidFltId] = u32SecFltId;
4846 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
4847 _TSP_SecFlt_SetType(pSecFilter, _ptsp_res->_TspState[u32EngId].FltType[*pu32PidFltId]);
4848 }
4849 #endif
4850
4851 _TSP_RETURN(DRVTSP_OK);
4852 }
4853
4854 //-------------------------------------------------------------------------------------------------
4855 /// Free a PID filter of a TSP unit
4856 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4857 /// @param u32PidFltId \b IN: index of PID filter to be free
4858 /// @return TSP_Result
4859 //-------------------------------------------------------------------------------------------------
4860 TSP_Result MDrv_TSP_PidFlt_Free(MS_U32 u32EngId, MS_U32 u32PidFltId)
4861 {
4862 MS_U32 u32SecFltId, u32Flag;
4863 TSP_Result tRes = DRVTSP_FAIL;
4864
4865 _TSP_ENTRY();
4866
4867 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
4868 // this API only free pidflt which had section
4869 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
4870
4871 //_TSP_IND_UNLOCK();
4872
4873 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId])
4874 {
4875 _TSP_RETURN(DRVTSP_OK);
4876 }
4877
4878 // PVR pid filters and AV filters do not have SecFltEvtNotify, so call free function directly.
4879 u32SecFltId = _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId];
4880 #ifndef TS2_LIVE_SUPPORT
4881 if((u32PidFltId >= TSP_SECFLT_NUM)
4882 #else
4883 if(((u32PidFltId >= TSP_SECFLT_NUM) && (u32PidFltId < (TSP_SECFLT_NUM+TSP_PIDFLT1_NUM)))
4884 #endif
4885 || ((_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId] & E_DRVTSP_FLT_TYPE_SECTION_MASK) == 0))
4886 {
4887 //_TSP_IND_LOCK();
4888 _TSP_PidFlt_Free(u32EngId, u32PidFltId, TRUE);
4889 _TSP_RETURN(DRVTSP_OK);
4890 }
4891
4892 if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_POLL)
4893 {
4894 //_TSP_IND_LOCK();
4895 _TSP_SecBuf_Free(0, u32SecFltId);
4896 _TSP_SecFlt_Free(0, u32SecFltId, TRUE);
4897 _TSP_PidFlt_Free(u32EngId, u32PidFltId, TRUE);
4898 _TSP_RETURN(DRVTSP_OK);
4899 }
4900 else if ((_ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] & E_DRVTSP_EVENT_CB_MASK) == E_DRVTSP_EVENT_CB_SELF)
4901 {
4902 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId])
4903 {
4904 _TSP_RETURN(DRVTSP_OK);
4905 }
4906
4907 #if 1
4908 if((_s32TspTaskId != -1) && (_s32TspTaskId == MsOS_GetOSThreadID()))
4909 {
4910 TSP_DBG("[TSP_ERROR][%06d] Don't call %s in Callback function!!!", __LINE__, __FUNCTION__);
4911 _TSP_RETURN(DRVTSP_FAIL);
4912 }
4913 #endif
4914
4915 if(_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] & E_DRVTSP_FLT_STATE_CBRUN)
4916 {
4917 //ULOGE("TSP", "[%s][%d]Warning !! Filter %d callback is running %x! Try Again!\n", __FUNCTION__, __LINE__, (unsigned int)u32PidFltId, (unsigned int)stDrvState);
4918 _TSP_RETURN(DRVTSP_FAIL);
4919 }
4920
4921 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] |= E_DRVTSP_FLT_STATE_FREEING;
4922 _TSP_GetSecRdyId(u32SecFltId, &u32Flag, OSAL_EVENT_OR_CLEAR);
4923 _TSP_GetSecOvfId(u32SecFltId, &u32Flag, OSAL_EVENT_OR_CLEAR);
4924 _TSP_SecBuf_Free(u32EngId, u32SecFltId);
4925 _TSP_SecFlt_Free(u32EngId, u32SecFltId, TRUE);
4926 _TSP_PidFlt_Free(u32EngId, u32PidFltId, TRUE);
4927
4928 _TSP_RETURN(DRVTSP_OK);
4929
4930 }
4931 //_TSP_IND_LOCK();
4932 _TSP_RETURN(tRes);
4933 }
4934
4935 //-------------------------------------------------------------------------------------------------
4936 /// Set PID to a PID filter
4937 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4938 /// @param u32PidFltId \b IN: index of PID filter to be set
4939 /// @param u32PID \b IN: PID value
4940 /// @return TSP_Result
4941 //-------------------------------------------------------------------------------------------------
4942 TSP_Result MDrv_TSP_PidFlt_SetPid(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_U32 u32PID)
4943 {
4944 _TSP_ENTRY();
4945 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
4946 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
4947 TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], TSP_DBG("[TSP_ERROR][%06d] Bad Flt state\n", __LINE__));
4948
4949 #ifdef HWPCR_ENABLE
4950 if(u32PidFltId >= TSP_HWPCR_FLT_START_ID)
4951 {
4952 HAL_TSP_PidFlt_SetHWPcrPid(u32PidFltId - TSP_HWPCR_FLT_START_ID, u32PID);
4953 _TSP_RETURN(DRVTSP_OK);
4954 }
4955 else
4956 {
4957 #endif
4958 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(u32EngId, u32PidFltId), u32PID);
4959
4960 #ifndef NO_CA
4961 _TSP_FLT1_DupFLT0_Pid(0, u32PidFltId, u32PID);
4962
4963 #ifdef TS2_LIVE_SUPPORT
4964 //Duplicate FLT2 pid to FLT1 for dscmb
4965 _TSP_FLT1_DupFLT2_Pid(0, u32PidFltId, u32PID);
4966 #endif //end TS2_IF_SUPPORT define
4967
4968 #endif //end NO_CA define
4969
4970 #ifdef HWPCR_ENABLE
4971 }
4972 #endif
4973
4974 _TSP_RETURN(DRVTSP_OK);
4975 }
4976
4977 //-------------------------------------------------------------------------------------------------
4978 /// Set PID to a PID filter
4979 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
4980 /// @param u32PidFltId \b IN: index of PID filter to be set
4981 /// @param pu32PID \b OUT: the output PID
4982 /// @return TSP_Result
4983 //-------------------------------------------------------------------------------------------------
4984 TSP_Result MDrv_TSP_PidFlt_GetPid(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_U32* pu32PID)
4985 {
4986 _TSP_ENTRY();
4987
4988 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
4989 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
4990 //TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], TSP_DBG("[TSP_ERROR][%06d] Bad Flt state\n", __LINE__));
4991
4992 #ifdef HWPCR_ENABLE
4993 if(u32PidFltId >= TSP_HWPCR_FLT_START_ID)
4994 {
4995 *pu32PID = HAL_TSP_PidFlt_GetHWPcrPid(u32PidFltId - TSP_HWPCR_FLT_START_ID);
4996 }
4997 else
4998 {
4999 #endif
5000
5001 *pu32PID = HAL_TSP_PidFlt_GetPid(HAL_TSP_GetPidFltReg(u32EngId, u32PidFltId));
5002
5003 #ifdef HWPCR_ENABLE
5004 }
5005 #endif
5006
5007 _TSP_RETURN(DRVTSP_OK);
5008 }
5009
5010 //-------------------------------------------------------------------------------------------------
5011 /// Select section filter of PID filter
5012 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5013 /// @param u32PidFltId \b IN: index of PID filter\n
5014 /// @param u32SecFltId \b IN: index of section filter
5015 /// @return TSP_Result
5016 /// @note
5017 /// The PID filter and section filter pair is one-to-one mapping. User has to
5018 /// allocate other PID filters if user have more than one section filter for same
5019 /// PID packet.\n
5020 /// @sa MDrv_TSP_PidFlt_Alloc
5021 //-------------------------------------------------------------------------------------------------
5022 TSP_Result MDrv_TSP_PidFlt_SelSecFlt(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_U32 u32SecFltId)
5023 {
5024 REG_SecFlt *pSecFilter = NULL;
5025
5026 _TSP_ENTRY();
5027
5028 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5029 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
5030 TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], TSP_DBG("[TSP_ERROR][%06d] Bad Flt state\n", __LINE__));
5031 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] SecFltId= %d\n", __LINE__, (unsigned int)u32SecFltId));
5032
5033 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5034
5035 HAL_TSP_PidFlt_SelSecFlt(HAL_TSP_GetPidFltReg(u32EngId, u32PidFltId), u32SecFltId);
5036 _ptsp_res->_TspState[u32EngId].FltMap[u32PidFltId] = u32SecFltId;
5037 _TSP_SecFlt_SetType(pSecFilter, _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId]);
5038 _TSP_RETURN(DRVTSP_OK);
5039 }
5040
5041
5042 //-------------------------------------------------------------------------------------------------
5043 /// Enable PID filter
5044 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5045 /// @param u32PidFltId \b IN: index of filter to be enable
5046 /// @param bEnable \b IN: TRUE(enable), FALSE(disable)
5047 /// @return TSP_Result
5048 /// @note
5049 /// When PID filter enable, the section buffer pointer will be reset to buffer start address,
5050 /// overflow condition will be resolved if exist.
5051 //-------------------------------------------------------------------------------------------------
5052 TSP_Result MDrv_TSP_PidFlt_Enable(MS_U32 u32EngId, MS_U32 u32PidFltId, MS_BOOL bEnable)
5053 {
5054 REG_PidFlt* pPidFilter= NULL;
5055
5056 _TSP_ENTRY();
5057
5058 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5059 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
5060 TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], TSP_DBG("[TSP_ERROR][%06d] Bad Flt state\n", __LINE__));
5061
5062 if (!bEnable)
5063 {
5064 if (!HAS_FLAG(_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], E_DRVTSP_FLT_STATE_ENABLE))
5065 {
5066 // TSP_DBG("[TSP_WARNNING][%06d] disable an inactive PidFlt %d\n", __LINE__, u32PidFltId);
5067 _TSP_RETURN(DRVTSP_OK);
5068 }
5069
5070 _TSP_PidFlt_Disable(u32EngId, u32PidFltId);
5071 _TSP_RETURN(DRVTSP_OK);
5072 }
5073
5074 if (HAS_FLAG(_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId], E_DRVTSP_FLT_STATE_ENABLE))
5075 {
5076 // TSP_DBG("[TSP_WARNNING][%06d] Enable an active PidFlt %d\n", __LINE__, u32PidFltId);
5077 _TSP_RETURN(DRVTSP_OK);
5078 }
5079
5080 pPidFilter= HAL_TSP_GetPidFltReg(u32EngId, u32PidFltId);
5081 if (E_DRVTSP_FLT_TYPE_PVR == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5082 {
5083 if (E_DRVTSP_FLT_SOURCE_TYPE_FILE == _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId])
5084 {
5085 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_PVR_ENABLE);
5086 }
5087 #ifdef EXT_PVR1_FLT
5088 else
5089 {
5090 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_SECFLT);
5091 }
5092 #endif
5093
5094 #ifndef NO_PVR
5095 TSP_ASSERT2(TSP_SECFLT_NUM <= u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
5096 #endif //udef NO_PVR
5097 }
5098 #ifdef TS2_IF_SUPPORT
5099 else if (E_DRVTSP_FLT_TYPE_CB == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5100 {
5101 #ifdef TS2_LIVE_SUPPORT
5102 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_REC);
5103 #endif
5104 TSP_ASSERT2((TSP_PIDFLT_BASE0_NUM+TSP_PIDFLT_BASE1_NUM) <= u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
5105 }
5106 #endif
5107 else if (E_DRVTSP_FLT_TYPE_VIDEO == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5108 {
5109 #ifdef TS2_LIVE_SUPPORT
5110 HAL_TSP_AVFIFO_Src_SelTs2(TSP_FIFO_VD, (E_DRVTSP_FLT_SOURCE_TYPE_TS2 == _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId]));
5111 #endif
5112 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_VFIFO);
5113 }
5114 else if (E_DRVTSP_FLT_TYPE_AUDIO == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5115 {
5116 #ifdef TS2_LIVE_SUPPORT
5117 HAL_TSP_AVFIFO_Src_SelTs2(TSP_FIFO_AU, (E_DRVTSP_FLT_SOURCE_TYPE_TS2 == _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId]));
5118 #endif
5119 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_AFIFO);
5120 }
5121 #ifndef NO_AUBFIFO
5122 else if (E_DRVTSP_FLT_TYPE_AUDIO2 == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5123 {
5124 #ifdef TS2_LIVE_SUPPORT
5125 HAL_TSP_AVFIFO_Src_SelTs2(TSP_FIFO_AUB, (E_DRVTSP_FLT_SOURCE_TYPE_TS2 == _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId]));
5126 #endif
5127 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_AFIFO2);
5128 }
5129 #endif
5130 #ifdef MMFI_VD3D
5131 else if (E_DRVTSP_FLT_TYPE_VIDEO3D == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5132 {
5133 #ifdef TS2_LIVE_SUPPORT
5134 HAL_TSP_AVFIFO_Src_SelTs2(TSP_FIFO_V3D, (E_DRVTSP_FLT_SOURCE_TYPE_TS2 == _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId]));
5135 #endif
5136 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_VFIFO3D);
5137 }
5138 #endif
5139 #ifdef HWPCR_ENABLE
5140 else if (E_DRVTSP_FLT_TYPE_PCR == _ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5141 {
5142 MS_U32 u32Idx = u32PidFltId - TSP_HWPCR_FLT_START_ID;
5143 MS_U32 u32PktSrc = TSP_SRC_FROM_PKTDMX0;
5144
5145 switch(_ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId])
5146 {
5147 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
5148 u32PktSrc = TSP_SRC_FROM_PKTDMX0;
5149 break;
5150 case E_DRVTSP_FLT_SOURCE_TYPE_FILE:
5151 u32PktSrc = TSP_SRC_FROM_PKTDMXFL;
5152 break;
5153 }
5154
5155 #if (TSP_HWPCR_BY_HK == 1)
5156 _u8ResetPcr[u32Idx] = 3;
5157 _u32PrevStcBase[u32Idx] = 0;
5158 _u32PrevPllControl[u32Idx] = 0;
5159 #endif
5160
5161 HAL_TSP_HWPcr_Reset(u32Idx, TRUE);
5162 #if (TSP_HWPCR_BY_HK == 1)
5163 HAL_TSP_HWPcr_Reset(u32Idx, FALSE);
5164 HAL_TSP_HWPcr_Int_Enable(u32Idx, TRUE);
5165 _TSP_SetHwPcrNotifyId(u32Idx);
5166 #endif
5167
5168 HAL_TSP_HWPcr_SelSrc(u32Idx, u32PktSrc);
5169 HAL_TSP_PidFlt_HWPcrFlt_Enable(u32Idx, TRUE);
5170 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId]|= E_DRVTSP_FLT_STATE_ENABLE;
5171 _TSP_RETURN(DRVTSP_OK);
5172 }
5173 #endif
5174 else
5175 {
5176 REG_SecFlt* pSecFilter = NULL;
5177 MS_U32 u32SecFltId;
5178
5179 REG_SecFlt* pSecBufFilter = NULL;
5180 MS_U32 u32SecBufId;
5181 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
5182
5183 u32SecFltId = HAL_TSP_PidFlt_GetSecFlt(pPidFilter);
5184 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] SecFltId= %d\n", __LINE__, (unsigned int)u32SecFltId));
5185 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);;
5186 //u32SecBufId = HAL_TSP_SecFlt_GetSecBuf(pSecFilter);
5187 u32SecBufId = u32SecFltId;
5188
5189 // reset ver/crc check
5190 if (_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId] == E_DRVTSP_FLT_TYPE_SECTION_VER)
5191 {
5192 HAL_TSP_SecFlt_VerReset(u32SecFltId);
5193 }
5194
5195 switch (_ptsp_res->_TspState[u32EngId].FltType[u32PidFltId])
5196 {
5197 case E_DRVTSP_FLT_TYPE_SECTION:
5198 case E_DRVTSP_FLT_TYPE_PES:
5199 case E_DRVTSP_FLT_TYPE_PACKET:
5200 case E_DRVTSP_FLT_TYPE_TELETEXT:
5201 case E_DRVTSP_FLT_TYPE_SECTION_VER:
5202 case E_DRVTSP_FLT_TYPE_SECTION_NO_PUSI:
5203 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecBufId, TSP_DBG("[TSP_ERROR][%06d] SecBufId= %d\n", __LINE__, (unsigned int)u32SecBufId));
5204 pSecBufFilter= _TSP_GET_SECFLT_REG(u32SecBufId);;
5205 HAL_TSP_SecBuf_ResetBuffer(pSecBufFilter);
5206 HAL_TSP_SecFlt_ResetState(pSecFilter);
5207 HAL_TSP_SecFlt_SetRmnCount(pSecFilter, 0);
5208 //HAL_TSP_Reset_SecDisCont_PktCount(u32PidFltId);
5209 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_SECFLT);
5210 break;
5211 case E_DRVTSP_FLT_TYPE_EMM:
5212 case E_DRVTSP_FLT_TYPE_ECM:
5213 HAL_TSP_SecFlt_ResetState(pSecFilter);
5214 HAL_TSP_SecFlt_SetRmnCount(pSecFilter, 0);
5215 HAL_TSP_SecBuf_ResetBuffer(pSecFilter);
5216 //HAL_TSP_Reset_SecDisCont_PktCount(u32PidFltId);
5217 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_SECFLT);
5218 break;
5219 case E_DRVTSP_FLT_TYPE_PCR:
5220 HAL_TSP_SecFlt_PcrReset(pSecFilter);
5221 #if (defined(NO_FILEIN) || !defined(VQ_ENABLE))
5222 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_SECFLT|TSP_PIDFLT_OUT_SECFLT_AF);
5223 #else
5224 HAL_TSP_PidFlt_SelFltOutput(pPidFilter, TSP_PIDFLT_OUT_SECFLT_AF);
5225 #endif
5226 break;
5227 default:
5228 break;
5229 }
5230 }
5231
5232 if (E_DRVTSP_FLT_SOURCE_TYPE_LIVE == _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId])
5233 {
5234 HAL_TSP_PidFlt_SelFltSource(pPidFilter, TSP_PIDFLT_IN_LIVE);
5235 }
5236 #ifndef NO_FILEIN
5237 else if (E_DRVTSP_FLT_SOURCE_TYPE_FILE == _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId])
5238 {
5239 HAL_TSP_PidFlt_SelFltSource(pPidFilter, TSP_PIDFLT_IN_FILE);
5240 }
5241 #endif //udef NO_FILEIN
5242
5243 _ptsp_res->_TspState[u32EngId].FltState[u32PidFltId]|= E_DRVTSP_FLT_STATE_ENABLE;
5244 _TSP_RETURN(DRVTSP_OK);
5245 }
5246
5247
5248 //-------------------------------------------------------------------------------------------------
5249 /// Get current PID filter status
5250 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5251 /// @param u32PidFltId \b IN: index of PID filter
5252 /// @param peState \b OUT: current ORed state flag of PID filter\n
5253 /// E_DRVTSP_FLT_STATE_ALLOC\n
5254 /// E_DRVTSP_FLT_STATE_ENABLE\n
5255 /// E_DRVTSP_FLT_STATE_SCRAMBLED ([VENUS]: TS level scramble status)
5256 /// @return TSP_Result
5257 //-------------------------------------------------------------------------------------------------
5258 TSP_Result MDrv_TSP_PidFlt_GetState(MS_U32 u32EngId, MS_U32 u32PidFltId, DrvTSP_FltState *peState)
5259 {
5260 _TSP_ENTRY();
5261 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5262 TSP_ASSERT2(TSP_PIDFLT_NUM_ALL> u32PidFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId %d\n", __LINE__, (unsigned int)u32PidFltId));
5263 if (_TSP_PidFlt_StateGet(u32EngId, u32PidFltId, peState))
5264 {
5265 _TSP_RETURN(DRVTSP_OK);
5266 }
5267 else
5268 {
5269 _TSP_RETURN(DRVTSP_FAIL);
5270 }
5271 }
5272
5273 //-------------------------------------------------------------------------------------------------
5274 /// Check current PID filter owner
5275 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5276 /// @param u32PidFltId \b IN: index of PID filter
5277 /// @return TSP_Result
5278 //-------------------------------------------------------------------------------------------------
5279 TSP_Result MDrv_TSP_PidFlt_ChkOwner(MS_U32 u32EngId, MS_U32 u32PidFltId)
5280 {
5281 _TSP_ENTRY();
5282
5283 if (_ptsp_res->_TspState[u32EngId].FltState[u32PidFltId] == E_DRVTSP_FLT_STATE_NA)
5284 {
5285 _TSP_RETURN(DRVTSP_FAIL);
5286 }
5287
5288 _TSP_RETURN(DRVTSP_OK);
5289 }
5290
5291 //only for debug
5292 TSP_Result MDrv_TSP_PidFlt_PVREnable(MS_U32 u32EngId, MS_U32 u32PidFltId)
5293 {
5294 #ifndef NO_PVR
5295 REG_PidFlt* pPidFilter= NULL;
5296
5297 pPidFilter= HAL_TSP_GetPidFltReg(u32EngId, u32PidFltId);
5298
5299 HAL_TSP_PidFlt_PVREnable(pPidFilter);
5300
5301 return DRVTSP_OK;
5302 #else
5303 return DRVTSP_NOT_SUPPORTED;
5304 #endif //udef NO_PVR
5305 }
5306
5307 //-------------------------------------------------------------------------------------------------
5308 /// Change PID filter source
5309 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5310 /// @param eFilterType \b IN: index of filter to be enable
5311 /// @param bEnable \b IN: New filter source type to change
5312 /// @return TSP_Result
5313 /// @note
5314 //-------------------------------------------------------------------------------------------------
5315 TSP_Result MDrv_TSP_PidFlt_ChangeSource(MS_U32 u32EngId, MS_U32 u32PidFltId, DrvTSP_FltType eFilterType)
5316 {
5317 _TSP_ENTRY();
5318 if ((eFilterType&E_DRVTSP_FLT_SOURCE_TYPE_MASK) == E_DRVTSP_FLT_SOURCE_TYPE_LIVE)
5319 {
5320 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_LIVE;
5321 }
5322 else if ((eFilterType&E_DRVTSP_FLT_SOURCE_TYPE_MASK) == E_DRVTSP_FLT_SOURCE_TYPE_FILE)
5323 {
5324 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_FILE;
5325 }
5326 else if ((eFilterType&E_DRVTSP_FLT_SOURCE_TYPE_MASK) == E_DRVTSP_FLT_SOURCE_TYPE_TS2)
5327 {
5328 _ptsp_res->_TspState[u32EngId].FltSource[u32PidFltId] = E_DRVTSP_FLT_SOURCE_TYPE_TS2;
5329 }
5330
5331 _TSP_RETURN(DRVTSP_OK);
5332 }
5333
5334 //-------------------------------------------------------------------------------------------------
5335 /// Get PID filter scramble status
5336 /// @param FltSrc \b IN : Filter source
5337 /// @param u32FltGroupId \b IN : Pid filter group id, every 32 filter for 1 group. 0: filter 0~31, 1: 32~63
5338 /// @param PidFltId \b IN : Pid filter id for getting. If 0xFFFFFFFF, means getting the status of all filters of the same group
5339 /// @param pu32ScmbSts \b OUT : The scrmabling status of pid filter. If getting all group status, every bit means one status of every filter
5340 /// If only checking one filter, 1 means scrambled status and 0 means non-scrambled status
5341 /// @return TSP_Result
5342 /// @note
5343 //-------------------------------------------------------------------------------------------------
5344 TSP_Result MDrv_TSP_PidFlt_GetScmbSts(DrvTSP_FltType FltSrc, MS_U32 u32FltGroupId, MS_U32 PidFltId, MS_U32 *pu32ScmbSts)
5345 {
5346 MS_U32 u32Src = 0;
5347
5348 _TSP_ENTRY();
5349
5350 *pu32ScmbSts = 0;
5351
5352 switch(FltSrc)
5353 {
5354 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
5355 u32Src = 0;
5356 break;
5357 case E_DRVTSP_FLT_SOURCE_TYPE_FILE:
5358 u32Src = 1;
5359 break;
5360 case E_DRVTSP_FLT_SOURCE_TYPE_TS2:
5361 *pu32ScmbSts = 0;
5362 _TSP_RETURN(DRVTSP_OK);
5363 default:
5364 _TSP_RETURN(DRVTSP_INVALID_PARAM);
5365 }
5366
5367 *pu32ScmbSts = HAL_TSP_Scmb_Status(u32Src, u32FltGroupId, PidFltId);
5368
5369 _TSP_RETURN(DRVTSP_OK);
5370 }
5371
5372
5373 // SecFlt API
5374 //-------------------------------------------------------------------------------------------------
5375 /// Allocate a section filter of a PID filter
5376 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5377 /// @param pu32SecFltId \b OUT: pointer of section filter id return
5378 /// @return TSP_Result
5379 //-------------------------------------------------------------------------------------------------
5380 TSP_Result MDrv_TSP_SecFlt_Alloc(MS_U32 u32EngId, MS_U32 *pu32SecFltId)
5381 {
5382 MS_U32 u32SecBufId;
5383 REG_SecFlt *pSecFilter = NULL;
5384
5385 _TSP_ENTRY();
5386
5387 TSP_ASSERT2(TSP_ENGINE_NUM > u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5388 TSP_ASSERT2(pu32SecFltId, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5389
5390 #ifdef TS2_LIVE_SUPPORT
5391 if(*pu32SecFltId >= TSP_SECFLT_NUM)
5392 {
5393 *pu32SecFltId -= TSP_PIDFLT1_NUM;
5394 }
5395 #endif
5396
5397 if (FALSE== _TSP_SecFlt_Alloc(u32EngId, E_DRVTSP_FLT_TYPE_SECTION, pu32SecFltId))
5398 {
5399 TSP_ASSERT2(0, TSP_DBG("[TSP_ERROR][%06d] Allocate section filter fail\n", __LINE__));
5400 }
5401 TSP_ASSERT2(TSP_SECFLT_NUM_All> *pu32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)*pu32SecFltId));
5402 u32SecBufId = *pu32SecFltId;
5403 if (FALSE == _TSP_SecBuf_Alloc(u32EngId, &u32SecBufId))
5404 {
5405 TSP_ASSERT2(0, TSP_DBG("[TSP_ERROR][%06d] Allocate section buffer fail\n", __LINE__));
5406 }
5407 TSP_ASSERT2(TSP_SECBUF_NUM > u32SecBufId, TSP_DBG("[TSP_ERROR][%06d] Bad SecBufId %d\n", __LINE__, (unsigned int)u32SecBufId));
5408 TSP_ASSERT2(u32SecBufId == *pu32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad PidFltId/SecFltId alignment\n", __LINE__));
5409 _TSP_SecBuf_Init(u32EngId, u32SecBufId);
5410 pSecFilter = _TSP_GET_SECFLT_REG(*pu32SecFltId);
5411 HAL_TSP_SecFlt_SelSecBuf(pSecFilter, u32SecBufId, TRUE);
5412 _TSP_RETURN(DRVTSP_OK);
5413 }
5414
5415
5416 //-------------------------------------------------------------------------------------------------
5417 /// Free a section filter of a PID filter
5418 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5419 /// @param u32SecFltId \b IN: section filter of TSP to be free
5420 /// @return TSP_Result
5421 //-------------------------------------------------------------------------------------------------
5422 TSP_Result MDrv_TSP_SecFlt_Free(MS_U32 u32EngId, MS_U32 u32SecFltId)
5423 {
5424 _TSP_ENTRY();
5425
5426 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5427 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5428 TSP_ASSERT2(E_DRVTSP_FLT_STATE_FREE!= _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId],
5429 TSP_DBG("[TSP_ERROR][%06d] Bad SecFlt state\n", __LINE__));
5430
5431 _TSP_SecBuf_Free(u32EngId, u32SecFltId);
5432 _TSP_SecFlt_Free(u32EngId, u32SecFltId, TRUE);
5433 _TSP_RETURN(DRVTSP_OK);
5434 }
5435
5436
5437 //-------------------------------------------------------------------------------------------------
5438 //[Reserved]
5439 // Set section filtering mode
5440 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5441 // @param u32SecFltId \b IN: section filter of TSP to be free
5442 // @param eSecFltMode \b IN: continue/one-shot mode of section filter
5443 // @return TSP_Result
5444 // @attention
5445 // One-shot filter has the disadvantage of interrupt lost becuase it stops filter, a timeout
5446 // to check filter status is better for usage.
5447 //-------------------------------------------------------------------------------------------------
5448 TSP_Result MDrv_TSP_SecFlt_SetMode(MS_U32 u32EngId, MS_U32 u32SecFltId, DrvTSP_FltMode eSecFltMode)
5449 {
5450 MS_U32 uMode = 0;
5451 REG_SecFlt *pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5452
5453 _TSP_ENTRY();
5454
5455 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5456 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5457
5458 if (eSecFltMode & E_DRVTSP_FLT_MODE_ONESHOT)
5459 {
5460 uMode |= TSP_SECFLT_MODE_ONESHOT;
5461 }
5462
5463 if (eSecFltMode & E_DRVTSP_FLT_MODE_CRCCHK)
5464 {
5465 uMode |= TSP_SECFLT_MODE_CRCCHK;
5466 }
5467
5468 _ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId] = eSecFltMode;
5469
5470 HAL_TSP_SecFlt_SetMode(pSecFilter, uMode);
5471 _TSP_RETURN(DRVTSP_OK);
5472 }
5473
5474
5475 //-------------------------------------------------------------------------------------------------
5476 /// Set Match/Mask filter pattern of section filter
5477 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5478 /// @param u32SecFltId \b IN: index of filter to be set pattern
5479 /// @param pu8Match \b IN: pointer of filter pattern (in @ref DRVTSP_FILTER_DEPTH bytes)
5480 /// @param pu8Mask \b IN: pointer of pattern bitmask (in @ref DRVTSP_FILTER_DEPTH bytes)
5481 /// @param bNotMatch \b IN: negative the result of comparion of filter
5482 /// @return TSP_Result
5483 /// note: match mask -- must set 0 to be compare (customer request)
5484 /// not match mask -- must set 1 to compare
5485 //-------------------------------------------------------------------------------------------------
5486 TSP_Result MDrv_TSP_SecFlt_SetPattern(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U8 *pu8Match, MS_U8 *pu8Mask, MS_U8 *pu8NotMask)
5487 {
5488 int i = 0;
5489 REG_SecFlt *pSecFilter = NULL;
5490
5491 if((pu8Match == NULL) || (pu8Mask == NULL) || (pu8NotMask == NULL))
5492 {
5493 return (DRVTSP_INVALID_PARAM);
5494 }
5495
5496 _TSP_ENTRY();
5497
5498 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5499 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5500
5501 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5502 for (i = 0 ; i < 16 ; i++)
5503 {
5504 *(pu8Mask+i) = 0xFF^(*(pu8Mask+i));
5505 }
5506
5507 HAL_TSP_SecFlt_SetMask(pSecFilter, pu8Mask);
5508 HAL_TSP_SecFlt_SetMatch(pSecFilter, pu8Match);
5509 HAL_TSP_SecFlt_SetNMask(pSecFilter, pu8NotMask);
5510 _TSP_RETURN(DRVTSP_OK);
5511 }
5512
5513
5514 //-------------------------------------------------------------------------------------------------
5515 /// Reset the section buffer read/write pointer to start address and resolve overflow condition
5516 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5517 /// @param u32SecFltId \b IN: index of section buffer to be reset
5518 /// @return TSP_Result
5519 //-------------------------------------------------------------------------------------------------
5520 TSP_Result MDrv_TSP_SecFlt_ResetBuffer(MS_U32 u32EngId, MS_U32 u32SecFltId)
5521 {
5522 REG_SecFlt *pSecFilter = NULL;
5523
5524 _TSP_ENTRY();
5525 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5526 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5527 // Richard: Be careful since it works based the assumption that SecFltId is equal to SecBufId
5528 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5529
5530 HAL_TSP_SecBuf_ResetBuffer(pSecFilter);
5531 HAL_TSP_SecFlt_ResetState(pSecFilter);
5532 HAL_TSP_SecFlt_ResetEmmIdx(pSecFilter);
5533 _TSP_RETURN(DRVTSP_OK);
5534 }
5535
5536 //-------------------------------------------------------------------------------------------------
5537 /// Set buffer start address and buffer size to section buffer
5538 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5539 /// @param u32SecFltId \b IN: index of section buffer to be set
5540 /// @param u32StartAddr \b IN: start address of section buffer
5541 /// @param u32BufSize \b IN: size of section buffer
5542 /// @return TSP_Result
5543 /// @note
5544 /// Buffer start address and buffer size should be 128-bit (16-byte) aligned.\n
5545 /// @sa MDrv_TSP_PidFlt_Alloc
5546 //-------------------------------------------------------------------------------------------------
5547 TSP_Result MDrv_TSP_SecFlt_SetBuffer(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY phyStartAddr, MS_U32 u32BufSize)
5548 {
5549 REG_SecFlt *pSecFilter = NULL;
5550
5551 _TSP_ENTRY();
5552
5553 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5554 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5555 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5556
5557 HAL_TSP_SecBuf_SetBuffer(pSecFilter, phyStartAddr, u32BufSize);
5558 _TSP_RETURN(DRVTSP_OK);
5559 }
5560
5561
5562 //-------------------------------------------------------------------------------------------------
5563 /// Set request data size to trigger interrupt
5564 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5565 /// @param u32SecFltId \b IN: index of section buffer to be set
5566 /// @param u32ReqCount \b IN: received data size to trigger interrupt
5567 /// @return TSP_Result
5568 /// @note
5569 /// TSP always calls section callback function when a completed section data is
5570 /// ready at section buffer.
5571 /// It can set a request value other than 0 and TSP will also notify user when
5572 /// request size of data is ready at buffer. Only support @ref E_DRVTSP_FLT_TYPE_PES.
5573 /// @sa MDrv_TSP_SecFlt_Notify
5574 /// @attention
5575 /// The maximum request count is 0xFFFF
5576 //-------------------------------------------------------------------------------------------------
5577 TSP_Result MDrv_TSP_SecFlt_SetReqCount(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U32 u32ReqCount)
5578 {
5579 REG_SecFlt *pSecFilter = NULL;
5580
5581 _TSP_ENTRY();
5582
5583 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5584 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5585 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5586
5587 HAL_TSP_SecFlt_SetReqCount(pSecFilter, u32ReqCount);
5588 _TSP_RETURN(DRVTSP_OK);
5589 }
5590
5591
5592 //-------------------------------------------------------------------------------------------------
5593 /// Set ECM index
5594 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5595 /// @param u32SecFltId \b IN: index of section buffer
5596 /// @param u32EcmIdx \b IN: Index of ECM
5597 /// @return TSP_Result
5598 //-------------------------------------------------------------------------------------------------
5599 TSP_Result MDrv_TSP_SecFlt_SetEcmIdx(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U32 u32EcmIdx)
5600 {
5601 #if 0
5602 _TSP_ENTRY();
5603
5604 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %ld\n", __LINE__, u32EngId));
5605 TSP_ASSERT2(TSP_SECFLT_NUM> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %ld\n", __LINE__, u32SecFltId));
5606 REG_SecFlt *pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5607
5608 HAL_TSP_SecFlt_SetEcmIdx(pSecFilter, u32EcmIdx);
5609 _TSP_RETURN(DRVTSP_OK);
5610 #else
5611 return DRVTSP_OK;
5612 #endif
5613 }
5614
5615
5616 //-------------------------------------------------------------------------------------------------
5617 /// Get buffer start address of setction buffer
5618 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5619 /// @param u32SecFltId \b IN: index of section buffer
5620 /// @param pu32BufStart \b OUT: pointer of buffer start address return
5621 /// @return TSP_Result
5622 //-------------------------------------------------------------------------------------------------
5623 TSP_Result MDrv_TSP_SecFlt_GetBufStart(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY *pphyBufStart)
5624 {
5625 REG_SecFlt *pSecFilter = NULL;
5626
5627 _TSP_ENTRY();
5628
5629 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5630 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5631 TSP_ASSERT2(pphyBufStart, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5632
5633 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5634
5635 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5636 {
5637 _TSP_RETURN(DRVTSP_FAIL);
5638 }
5639 *pphyBufStart= HAL_TSP_SecBuf_GetBufStart(pSecFilter);
5640 _TSP_RETURN(DRVTSP_OK);
5641 }
5642
5643
5644 //-------------------------------------------------------------------------------------------------
5645 /// Get buffer size of section buffer
5646 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5647 /// @param u32SecFltId \b IN: index of section buffer
5648 /// @param pu32BufSize \b OUT: pointer of buffer size return
5649 /// @return TSP_Result
5650 //-------------------------------------------------------------------------------------------------
5651 TSP_Result MDrv_TSP_SecFlt_GetBufSize(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_U32 *pu32BufSize)
5652 {
5653 REG_SecFlt *pSecFilter = NULL;
5654
5655 _TSP_ENTRY();
5656
5657 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5658 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5659 TSP_ASSERT2(pu32BufSize, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5660
5661 *pu32BufSize = 0;
5662 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5663 {
5664 _TSP_RETURN(DRVTSP_FAIL);
5665 }
5666 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5667
5668 *pu32BufSize= (MS_U32)(HAL_TSP_SecBuf_GetBufEnd(pSecFilter)- HAL_TSP_SecBuf_GetBufStart(pSecFilter));
5669 _TSP_RETURN(DRVTSP_OK);
5670 }
5671
5672
5673 //-------------------------------------------------------------------------------------------------
5674 /// Get current read address of section buffer
5675 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5676 /// @param u32SecFltId \b IN: index of section buffer
5677 /// @param pu32ReadAddr \b OUT: pointer of address return
5678 /// @return TSP_Result
5679 //-------------------------------------------------------------------------------------------------
5680 TSP_Result MDrv_TSP_SecFlt_GetReadAddr(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY *pphyReadAddr)
5681 {
5682 REG_SecFlt *pSecFilter = NULL;
5683
5684 _TSP_ENTRY();
5685
5686 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5687 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5688 TSP_ASSERT2(pphyReadAddr, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5689
5690 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5691 {
5692 _TSP_RETURN(DRVTSP_FAIL);
5693 }
5694
5695 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5696
5697 // move write point to read point while E_DRVTSP_FLT_MODE_AUTO_ADDR mode
5698 if (_ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId]&E_DRVTSP_FLT_MODE_AUTO_ADDR)
5699 {
5700 HAL_TSP_SecBuf_SetBufRead(pSecFilter, HAL_TSP_SecBuf_GetBufWrite(pSecFilter));
5701 }
5702 *pphyReadAddr= HAL_TSP_SecBuf_GetBufRead(pSecFilter);
5703 _TSP_RETURN(DRVTSP_OK);
5704 }
5705
5706
5707 //-------------------------------------------------------------------------------------------------
5708 /// Get current section data write address of section buffer
5709 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5710 /// @param u32SecFltId \b IN: index of section buffer
5711 /// @param pu32WriteAddr \b OUT: pointer of address return
5712 /// @return TSP_Result
5713 /// @note
5714 /// User can get current write address to know where is the end of section data
5715 /// received in the section buffer.
5716 //-------------------------------------------------------------------------------------------------
5717 TSP_Result MDrv_TSP_SecFlt_GetWriteAddr(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY *pphyWriteAddr)
5718 {
5719 REG_SecFlt *pSecFilter = NULL;
5720
5721 _TSP_ENTRY();
5722
5723 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5724 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5725 TSP_ASSERT2(pphyWriteAddr, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5726
5727 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5728 {
5729 _TSP_RETURN(DRVTSP_FAIL);
5730 }
5731
5732 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5733
5734 // move write point to read point while E_DRVTSP_FLT_MODE_AUTO_ADDR mode
5735 if (_ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId]&E_DRVTSP_FLT_MODE_AUTO_ADDR)
5736 {
5737 HAL_TSP_SecBuf_SetBufRead(pSecFilter, HAL_TSP_SecBuf_GetBufWrite(pSecFilter));
5738 }
5739 *pphyWriteAddr= HAL_TSP_SecBuf_GetBufWrite(pSecFilter);
5740 _TSP_RETURN(DRVTSP_OK);
5741 }
5742
5743
5744 //-------------------------------------------------------------------------------------------------
5745 /// Set current read address of section buffer
5746 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5747 /// @param u32SecFltId \b IN: index of section buffer
5748 /// @param u32ReadAddr \b IN: address of read pointer
5749 /// @return TSP_Result
5750 /// @note
5751 /// User can update the read address to notify TSP where is the end of section
5752 /// data already read back by user.
5753 //-------------------------------------------------------------------------------------------------
5754 TSP_Result MDrv_TSP_SecFlt_SetReadAddr(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY phyReadAddr)
5755 {
5756 REG_SecFlt *pSecFilter = NULL;
5757
5758 _TSP_ENTRY();
5759 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5760 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5761
5762 if (E_DRVTSP_FLT_STATE_FREE == _ptsp_res->_TspState[u32EngId].SecFltState[u32SecFltId])
5763 {
5764 _TSP_RETURN(DRVTSP_FAIL);
5765 }
5766
5767 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5768
5769 HAL_TSP_SecBuf_SetBufRead(pSecFilter, phyReadAddr);
5770 _TSP_RETURN(DRVTSP_OK);
5771 }
5772
5773 //-------------------------------------------------------------------------------------------------
5774 /// Subscribe event notification callback function for specified section filter
5775 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5776 /// @param u32SecFltId \b IN: index of section buffer
5777 /// @param eEvents \b IN: events need to be subscribed\n
5778 /// @ref E_DRVTSP_EVENT_DATA_READY\n
5779 /// @ref E_DRVTSP_EVENT_BUF_OVERFLOW
5780 /// @param pfCallback \b IN: callback function (NULL to disable)
5781 /// @return TSP_Result
5782 /// @note
5783 /// This function register a callback function for a section filter to TSP.
5784 /// TSP calls callback function each time when data is ready in section buffer.\n
5785 /// Data ready of section filter:\n
5786 /// @ref E_DRVTSP_FLT_TYPE_SECTION : a section ready\n
5787 /// @ref E_DRVTSP_FLT_TYPE_PES : PES packet ready or received data over than request size.
5788 /// @sa MDrv_TSP_SecFlt_SetReqCount
5789 /// @attention
5790 /// Callback function resides in OS TSP interrupt context, it recommends
5791 /// that callback function should not take too much time to block the system.
5792 //-------------------------------------------------------------------------------------------------
5793 TSP_Result MDrv_TSP_SecFlt_Notify(MS_U32 u32EngId, MS_U32 u32SecFltId, DrvTSP_Event eEvents, P_DrvTSP_EvtCallback pfCallback)
5794 {
5795 _TSP_ENTRY();
5796
5797 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5798 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__,(unsigned int)u32SecFltId));
5799
5800 if ((eEvents & (E_DRVTSP_EVENT_DATA_READY |
5801 E_DRVTSP_EVENT_BUF_OVERFLOW | E_DRVTSP_EVENT_SEC_CRCERR)) == 0)
5802 {
5803 _TSP_RETURN(DRVTSP_FAIL);
5804 }
5805
5806 _ptsp_res->_TspState[u32EngId].SecFltEvtNotify[u32SecFltId] = eEvents;
5807 _ptsp_res->_TspState[u32EngId].SecFltCallback[u32SecFltId] = pfCallback;
5808
5809 _TSP_RETURN(DRVTSP_OK);
5810 }
5811
5812
5813 //-------------------------------------------------------------------------------------------------
5814 //[Reserved]
5815 // Get current section filter status
5816 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
5817 // @param u32SecFltId \b IN: index of section filter
5818 // @param peState \b OUT: current ORed state flag of section filter
5819 // E_DRVTSP_FLT_STATE_ALLOC\n
5820 // E_DRVTSP_FLT_STATE_ENABLE\n
5821 // E_DRVTSP_FLT_STATE_OVERFLOW
5822 // @return TSP_Result
5823 // @note
5824 //-------------------------------------------------------------------------------------------------
5825 TSP_Result MDrv_TSP_SecFlt_GetState(MS_U32 u32EngId, MS_U32 u32SecFltId, DrvTSP_FltState *peState)
5826 {
5827 _TSP_ENTRY();
5828
5829 TSP_ASSERT2(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5830 TSP_ASSERT2(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5831 TSP_ASSERT2(peState, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5832
5833 if (_TSP_SecFlt_StateGet(u32EngId, u32SecFltId, peState))
5834 {
5835 _TSP_RETURN(DRVTSP_OK);
5836 }
5837 else
5838 {
5839 _TSP_RETURN(DRVTSP_FAIL);
5840 }
5841 }
5842
5843
5844 TSP_Result MDrv_TSP_TTX_SecFlt_GetWriteAddr(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHY *pphyWriteAddr)
5845 {
5846 REG_SecFlt *pSecFilter = NULL;
5847
5848 TSP_ASSERT(TSP_ENGINE_NUM> u32EngId, TSP_DBG("[TSP_ERROR][%06d] Bad Engine Id %d\n", __LINE__, (unsigned int)u32EngId));
5849 TSP_ASSERT(TSP_SECFLT_NUM_All> u32SecFltId, TSP_DBG("[TSP_ERROR][%06d] Bad SecFltId %d\n", __LINE__, (unsigned int)u32SecFltId));
5850 TSP_ASSERT(pphyWriteAddr, TSP_DBG("[TSP_ERROR][%06d] NULL pointer\n", __LINE__));
5851 // move write point to read point while E_DRVTSP_FLT_MODE_AUTO_ADDR mode
5852
5853 pSecFilter = _TSP_GET_SECFLT_REG(u32SecFltId);
5854
5855 if (_ptsp_res->_TspState[u32EngId].SecFltMode[u32SecFltId]&E_DRVTSP_FLT_MODE_AUTO_ADDR)
5856 {
5857 HAL_TSP_SecBuf_SetBufRead_tmp(pSecFilter, HAL_TSP_SecBuf_GetBufWrite_tmp(pSecFilter));
5858 }
5859 *pphyWriteAddr= HAL_TSP_SecBuf_GetBufWrite_tmp(pSecFilter);
5860 return DRVTSP_OK;
5861 }
5862
5863
5864 // PVR API
5865 //-------------------------------------------------------------------------------------------------
5866 /// Set PVR double record buffer start addresses and buffer size
5867 /// @param u32BufStart0 \b IN: start address of PVR buffer 0
5868 /// @param u32BufStart1 \b IN: start address of PVR buffer 1
5869 /// @param u32BufSize0 \b IN: size of PVR buffer 0
5870 /// @param u32BufSize1 \b IN: size of PVR buffer 1
5871 /// @return TSP_Result
5872 /// @note
5873 /// Buffer start address and size should be 128-bit (16-byte) aligned\n
5874 /// The maximum support size is 0xFFFF0 (1048560 bytes).
5875 /// @sa MDrv_TSP_PVR_Notify
5876 //-------------------------------------------------------------------------------------------------
5877 TSP_Result MDrv_TSP_PVR_SetBuffer(MS_PHY phyBufStart0, MS_PHY phyBufStart1, MS_U32 u32BufSize0, MS_U32 u32BufSize1)
5878 {
5879 #ifndef NO_PVR
5880 _TSP_ENTRY();
5881 HAL_TSP_PVR_SetBuffer(phyBufStart0, phyBufStart1, u32BufSize0, u32BufSize1);
5882
5883 // flush PVR buffer
5884 HAL_TSP_PVR_WaitFlush();
5885
5886 _TSP_RETURN(DRVTSP_OK);
5887 #else
5888 return DRVTSP_NOT_SUPPORTED;
5889 #endif //udef NO_PVR
5890 }
5891
5892
5893 //-------------------------------------------------------------------------------------------------
5894 /// Set PVR record mode and START/STOP recording.
5895 /// @param eRecMode \b IN: mode of recording
5896 /// @param bStart \b IN: TRUE(START), FALSE(STOP)
5897 /// @return TSP_Result
5898 /// @note
5899 /// Parameter eRecMode will be ignored when bStart is FALSE(STOP)\n
5900 /// @note
5901 /// It's a synchronous function. When STOP, it flushs internal record fifo
5902 /// and update current PVR record buffer write address before function return.\n
5903 /// User can call MDrv_TSP_PVR_GetWriteAddr to get the final valid data address
5904 /// after recording.
5905 //-------------------------------------------------------------------------------------------------
5906 TSP_Result MDrv_TSP_PVR_Start(DrvTSP_RecMode eRecMode, MS_BOOL bStart)
5907 {
5908 #ifndef NO_PVR
5909
5910 _TSP_ENTRY();
5911 if (bStart)
5912 {
5913 //HAL_TSP_PVR_WaitFlush();
5914 if(eRecMode == E_DRVTSP_REC_MODE_ENG0_FI_BYPASS)
5915 {
5916 HAL_TSP_PVR_Filein_Enable(TRUE, TRUE, TRUE);
5917 HAL_TSP_PVR_All(TRUE);
5918 }
5919 else if(eRecMode == E_DRVTSP_REC_MODE_ENG0_FI_FLTTYPE)
5920 {
5921 HAL_TSP_PVR_Filein_Enable(TRUE, TRUE, FALSE);
5922 HAL_TSP_PVR_All(FALSE);
5923 }
5924 else if(eRecMode == E_DRVTSP_REC_MODE_ENG0_FLT1CA)
5925 {
5926 //HAL_TSP_TSIF1_Enable(TRUE);
5927 HAL_TSP_PVR_REC_FLT_Enable(TRUE);
5928 _ptsp_res->TSPPvrcaParams._bPVRCA_Start = TRUE;
5929 }
5930 else
5931 {
5932 HAL_TSP_PVR_All((HAS_FLAG(eRecMode, 0x02))? TRUE: FALSE);
5933 }
5934 //HAL_TSP_LiveAB_En(TRUE); // set pvr to pidflt0_file
5935 HAL_TSP_PVR_Enable(TRUE);
5936 }
5937 else
5938 {
5939 //HAL_TSP_PVR_WaitFlush();
5940 if((eRecMode == E_DRVTSP_REC_MODE_ENG0_FI_BYPASS) || (eRecMode == E_DRVTSP_REC_MODE_ENG0_FI_FLTTYPE))
5941 {
5942 HAL_TSP_PVR_Filein_Enable(FALSE, FALSE, FALSE);
5943 }
5944 else if(eRecMode == E_DRVTSP_REC_MODE_ENG0_FLT1CA)
5945 {
5946 HAL_TSP_PVR_REC_FLT_Enable(FALSE);
5947 }
5948
5949 //HAL_TSP_LiveAB_En(FALSE); // disable pvr to pidflt0_file
5950 HAL_TSP_PVR_Enable(FALSE);
5951
5952 HAL_TSP_PVR_WaitFlush();
5953
5954 _ptsp_res->TSPPvrcaParams._bPVRCA_Start = FALSE;
5955 }
5956
5957 _TSP_RETURN(DRVTSP_OK);
5958
5959 #else
5960 return DRVTSP_NOT_SUPPORTED;
5961 #endif //udef NO_PVR
5962 }
5963
5964
5965 //-------------------------------------------------------------------------------------------------
5966 /// Get final write address of PVR record buffer
5967 /// @param pu32WriteAddr \b OUT: pointer of address return
5968 /// @return TSP_Result
5969 /// @note
5970 /// User can get current write address to know where is the end of section data
5971 /// received in the section buffer.
5972 //-------------------------------------------------------------------------------------------------
5973 TSP_Result MDrv_TSP_PVR_GetWriteAddr(MS_PHY *pu32WriteAddr)
5974 {
5975 #ifndef NO_PVR
5976
5977 _TSP_ENTRY();
5978
5979 *pu32WriteAddr = (MS_PHY)HAL_TSP_PVR_GetBufWrite();
5980
5981 _TSP_RETURN(DRVTSP_OK);
5982 #else
5983 return DRVTSP_NOT_SUPPORTED;
5984 #endif //udef NO_PVR
5985 }
5986
5987
5988 //-------------------------------------------------------------------------------------------------
5989 /// Subscribe event notification callback function for PVR record buffer
5990 /// @param eEvents \b IN: events need to be subscribed\n
5991 /// @ref E_DRVTSP_EVENT_PVRBUF_FULL
5992 /// @param pfCallback \b IN: callback function (NULL to disable)
5993 /// @return TSP_Result
5994 /// @note
5995 /// TSP PVR recording uses double buffer mechanism. This function register a callback
5996 /// function for recording. TSP calls callback function each time when one of
5997 /// double buffer is full and switch to another buffer to record.\n
5998 /// @ref E_DRVTSP_FLT_TYPE_PVR
5999 /// @attention
6000 /// Callback function resides in OS TSP interrupt context, it recommends
6001 /// that callback function should not take too much time to block the system.
6002 //-------------------------------------------------------------------------------------------------
6003 TSP_Result MDrv_TSP_PVR_Notify(DrvTSP_Event eEvents, P_DrvTSP_EvtCallback pfCallback)
6004 {
6005 #ifndef NO_PVR
6006
6007 _TSP_ENTRY();
6008
6009 if(eEvents & (E_DRVTSP_EVENT_PVRBUF_FULL | E_DRVTSP_EVENT_PVRBUF_OVERFLOW))
6010 {
6011 if (pfCallback)
6012 {
6013 _TSP_SetPvrNotifyId(0);
6014 HAL_TSP_Int_Enable(TSP_HWINT_HW_PVR_MASK);
6015 }
6016 else
6017 {
6018 _TSP_RemovePvrNotifyId(0);
6019 HAL_TSP_Int_Disable(TSP_HWINT_HW_PVR_MASK);
6020 }
6021 _ptsp_res->_PvrEvtNotify[0] = eEvents & (E_DRVTSP_EVENT_PVRBUF_FULL | E_DRVTSP_EVENT_PVRBUF_OVERFLOW);
6022 _ptsp_res->_PvrCallback[0] = pfCallback;
6023 }
6024
6025 #ifdef TS2_IF_SUPPORT
6026 if(eEvents & (E_DRVTSP_EVENT_CBBUF_FULL | E_DRVTSP_EVENT_CBBUF_OVERFLOW))
6027 {
6028 if (pfCallback)
6029 {
6030 _TSP_SetPvrNotifyId(1);
6031 HAL_TSP_Int2_Enable(TSP_HWINT2_HW_PVR1_MASK);
6032 }
6033 else
6034 {
6035 _TSP_RemovePvrNotifyId(1);
6036 HAL_TSP_Int2_Disable((TSP_HWINT2_HW_PVR1_MASK));
6037 }
6038 _ptsp_res->_PvrEvtNotify[1] = eEvents & (E_DRVTSP_EVENT_CBBUF_FULL | E_DRVTSP_EVENT_CBBUF_OVERFLOW);
6039 _ptsp_res->_PvrCallback[1] = pfCallback;
6040 }
6041 #endif
6042
6043 _TSP_RETURN(DRVTSP_OK);
6044
6045 #else
6046 return DRVTSP_NOT_SUPPORTED;
6047 #endif //udef NO_PVR
6048 }
6049
6050
6051 TSP_Result MDrv_TSP_PVR_SetPacketMode(MS_BOOL bSet)
6052 {
6053 #ifndef NO_PVR
6054
6055 _TSP_ENTRY();
6056 HAL_TSP_PVR_PacketMode(bSet);
6057 _TSP_RETURN(DRVTSP_OK);
6058
6059 #else
6060 return DRVTSP_NOT_SUPPORTED;
6061 #endif //udef NO_PVR
6062 }
6063
6064
6065 //-------------------------------------------------------------------------------------------------
6066 /// PVR time stamp set
6067 /// @param u32Stamp \b IN: PVR time stamp
6068 /// @return TSP_Result
6069 //-------------------------------------------------------------------------------------------------
6070 TSP_Result MDrv_TSP_PVR_TimeStampSetRecordStamp(MS_U32 u32Stamp)
6071 {
6072 #ifndef NO_PVR
6073
6074 _TSP_ENTRY();
6075 HAL_TSP_SetPVRTimeStamp(u32Stamp);
6076 _TSP_RETURN(DRVTSP_OK);
6077
6078 #else
6079 return DRVTSP_NOT_SUPPORTED;
6080 #endif //udef NO_PVR
6081
6082 }
6083
6084
6085 //-------------------------------------------------------------------------------------------------
6086 /// PVR time stamp get
6087 /// @param pu32Stamp \b OUT: pointer of PVR time stamp
6088 /// @return TSP_Result
6089 //-------------------------------------------------------------------------------------------------
6090 TSP_Result MDrv_TSP_PVR_TimeStampGetRecordStamp(MS_U32* u32Stamp)
6091 {
6092 #ifndef NO_PVR
6093
6094 _TSP_ENTRY();
6095 *u32Stamp = HAL_TSP_GetPVRTimeStamp();
6096 _TSP_RETURN(DRVTSP_OK);
6097
6098 #else
6099 return DRVTSP_NOT_SUPPORTED;
6100 #endif //udef NO_PVR
6101 }
6102
6103
6104 //-------------------------------------------------------------------------------------------------
6105 /// Playback time stamp Set
6106 /// @param pu32Stamp \b IN: Playback time stamp
6107 /// @return TSP_Result
6108 //-------------------------------------------------------------------------------------------------
6109 TSP_Result MDrv_TSP_PVR_TimeStampSetPlaybackStamp(MS_U32 u32Stamp)
6110 {
6111 #ifndef NO_PVR
6112
6113 _TSP_ENTRY();
6114 HAL_TSP_SetPlayBackTimeStamp(u32Stamp);
6115 _TSP_RETURN(DRVTSP_OK);
6116
6117 #else
6118 return DRVTSP_NOT_SUPPORTED;
6119 #endif //udef NO_PVR
6120 }
6121
6122
6123 //-------------------------------------------------------------------------------------------------
6124 /// Playback time stamp get
6125 /// @param pu32Stamp \b OUT: pointer of Playback time stamp
6126 /// @return TSP_Result
6127 //-------------------------------------------------------------------------------------------------
6128 TSP_Result MDrv_TSP_PVR_TimeStampGetPlaybackStamp(MS_U32* u32Stamp)
6129 {
6130 #ifndef NO_PVR
6131
6132 _TSP_ENTRY();
6133 * u32Stamp = HAL_TSP_GetPlayBackTimeStamp();
6134 _TSP_RETURN(DRVTSP_OK);
6135
6136 #else
6137 return DRVTSP_NOT_SUPPORTED;
6138 #endif //udef NO_PVR
6139
6140 }
6141
6142
6143 //-------------------------------------------------------------------------------------------------
6144 /// PVR time stamp Enable/Disable
6145 /// @param pu32Stamp \b IN: Enable/Disable time stamp
6146 /// @return TSP_Result
6147 //-------------------------------------------------------------------------------------------------
6148 TSP_Result MDrv_TSP_PVR_TimeStamp(MS_BOOL bEnable)
6149 {
6150 #ifndef NO_PVR
6151
6152 _TSP_ENTRY();
6153 if (bEnable)
6154 {
6155 HAL_TSP_FileIn_Set(TRUE);
6156 //HAL_TSP_ResetTimeStamp();
6157 }
6158 else
6159 {
6160 HAL_TSP_FileIn_Set(FALSE);
6161 }
6162 _TSP_RETURN(DRVTSP_OK);
6163
6164 #else
6165 return DRVTSP_NOT_SUPPORTED;
6166 #endif //udef NO_PVR
6167 }
6168
6169 //only for debug
6170 TSP_Result MDrv_TSP_PVR_Filein_Enable(MS_BOOL bBypassHD, MS_BOOL bEnable)
6171 {
6172 #ifndef NO_PVR
6173
6174 HAL_TSP_PVR_Filein_Enable(bBypassHD, bEnable, FALSE);
6175
6176 return DRVTSP_OK;
6177
6178 #else
6179 return DRVTSP_NOT_SUPPORTED;
6180 #endif //udef NO_PVR
6181 }
6182
6183 //PVRCA API
6184 // If PVRCA PID open, reserved FLT1 for recording, beforehand for PVRCA start. (PVR1FLT_CAPVR)
6185 // If PVRCA PID close, reserved FLT1 for release FLT1, beforehand for PVRCA stop. (PVR1FLT_CA)
6186 TSP_Result MDrv_TSP_PVR_PidFlt_Reserved(MS_U32 Pid, MS_U8* pu8DmxId, MS_BOOL bReserved)
6187 {
6188 #ifndef NO_CA
6189
6190 MS_U32 u32ii = (MS_U32)(*pu8DmxId & 0xFF) ;
6191 MS_U32 u32mask = 0;
6192 MS_BOOL bFound = FALSE;
6193
6194 _TSP_ENTRY();
6195
6196 if(!bReserved)
6197 {
6198 TSP_ASSERT2(TSP_SECFLT_NUM <= *pu8DmxId, TSP_DBG("[TSP_ERROR][%06d] Bad DMX ID %d\n", __LINE__, (int)(*pu8DmxId)));
6199 TSP_ASSERT2((TSP_SECFLT_NUM + TSP_PIDFLT1_NUM) > *pu8DmxId, TSP_DBG("[TSP_ERROR][%06d] Bad DMX ID %d\n", __LINE__, (int)(*pu8DmxId)));
6200
6201 HAL_TSP_PidFlt_SelFltOutput(HAL_TSP_GetPidFltReg(0, u32ii), TSP_PIDFLT_OUT_NONE);
6202
6203 u32mask = 1 << (u32ii - TSP_SECFLT_NUM); //bit flag
6204 if((_ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef & u32mask) == 0)
6205 {
6206 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(0, u32ii), DRVTSP_PID_NULL);
6207 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii - TSP_SECFLT_NUM] = DRVTSP_PID_NULL;
6208 }
6209 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR &= ~u32mask;
6210
6211 PVRCA_DBG(ULOGD("TSP", "[%s] Unreserved FLT %ld _u32Flt1Flag_DscmbPVR 0x%lx, _u32Flt1Flag_DscmbRef %lx \n", \
6212 __FUNCTION__, u32ii, _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR, _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef));
6213 PVRCA_DBG(ULOGD("TSP", "_u16Flt1PidList %x , _u16Flt0DscmbPidList %x \n", \
6214 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii - TSP_SECFLT_NUM], _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii - TSP_SECFLT_NUM]));
6215 _TSP_RETURN(DRVTSP_OK);
6216 }
6217 else
6218 {
6219 *pu8DmxId = 0xFF;
6220 }
6221
6222 //checking, if PVR pid is set, use the filter for record directly
6223 for(u32ii = 0; u32ii < TSP_PIDFLT1_NUM; u32ii++)
6224 {
6225 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] == Pid)
6226 {
6227 bFound = TRUE;
6228 break;
6229 }
6230 }
6231
6232 //finding free PVR1 filters for recording
6233 if(bFound == FALSE)
6234 {
6235 for(u32ii = 0; u32ii < TSP_PIDFLT1_NUM; u32ii++)
6236 {
6237 if(_ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] == DRVTSP_PID_NULL)
6238 {
6239 //set new pid for dscmb pvr
6240 HAL_TSP_PidFlt_SetPid(HAL_TSP_GetPidFltReg(0, u32ii+TSP_SECFLT_NUM), Pid);
6241 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii] = Pid;
6242 bFound = TRUE;
6243 break;
6244 }
6245 }
6246 }
6247
6248 if(bFound == FALSE)
6249 {
6250 _TSP_RETURN(DRVTSP_FAIL);
6251 }
6252
6253 _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR |= (1 << u32ii);
6254 *pu8DmxId = (MS_U8)(u32ii & 0xFF)+TSP_SECFLT_NUM;
6255
6256 PVRCA_DBG(ULOGD("TSP", "[%s] FLT %ld PID 0x%lx, _u32Flt1Flag_DscmbPVR 0x%lx\n", __FUNCTION__, u32ii, Pid, _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR));
6257 PVRCA_DBG(ULOGD("TSP", "_u32Flt1Flag_DscmbRef %lx, _u16Flt1PidList %x , _u16Flt0DscmbPidList %x \n", _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbRef, \
6258 _ptsp_res->TSPPvrcaParams._u16Flt1PidList[u32ii], _ptsp_res->TSPPvrcaParams._u16Flt0DscmbPidList[u32ii]));
6259
6260 if(_ptsp_res->TSPPvrcaParams._bPVRCA_Start)
6261 {
6262 HAL_TSP_PidFlt_SelFltOutput(HAL_TSP_GetPidFltReg(0, (MS_U32)(*pu8DmxId & 0xFF)), TSP_PIDFLT_OUT_SECFLT);
6263 }
6264
6265 _TSP_RETURN(DRVTSP_OK);
6266
6267 #else
6268 return DRVTSP_NOT_SUPPORTED;
6269 #endif //udef NO_PVR
6270 }
6271
6272 TSP_Result MDrv_TSP_PVR_FLT1_StartRec(MS_BOOL bEnable)
6273 {
6274 #ifndef NO_CA
6275
6276 MS_U8 u32ii;
6277 MS_U32 u32Output;
6278 MS_U32 u32mask = _ptsp_res->TSPPvrcaParams._u32Flt1Flag_DscmbPVR;
6279
6280 _TSP_ENTRY();
6281
6282 u32Output = TSP_PIDFLT_OUT_NONE;
6283
6284 if(bEnable)
6285 {
6286 u32Output = TSP_PIDFLT_OUT_SECFLT;
6287 }
6288
6289 for(u32ii = 0; u32ii < TSP_PIDFLT1_NUM; u32ii++)
6290 {
6291 if(u32mask & 0x01)
6292 {
6293 HAL_TSP_PidFlt_SelFltOutput(HAL_TSP_GetPidFltReg(0, (u32ii+TSP_SECFLT_NUM)), u32Output);
6294 //_bPVRFLT_Opened_Flag[u32ii] = bEnable;
6295 }
6296 u32mask >>= 1;
6297 }
6298
6299 _TSP_RETURN(DRVTSP_OK);
6300
6301 #else
6302 return DRVTSP_NOT_SUPPORTED;
6303 #endif //udef NO_PVR
6304 }
6305
6306 TSP_Result MDrv_TSP_PVRCA_Close(MS_U8 u8PVRId)
6307 {
6308 #ifndef NO_CA
6309 MS_U32 u32CaCtrl = 0;
6310
6311 if(u8PVRId >= TSP_PVR_IF_NUM)
6312 return DRVTSP_FAIL;
6313
6314 _TSP_ENTRY();
6315
6316 u32CaCtrl = HAL_TSP_CSA_Get_ScrmPath();
6317 if(u8PVRId == 0)
6318 {
6319 if(u32CaCtrl & TSP_CA_OUTPUT_REC)
6320 {
6321 if(_ptsp_res->TSPPvrcaParams._bFLT1Dup_Enable == TRUE)
6322 {
6323 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF0_LIVEIN|TSP_CA_OUTPUT_PLAY_LIVE);
6324 HAL_TSP_TSIF1_Enable(FALSE);
6325 _TSP_Free_AllFLT1();
6326 }
6327 else
6328 {
6329 HAL_TSP_CSA_Set_ScrmPath(_ptsp_res->_u32OrgCAMode);
6330 }
6331 }
6332 }
6333 #ifdef TS2_LIVE_SUPPORT
6334 else if(u8PVRId == 1)
6335 {
6336 //input source is TS0, Just remove TS2 record, when PVR stop
6337 //input source is TS0, Just remove TS2 record, when PVR stop
6338 if((u32CaCtrl & (TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2)) == (TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2))
6339 {
6340 _TSP_FreeDupDscmbPidFlt(0, 2, u32CaCtrl);
6341 HAL_TSP_CSA_Set_ScrmPath(u32CaCtrl & ~TSP_CA_OUTPUT_PLAY_LIVE2);
6342 }
6343 }
6344 #endif
6345
6346 _TSP_RETURN(DRVTSP_OK);
6347 #else
6348 return DRVTSP_NOT_SUPPORTED;
6349 #endif //udef NO_PVR
6350 }
6351
6352 // Channel Browser API
6353 //-------------------------------------------------------------------------------------------------
6354 /// Set Channel Browser record buffer start addresses and buffer size
6355 /// @param u8PVRId \b IN:PVR ID
6356 /// @param phyBufStart0 \b IN: start address of PVR buffer 0
6357 /// @param phyBufStart1 \b IN: start address of PVR buffer 1
6358 /// @param u32BufSize0 \b IN: size of PVR buffer 0
6359 /// @param u32BufSize1 \b IN: size of PVR buffer 1
6360 /// @return TSP_Result
6361 /// @note: PVR1 only has single buffer
6362 /// Buffer start address and size should be 128-bit (16-byte) aligned\n
6363 /// The maximum support size is 0xFFFF0 (1048560 bytes).
6364 /// @sa MDrv_TSP_PVR_Notify
6365 //-------------------------------------------------------------------------------------------------
6366 TSP_Result MDrv_TSP_PVR_Eng_SetBuffer(MS_U8 u8PVRId, MS_PHY phyBufStart0, MS_PHY phyBufStart1, MS_U32 u32BufSize0, MS_U32 u32BufSize1)
6367 {
6368 #ifndef NO_PVR
6369
6370 switch(u8PVRId)
6371 {
6372 case 0:
6373 return (MDrv_TSP_PVR_SetBuffer(phyBufStart0, phyBufStart1, u32BufSize0, u32BufSize1));
6374
6375 #ifdef TS2_IF_SUPPORT
6376 case 1:
6377 _TSP_ENTRY();
6378 #ifndef TS2_LIVE_SUPPORT
6379 if((u32BufSize1 > 0) && ((phyBufStart0 + u32BufSize0) == phyBufStart1))
6380 u32BufSize0 += u32BufSize1;
6381 #endif
6382 HAL_TSP_PVR1_SetBuffer((MS_U32)phyBufStart0, u32BufSize0, (MS_U32)phyBufStart1, u32BufSize1);
6383
6384 _TSP_RETURN(DRVTSP_OK);
6385 #endif
6386
6387 default:
6388 return (DRVTSP_NOT_SUPPORTED);
6389 }
6390
6391 #else
6392 return DRVTSP_NOT_SUPPORTED;
6393 #endif //udef NO_PVR
6394
6395 }
6396
6397 //-------------------------------------------------------------------------------------------------
6398 /// Set Channel Browser record mode and START/STOP recording.
6399 /// @param u8PVRId \b IN:PVR ID
6400 /// @param eRecMode \b IN: mode of recording
6401 /// @param bStart \b IN: TRUE(START), FALSE(STOP)
6402 /// @return TSP_Result
6403 /// @note
6404 /// Parameter eRecMode will be ignored when bStart is FALSE(STOP)\n
6405 /// @note
6406 /// It's a synchronous function. When STOP, it flushs internal record fifo
6407 /// and update current PVR record buffer write address before function return.\n
6408 /// User can call MDrv_TSP_PVR1_GetWriteAddr to get the final valid data address
6409 /// after recording.
6410 //-------------------------------------------------------------------------------------------------
6411 TSP_Result MDrv_TSP_PVR_Eng_Start(MS_U8 u8PVRId, DrvTSP_RecMode eRecMode, MS_BOOL bStart)
6412 {
6413 #ifndef NO_PVR
6414
6415 if(u8PVRId == 0)
6416 {
6417 return (MDrv_TSP_PVR_Start(eRecMode, bStart));
6418 }
6419 #ifdef TS2_IF_SUPPORT
6420 if(u8PVRId == 1)
6421 {
6422 _TSP_ENTRY();
6423 if (bStart)
6424 {
6425 HAL_TSP_PVR1_WaitFlush();
6426 HAL_TSP_PVR1_All((HAS_FLAG(eRecMode, 0x02))? TRUE: FALSE);
6427 //HAL_TSP_LiveAB_En(TRUE); // set pvr to pidflt0_file
6428 HAL_TSP_PVR1_Enable(TRUE);
6429 }
6430 else
6431 {
6432 //HAL_TSP_LiveAB_En(FALSE); // disable pvr to pidflt0_file
6433 HAL_TSP_PVR1_Enable(FALSE);
6434 HAL_TSP_PVR1_WaitFlush();
6435 }
6436 _TSP_RETURN(DRVTSP_OK);
6437 }
6438 #endif
6439
6440 return (DRVTSP_NOT_SUPPORTED);
6441
6442 #else
6443 return DRVTSP_NOT_SUPPORTED;
6444 #endif //udef NO_PVR
6445
6446 }
6447
6448 //-------------------------------------------------------------------------------------------------
6449 /// Get final write address of Channel Browser record buffer
6450 /// @param u8PVRId \b IN:PVR ID
6451 /// @param pphyWriteAddr \b OUT: pointer of address return
6452 /// @return TSP_Result
6453 /// @note
6454 /// User can get current write address to know where is the end of section data
6455 /// received in the section buffer.
6456 //-------------------------------------------------------------------------------------------------
6457 TSP_Result MDrv_TSP_PVR_Eng_GetWriteAddr(MS_U8 u8PVRId, MS_PHY *pphyWriteAddr)
6458 {
6459 #ifndef NO_PVR
6460
6461 _TSP_ENTRY();
6462
6463 switch(u8PVRId)
6464 {
6465 case 0:
6466 *pphyWriteAddr = HAL_TSP_PVR_GetBufWrite();
6467 break;
6468 #ifdef TS2_IF_SUPPORT
6469 case 1:
6470 *pphyWriteAddr = HAL_TSP_PVR1_GetBufWrite();
6471 break;
6472 #endif
6473 default:
6474 _TSP_RETURN(DRVTSP_NOT_SUPPORTED);
6475 }
6476
6477 _TSP_RETURN(DRVTSP_OK);
6478
6479 #else
6480 return DRVTSP_NOT_SUPPORTED;
6481 #endif //udef NO_PVR
6482 }
6483
6484 //-------------------------------------------------------------------------------------------------
6485 /// Subscribe event notification callback function for Channel Browser record buffer
6486 /// @param u8PVRId \b IN:PVR ID
6487 /// @param eEvents \b IN: events need to be subscribed\n
6488 /// @ref E_DRVTSP_EVENT_CBBUF_FULL
6489 /// @param pfCallback \b IN: callback function (NULL to disable)
6490 /// @return TSP_Result
6491 /// @note
6492 /// TSP Channel Browser recording uses single buffer mechanism. This function register a callback
6493 /// function for recording. TSP calls callback function each time when one of
6494 /// single buffer is full and ring to buffer start to record.\n
6495 /// @ref E_DRVTSP_FLT_TYPE_CB
6496 /// @attention
6497 /// Callback function resides in OS TSP interrupt context, it recommends
6498 /// that callback function should not take too much time to block the system.
6499 //-------------------------------------------------------------------------------------------------
6500 TSP_Result MDrv_TSP_PVR_Eng_Notify(MS_U8 u8PVRId, DrvTSP_Event eEvents, P_DrvTSP_EvtCallback pfCallback)
6501 {
6502 #ifndef NO_PVR
6503
6504 return (MDrv_TSP_PVR_Notify(eEvents, pfCallback));
6505
6506 #else
6507 return DRVTSP_NOT_SUPPORTED;
6508 #endif //udef NO_PVR
6509
6510 }
6511
6512 TSP_Result MDrv_TSP_PVR_Eng_SetPacketMode(MS_U8 u8PVRId, MS_BOOL bSet)
6513 {
6514 #ifndef NO_PVR
6515
6516 switch(u8PVRId)
6517 {
6518 case 0:
6519 return (MDrv_TSP_PVR_SetPacketMode(bSet));
6520 #ifdef TS2_IF_SUPPORT
6521 case 1:
6522 _TSP_ENTRY();
6523 HAL_TSP_PVR1_PacketMode(bSet);
6524 _TSP_RETURN(DRVTSP_OK);
6525 #endif
6526 default:
6527 return (DRVTSP_NOT_SUPPORTED);
6528 }
6529
6530 #else
6531 return DRVTSP_NOT_SUPPORTED;
6532 #endif //udef NO_PVR
6533 }
6534
6535 //-------------------------------------------------------------------------------------------------
6536 /// Channel Browser time stamp set
6537 /// @param u8PVRId \b IN:PVR ID
6538 /// @param u32Stamp \b IN: Channel Browser time stamp
6539 /// @return TSP_Result
6540 //-------------------------------------------------------------------------------------------------
6541 TSP_Result MDrv_TSP_PVR_Eng_TimeStampSetRecordStamp(MS_U8 u8PVRId, MS_U32 u32Stamp)
6542 {
6543 #ifndef NO_PVR
6544
6545 switch(u8PVRId)
6546 {
6547 case 0:
6548 return (MDrv_TSP_PVR_TimeStampSetRecordStamp(u32Stamp));
6549 #ifdef TS2_IF_SUPPORT
6550 case 1:
6551 _TSP_ENTRY();
6552 HAL_TSP_SetPVR1TimeStamp(u32Stamp);
6553 _TSP_RETURN(DRVTSP_OK);
6554 #endif
6555 default:
6556 return (DRVTSP_NOT_SUPPORTED);
6557 }
6558
6559 #else
6560 return DRVTSP_NOT_SUPPORTED;
6561 #endif //udef NO_PVR
6562 }
6563
6564 //-------------------------------------------------------------------------------------------------
6565 /// Channel Browser time stamp get
6566 /// @param u8PVRId \b IN:PVR ID
6567 /// @param pu32Stamp \b OUT: pointer of Channel Browser time stamp
6568 /// @return TSP_Result
6569 //-------------------------------------------------------------------------------------------------
6570 TSP_Result MDrv_TSP_PVR_Eng_TimeStampGetRecordStamp(MS_U8 u8PVRId, MS_U32* u32Stamp)
6571 {
6572 #ifndef NO_PVR
6573
6574 switch(u8PVRId)
6575 {
6576 case 0:
6577 return (MDrv_TSP_PVR_TimeStampGetRecordStamp(u32Stamp));
6578 #ifdef TS2_IF_SUPPORT
6579 case 1:
6580 _TSP_ENTRY();
6581 *u32Stamp = HAL_TSP_GetPVR1TimeStamp();
6582 _TSP_RETURN(DRVTSP_OK);
6583 #endif
6584 default:
6585 return (DRVTSP_NOT_SUPPORTED);
6586 }
6587
6588 #else
6589 return DRVTSP_NOT_SUPPORTED;
6590 #endif //udef NO_PVR
6591 }
6592
6593 //-------------------------------------------------------------------------------------------------
6594 /// Playback time stamp clock set
6595 /// @param u8EngId \b IN:playback ID
6596 /// @param eClk \b IN: clock source type
6597 /// @return TSP_Result
6598 //-------------------------------------------------------------------------------------------------
6599 TSP_Result MDrv_TSP_PVR_Eng_SetPlaybackStampClk(MS_U32 u32EngId, MS_U32 u32Clk)
6600 {
6601 #ifndef NO_PVR
6602 _TSP_ENTRY();
6603 if(HAL_TSP_SetPlayBackTimeStampClk(u32EngId, u32Clk))
6604 {
6605 _TSP_RETURN(DRVTSP_OK);
6606 }
6607 else
6608 {
6609 _TSP_RETURN(DRVTSP_FAIL);
6610 }
6611 #else
6612 return DRVTSP_NOT_SUPPORTED;
6613 #endif //udef NO_PVR
6614 }
6615
6616 //-------------------------------------------------------------------------------------------------
6617 /// PVR time stamp clock set
6618 /// @param u8PvrId \b IN:PVR ID
6619 /// @param eClk \b IN: clock source type
6620 /// @return TSP_Result
6621 //-------------------------------------------------------------------------------------------------
6622 TSP_Result MDrv_TSP_PVR_Eng_SetRecordStampClk(MS_U32 u32PvrId, MS_U32 u32Clk)
6623 {
6624 #ifndef NO_PVR
6625 _TSP_ENTRY();
6626 if(HAL_TSP_SetPVRTimeStampClk(u32PvrId, u32Clk))
6627 {
6628 _TSP_RETURN(DRVTSP_OK);
6629 }
6630 else
6631 {
6632 _TSP_RETURN(DRVTSP_FAIL);
6633 }
6634
6635 #else
6636 return DRVTSP_NOT_SUPPORTED;
6637 #endif //udef NO_PVR
6638 }
6639
6640 //-------------------------------------------------------------------------------------------------
6641 /// Check if PVR Engine is started
6642 /// @param u8PvrId \b IN:PVR ID
6643 /// @param pbIsStart \b OUT: Pointer to store started status
6644 /// @return TSP_Result
6645 //-------------------------------------------------------------------------------------------------
6646 TSP_Result MDrv_TSP_PVR_Eng_IsStart(MS_U32 u32PvrId, MS_BOOL *pbIsStart)
6647 {
6648 if(pbIsStart == NULL)
6649 return DRVTSP_FAIL;
6650
6651 *pbIsStart = HAL_TSP_PVR_Eng_IsEnabled(u32PvrId);
6652
6653 return DRVTSP_OK;
6654 }
6655
6656 // File API
6657 //-------------------------------------------------------------------------------------------------
6658 /// Memory to TSP stream control : Stream start address
6659 /// @param u32StreamAddr \b IN: pointer of transport stream in memory
6660 /// @return TSP_Result
6661 //-------------------------------------------------------------------------------------------------
6662 TSP_Result MDrv_TSP_File_SetAddr(MS_PHY phyStreamAddr)
6663 {
6664 #ifndef NO_FILEIN
6665
6666 _TSP_ENTRY();
6667 HAL_TSP_CmdQ_TsDma_SetAddr(phyStreamAddr);
6668 _TSP_RETURN(DRVTSP_OK);
6669
6670 #else
6671 return DRVTSP_NOT_SUPPORTED;
6672 #endif //udef NO_FILEIN
6673 }
6674
6675
6676 //-------------------------------------------------------------------------------------------------
6677 /// Memory to TSP stream control : Stream data size
6678 /// @param u32StreamSize \b IN: size of transport stream data to be copied
6679 /// @return TSP_Result
6680 // @note u32StreamSize must be larger than 16
6681 //-------------------------------------------------------------------------------------------------
6682 TSP_Result MDrv_TSP_File_SetSize(MS_U32 u32StreamSize)
6683 {
6684 #ifndef NO_FILEIN
6685
6686 if(u32StreamSize <= 16)
6687 {
6688 return DRVTSP_FAIL;
6689 }
6690
6691 _TSP_ENTRY();
6692 if (HAL_TSP_CmdQ_TsDma_SetSize(u32StreamSize))
6693 {
6694 _TSP_RETURN(DRVTSP_OK);
6695 }
6696 else
6697 {
6698 _TSP_RETURN(DRVTSP_FAIL);
6699 }
6700
6701 #else
6702 return DRVTSP_NOT_SUPPORTED;
6703 #endif //udef NO_FILEIN
6704 }
6705
6706
6707 //-------------------------------------------------------------------------------------------------
6708 //[Reserved]
6709 // Memory to TSP stream command : Update Stream STC
6710 // @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
6711 // @param u32STC_32 \b IN: STC[32] for next input stream
6712 // @param u32STC \b IN: STC[31:0] for next input stream
6713 // @return TSP_Result
6714 // @note M2T Command Size: 3
6715 //-------------------------------------------------------------------------------------------------
6716 TSP_Result MDrv_TSP_SetSTC(MS_U32 u32EngId, MS_U32 u32STC_32, MS_U32 u32STC)
6717 {
6718 _TSP_ENTRY();
6719 //[HW TODO][HW LIMIT]
6720 // STC register mapping is different between MCU and CPU.
6721 HAL_TSP_SetSTC(u32EngId, u32STC, u32STC_32);
6722 //HAL_TSP_SetSTC_32(u32EngId, u32STC_32);
6723 _TSP_RETURN(DRVTSP_OK);
6724 }
6725
6726 //-------------------------------------------------------------------------------------------------
6727 /// Add or subtract STC Offset
6728 // @param u32EngId \b IN: index of STC engine
6729 // @param u32Offset \b IN: STC offset value
6730 // @param bAdd \b IN: If TRUE, add the offset value; otherwise subtract the offset value
6731 // @return TSP_Result
6732 //-------------------------------------------------------------------------------------------------
6733 TSP_Result MDrv_TSP_SetSTCOffset(MS_U32 u32EngId, MS_U32 u32Offset, MS_BOOL bAdd)
6734 {
6735 _TSP_ENTRY();
6736 HAL_TSP_SetSTCOffset(u32EngId, u32Offset, bAdd);
6737 _TSP_RETURN(DRVTSP_OK);
6738 }
6739
6740 //-------------------------------------------------------------------------------------------------
6741 /// Memory to TSP stream control : Start stream input
6742 /// @param eM2tMode \b IN: input source control of filein
6743 /// @return TSP_Result
6744 /// @note Filein Command Size: 1
6745 /// @sa MDrv_TSP_GetM2tSlot
6746 //-------------------------------------------------------------------------------------------------
6747 TSP_Result MDrv_TSP_File_Start(DrvTSP_FileinMode eFileinMode)
6748 {
6749 #ifndef NO_FILEIN
6750
6751 _TSP_ENTRY();
6752 // @FIXME: Good to assume enum and register definition identical?
6753 //if (E_DRVTSP_FILEIN_MODE_ENG0_TS != eFileinMode)
6754 {
6755 HAL_TSP_PS_Path_Enable((MS_U32)eFileinMode);
6756 }
6757 HAL_TSP_CmdQ_TsDma_Start((MS_U32)eFileinMode);
6758
6759 HAL_TSP_filein_enable(TRUE); //enable cmdQ after cmds are set
6760
6761 _TSP_RETURN(DRVTSP_OK);
6762
6763 #else
6764 return DRVTSP_NOT_SUPPORTED;
6765 #endif //udef NO_FILEIN
6766 }
6767
6768 //-------------------------------------------------------------------------------------------------
6769 /// Memory to TSP stream control : Stop stream input
6770 /// @return TSP_Result
6771 //-------------------------------------------------------------------------------------------------
6772 TSP_Result MDrv_TSP_File_Stop(void)
6773 {
6774 #ifndef NO_FILEIN
6775
6776 #ifndef NO_CA
6777 MS_U32 u32data;
6778 #endif
6779
6780 _TSP_ENTRY();
6781
6782 HAL_TSP_filein_enable(FALSE);
6783
6784 HAL_TSP_PS_Path_Disable();
6785
6786 if(!_ptsp_res->_bLiveSING_FilePP)
6787 {
6788 HAL_TSP_DoubleBuf_Disable();
6789 }
6790
6791 #ifndef NO_CA
6792 u32data = HAL_TSP_CSA_Get_ScrmPath();
6793 if(u32data & TSP_CA_INPUT_TSIF0_FILEIN)
6794 {
6795 HAL_TSP_CSA_Set_ScrmPath(_ptsp_res->_u32OrgCAMode); //restore original CA Ctrl
6796 }
6797 else
6798 {
6799 if(_ptsp_res->TSPPvrcaParams._bCIPHSSMode)
6800 {
6801 HAL_TSP_CSA_Set_ScrmPath(u32data | TSP_CA_OUTPUT_PLAY_FILE);
6802 HAL_TSP_LiveAB_En(TRUE);
6803 }
6804 else if(_ptsp_res->TSPPvrcaParams._bFLT1Dup_Enable == TRUE || (_ptsp_res->_u32OrgCAMode & TSP_CA_OUTPUT_PLAY_LIVE)) //recover live0 display only in PVRCA flow
6805 {
6806 HAL_TSP_CSA_Set_ScrmPath(u32data | TSP_CA_OUTPUT_PLAY_LIVE);
6807 }
6808 }
6809 #endif
6810
6811 _TSP_RETURN(DRVTSP_OK);
6812
6813 #else
6814 return DRVTSP_NOT_SUPPORTED;
6815 #endif //udef NO_FILEIN
6816 }
6817
6818 //-------------------------------------------------------------------------------------------------
6819 /// Memory to TSP stream control : pause stream input
6820 /// @return TSP_Result
6821 //-------------------------------------------------------------------------------------------------
6822 TSP_Result MDrv_TSP_File_Pause(void)
6823 {
6824 #ifndef NO_FILEIN
6825
6826 _TSP_ENTRY();
6827 HAL_TSP_TsDma_Pause();
6828 _TSP_RETURN(DRVTSP_OK);
6829
6830 #else
6831 return DRVTSP_NOT_SUPPORTED;
6832 #endif //udef NO_FILEIN
6833 }
6834
6835
6836 //-------------------------------------------------------------------------------------------------
6837 /// Memory to TSP stream control : resume stream input
6838 /// @return TSP_Result
6839 //-------------------------------------------------------------------------------------------------
6840 TSP_Result MDrv_TSP_File_Resume(void)
6841 {
6842 #ifndef NO_FILEIN
6843
6844 _TSP_ENTRY();
6845 HAL_TSP_TsDma_Resume();
6846 _TSP_RETURN(DRVTSP_OK);
6847
6848 #else
6849 return DRVTSP_NOT_SUPPORTED;
6850 #endif //udef NO_FILEIN
6851 }
6852
6853
6854 //-------------------------------------------------------------------------------------------------
6855 /// Get current file in state
6856 /// @return DrvTSP_M2tStatus
6857 /// @sa MDrv_TSP_GetM2tSlot
6858 //-------------------------------------------------------------------------------------------------
6859 TSP_Result MDrv_TSP_File_GetState(DrvTSP_FileinState* peFileinState)
6860 {
6861 #ifndef NO_FILEIN
6862
6863 MS_U32 state, cmdcnt;
6864
6865 _TSP_ENTRY();
6866
6867 state = HAL_TSP_CmdQ_TsDma_GetState();
6868 cmdcnt = HAL_TSP_CmdQ_CmdCount();
6869
6870 if (state & TSP_CTRL1_FILEIN_PAUSE)
6871 {
6872 *peFileinState = E_DRVTSP_FILEIN_STATE_PAUSE;
6873 }
6874 else if ((state & TSP_TSDMA_CTRL_START) || cmdcnt)
6875 {
6876 *peFileinState = E_DRVTSP_FILEIN_STATE_BUSY;
6877 }
6878 else
6879 {
6880 *peFileinState = E_DRVTSP_FILEIN_STATE_IDLE;
6881 }
6882 _TSP_RETURN(DRVTSP_OK);
6883
6884 #else
6885 return DRVTSP_NOT_SUPPORTED;
6886 #endif //udef NO_FILEIN
6887 }
6888
6889
6890 //-------------------------------------------------------------------------------------------------
6891 /// Set Memory to TSP Stream Input Rate
6892 /// @param u32Div2 \b IN: Divider of M2T stream input rate ([1 .. 31], default 10)
6893 /// @return TSP_Result
6894 /// @note
6895 /// <b>input_rate = stream_rate / (u32Div2 * 2)</b>\n
6896 /// @note
6897 /// It's not recommend to change input rate at run-time, because it conflict with
6898 /// the internal stream synchornization mechanism.
6899 /// @sa MDrv_TSP_GetM2tSlot
6900 //-------------------------------------------------------------------------------------------------
6901 TSP_Result MDrv_TSP_File_SetRate(MS_U32 u32Div2)
6902 {
6903 #ifndef NO_FILEIN
6904
6905 _TSP_ENTRY();
6906
6907 //[HW TODO][HW LIMIT]
6908 // TsDma pause can be access by TSP CPU
6909 // TsDma pause it's hard to control because read/write in different register
6910 // When setting TsDma it should be disable interrupt to prevent ISR access
6911 // but it still can't prevent TSP_cpu access at the same time.
6912 //[SW PATCH] Add a special firmware command to lock TSP_cpu DMA pause/resume.
6913
6914 OSAL_TSP_IntDisable();
6915 HAL_TSP_TsDma_SetDelay(u32Div2);
6916 OSAL_TSP_IntEnable();
6917
6918 _TSP_RETURN(DRVTSP_OK);
6919
6920 #else
6921 return DRVTSP_NOT_SUPPORTED;
6922 #endif //udef NO_FILEIN
6923 }
6924
6925
6926 //-------------------------------------------------------------------------------------------------
6927 /// Set packet size to TSP file
6928 /// @param PacketMode \b IN: Mode of TSP file packet mode (192, 204, 188)
6929 /// @return TSP_Result
6930 /// @note
6931 //-------------------------------------------------------------------------------------------------
6932 TSP_Result MDrv_TSP_File_SetPacketMode(DrvTSP_PacketMode PKT_Mode)
6933 {
6934 #ifndef NO_FILEIN
6935
6936 _TSP_ENTRY();
6937
6938 HAL_TSP_filein_enable(FALSE); //disable cmdQ before cmds are set
6939
6940 switch (PKT_Mode)
6941 {
6942 case E_DRVTSP_PKTMODE_188:
6943 HAL_TSP_SetPKTSize(0xBB);
6944 break;
6945 case E_DRVTSP_PKTMODE_192:
6946 HAL_TSP_SetPKTSize(0xBF);
6947 break;
6948 case E_DRVTSP_PKTMODE_204:
6949 HAL_TSP_SetPKTSize(0xCB);
6950 break;
6951 case E_DRVTSP_PKTMODE_130:
6952 HAL_TSP_SetPKTSize(0x82);
6953 break;
6954 case E_DRVTSP_PKTMODE_134:
6955 HAL_TSP_SetPKTSize(0x86);
6956 break;
6957 default:
6958 break;
6959 }
6960
6961 HAL_TSP_PS_Path_Disable();
6962
6963 _TSP_RETURN(DRVTSP_OK);
6964
6965 #else
6966 return DRVTSP_NOT_SUPPORTED;
6967 #endif //udef NO_FILEIN
6968 }
6969
6970
6971 //-------------------------------------------------------------------------------------------------
6972 /// Get the number of empty slot of M2T command
6973 /// @param pu32EmptySlot \b OUT: pointer of empty slot count return
6974 /// @return TSP_Result
6975 /// @note
6976 /// M2T is a command queue command, it can be queued by TSP when another M2T command
6977 /// is executing by TSP. The queued commands will be executed by order (FIFO)
6978 /// when previous M2T command execution is finished.
6979 /// @note
6980 /// User should call GetM2TSlot to make sure there is enough empty M2T command slot
6981 /// before sending any M2T command. (Each command has different command size)
6982 /// @sa MDrv_TSP_M2T_SetAddr, MDrv_TSP_M2T_SetSize, MDrv_TSP_M2T_Start,
6983 //[Reserved] MDrv_TSP_M2T_SetSTC
6984 //-------------------------------------------------------------------------------------------------
6985 TSP_Result MDrv_TSP_File_CMDQ_GetSlot(MS_U32 *pu32EmptySlot)
6986 {
6987 #ifndef NO_FILEIN
6988
6989 _TSP_ENTRY();
6990 *pu32EmptySlot = HAL_TSP_CmdQ_EmptyCount();
6991 _TSP_RETURN(DRVTSP_OK);
6992
6993 #else
6994 return DRVTSP_NOT_SUPPORTED;
6995 #endif //udef NO_FILEIN
6996 }
6997
6998 //-------------------------------------------------------------------------------------------------
6999 /// Reset command queue
7000 /// @return TSP_Result
7001 /// @note
7002 /// SW patch--wait command queue empty
7003 /// wait HW ECO
7004 //-------------------------------------------------------------------------------------------------
7005 TSP_Result MDrv_TSP_File_CMDQ_Reset(void)
7006 {
7007 #ifndef NO_FILEIN
7008
7009 MS_BOOL bRet;
7010
7011 _TSP_ENTRY();
7012 bRet = HAL_TSP_CmdQ_Reset();
7013 if (TRUE == bRet)
7014 {
7015 _TSP_RETURN(DRVTSP_OK);
7016 }
7017 _TSP_RETURN(DRVTSP_FAIL);
7018
7019 #else
7020 return DRVTSP_NOT_SUPPORTED;
7021 #endif //udef NO_FILEIN
7022 }
7023
7024 //--------------------------------------------------------------------------------------------------
7025 /// Get command queue fifo level
7026 /// @param pu8FifoLevel \b OUT: fifo level, 0~3
7027 /// @return TSP_Result
7028 /// @note
7029 //--------------------------------------------------------------------------------------------------
7030 TSP_Result MDrv_TSP_CmdQFifo_Status(MS_U8 *pu8FifoLevel)
7031 {
7032 #ifndef NO_FILEIN
7033
7034 _TSP_ENTRY();
7035
7036 *pu8FifoLevel = HAL_TSP_Get_CmdQFifoLevel();
7037
7038 _TSP_RETURN(DRVTSP_OK);
7039
7040 #else
7041 return DRVTSP_NOT_SUPPORTED;
7042 #endif //udef NO_FILEIN
7043 }
7044
7045 //-------------------------------------------------------------------------------------------------
7046 /// Enable timestamp block scheme
7047 /// @return TSP_Result
7048 /// @note
7049 //-------------------------------------------------------------------------------------------------
7050 TSP_Result MDrv_TSP_File_192BlockScheme_En(MS_BOOL bEnable)
7051 {
7052 #ifndef NO_FILEIN
7053
7054 _TSP_ENTRY();
7055 HAL_TSP_FileIn_192BlockScheme_En(bEnable);
7056 _TSP_RETURN(DRVTSP_OK);
7057
7058 #else
7059 return DRVTSP_NOT_SUPPORTED;
7060 #endif //udef NO_FILEIN
7061 }
7062
7063 //-------------------------------------------------------------------------------------------------
7064 /// Enable PS path
7065 /// @param eM2tMode \b IN: input source control of filein
7066 /// @return TSP_Result
7067 //-------------------------------------------------------------------------------------------------
7068 TSP_Result MDrv_TSP_File_PS_Path_Enable(DrvTSP_FileinMode eFileinMode)
7069 {
7070 #ifndef NO_FILEIN
7071
7072 _TSP_ENTRY();
7073 HAL_TSP_PS_Path_Enable((MS_U32)eFileinMode);
7074 _TSP_RETURN(DRVTSP_OK);
7075
7076 #else
7077 return DRVTSP_NOT_SUPPORTED;
7078 #endif //udef NO_FILEIN
7079 }
7080
7081 //-------------------------------------------------------------------------------------------------
7082 /// Enable PS path
7083 /// @param pu32ReadAddr \b OUT: Pointer to store file-in current reand pointer
7084 /// @return TSP_Result
7085 //-------------------------------------------------------------------------------------------------
7086 TSP_Result MDrv_TSP_File_GetReadAddr(MS_PHY *pphyReadAddr)
7087 {
7088 #ifndef NO_FILEIN
7089 _TSP_ENTRY();
7090 if(!HAL_TSP_GetFilinReadAddr(pphyReadAddr))
7091 {
7092 _TSP_RETURN(DRVTSP_NOT_SUPPORTED);
7093 }
7094 _TSP_RETURN(DRVTSP_OK);
7095 #else
7096 return DRVTSP_NOT_SUPPORTED;
7097 #endif //udef NO_FILEIN
7098 }
7099
7100 // Legacy
7101 //-------------------------------------------------------------------------------------------------
7102 /// Get Scmb states
7103 /// @param u32EngId \b IN: index of TSP engine [ 0 .. (@ref DRVTSP_ENGINE_NUM-1) ]
7104 /// @param pScmbLevel \b IN: TS interface setting
7105 /// @return TSP_Result
7106 /// @note
7107 //-------------------------------------------------------------------------------------------------
7108 TSP_Result MDrv_TSP_Scmb_Status(MS_U32 u32EngId, DrvTSP_Scmb_Level* pScmbLevel)
7109 {
7110 _TSP_ENTRY();
7111 *pScmbLevel= E_DRVTSP_SCMB_NONE;
7112
7113 if (HAL_TSP_Scmb_Status(0, 0, 0xFFFFFFFF) || HAL_TSP_Scmb_Status(1, 0, 0xFFFFFFFF)
7114 || HAL_TSP_Scmb_Status(0, 1, 0xFFFFFFFF) || HAL_TSP_Scmb_Status(1, 1, 0xFFFFFFFF))
7115 {
7116 *pScmbLevel= E_DRVTSP_SCMB_TS;
7117 }
7118 _TSP_RETURN(DRVTSP_OK);
7119 }
7120
7121 //-------------------------------------------------------------------------------------------------
7122 /// Get/Set Dscrambling path
7123 /// @param u32EngId \b IN: index of DSCMB engine
7124 /// @param pScmbPath \b IN: pointer to store dscmb path
7125 /// @param bSet \b IN: If TURE, setting scmb pathl if false, getting scmb path
7126 /// @return TSP_Result
7127 /// @note
7128 //-------------------------------------------------------------------------------------------------
7129 TSP_Result MDrv_TSP_Dscmb_Path(MS_U32 u32EngId, DrvTSP_DscmbCtrl *pScmbPath, MS_BOOL bSet)
7130 {
7131 MS_U32 u32ii = 0;
7132 MS_BOOL bFlt0DupOld = FALSE, bFlt0DupNew = FALSE, bFlt2DupOld = FALSE, bFlt2DupNew = FALSE;
7133
7134 if(u32EngId > 0)
7135 {
7136 return DRVTSP_FAIL;
7137 }
7138
7139 _TSP_ENTRY();
7140
7141 if(bSet == FALSE)
7142 {
7143 *pScmbPath = (DrvTSP_DscmbCtrl)HAL_TSP_CSA_Get_ScrmPath();
7144 }
7145 else
7146 {
7147 _ptsp_res->_u32OrgCAMode = HAL_TSP_CSA_Get_ScrmPath(); //record old CA Ctrl mode
7148
7149 bFlt0DupOld = ((_ptsp_res->_u32OrgCAMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE));
7150 bFlt0DupNew = ((*pScmbPath & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE));
7151 if((_ptsp_res->_u32OrgCAMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_REC)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_REC))
7152 bFlt0DupOld = TRUE;
7153 #ifdef TS2_LIVE_SUPPORT
7154 bFlt2DupOld = ((_ptsp_res->_u32OrgCAMode & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_PLAY_LIVE2)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2));
7155 bFlt2DupNew = ((*pScmbPath & (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE|TSP_CA_OUTPUT_PLAY_LIVE2)) == (TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE2));
7156 #endif
7157
7158 if((bFlt0DupOld == TRUE) && (bFlt0DupNew == FALSE))
7159 {
7160 _TSP_FreeDupDscmbPidFlt(u32EngId, 0, _ptsp_res->_u32OrgCAMode);
7161 }
7162 if((bFlt2DupOld == TRUE) && (bFlt2DupNew == FALSE))
7163 {
7164 _TSP_FreeDupDscmbPidFlt(u32EngId, 2, _ptsp_res->_u32OrgCAMode);
7165 }
7166
7167 //duplicateFLT 0 to FLT1
7168 if(bFlt0DupNew)
7169 {
7170 for(u32ii = DSCMB_FLT_START_ID; u32ii <= DSCMB_FLT_END_ID; u32ii++)
7171 {
7172 _TSP_DupDscmbPidFlt(u32EngId, u32ii, TSP_SECFLT_NUM+u32ii-DSCMB_FLT_START_ID);
7173 }
7174 #ifdef EXT_PVR1_FLT
7175 for(u32ii = DSCMB_FLT_SHAREKEY_START_ID; u32ii <= DSCMB_FLT_SHAREKEY_END_ID; u32ii++)
7176 {
7177 _TSP_DupDscmbPidFlt(u32EngId, u32ii, TSP_SECFLT_NUM+DSCMB_FLT_NUM+u32ii);
7178 }
7179 #endif
7180 }
7181
7182 //duplicateFLT 2 to FLT1
7183 #ifdef TS2_LIVE_SUPPORT
7184 if(bFlt2DupNew)
7185 {
7186 for(u32ii = (TSP_SECFLT_NUM + TSP_PIDFLT1_NUM); u32ii < TSP_PIDFLT_NUM_ALL; u32ii++)
7187 {
7188 _TSP_DupDscmbPidFlt(u32EngId, u32ii, u32ii-TSP_PIDFLT1_NUM);
7189 }
7190 }
7191 #endif
7192
7193 HAL_TSP_CSA_Set_ScrmPath((DrvTSP_DscmbCtrl)(*pScmbPath));
7194 }
7195
7196 _TSP_RETURN(DRVTSP_OK);
7197
7198 }
7199
7200 TSP_Result MDrv_TSP_GetCap(DrvTSP_Cap eCap, void* pOutput)
7201 {
7202 *((MS_U32*)pOutput) = 0;
7203
7204 if (eCap >= E_DRVTSP_CAP_NULL)
7205 return DRVTSP_FAIL;
7206
7207 if(eCap == E_DRVTSP_CAP_RESOURCE_SIZE)
7208 {
7209 *((MS_U32*)pOutput) = sizeof(TSP_RESOURCE_PRIVATE);
7210 return DRVTSP_OK;
7211 }
7212
7213 if(HAL_TSP_GetCap((MS_U32)eCap, pOutput))
7214 {
7215 return DRVTSP_OK;
7216 }
7217 else
7218 {
7219 return DRVTSP_FAIL;
7220 }
7221 }
7222
7223 TSP_Result MDrv_TSP_GetStatus(DrvTSP_HW_Status *HW_Status, DrvTSP_SW_Status *SW_Status)
7224 {
7225 _TSP_ENTRY();
7226 if (HAL_TSP_Alive())
7227 {
7228 *HW_Status = E_DRVTSP_HW_ALIVE;
7229 }
7230 else
7231 {
7232 *HW_Status = E_DRVTSP_HW_DEALIVE;
7233 }
7234 *SW_Status = _ptsp_res->_TspState[0].TSPStatus;
7235
7236 _TSP_RETURN(DRVTSP_OK);
7237 }
7238
7239 TSP_Result MDrv_TSP_SetDbgLevel(DrvTSP_DbgLevel DbgLevel)
7240 {
7241 _u32TSPDGBLevel = DbgLevel;
7242 //TSP_DBG("[%s][%d] _u32TSPDGBLevel %d \n", __FUNCTION__, __LINE__, (int)_u32TSPDGBLevel);
7243
7244 return DRVTSP_OK;
7245 }
7246
7247 TSP_Result MDrv_TSP_GetTSIFStatus(DrvTSP_If eIf, DrvTSP_If_Set* pIfSet, MS_U16 u16Clock)
7248 {
7249 TSP_Result Res = DRVTSP_OK;
7250 MS_U16 u16pad, u16clk;
7251
7252 _TSP_ENTRY();
7253
7254 switch(eIf)
7255 {
7256 case E_DRVTSP_IF_PLAYBACK:
7257 HAL_TSP_GetTSIF_Status(0, &u16pad, &u16clk, &(pIfSet->bExtSync), &(pIfSet->bParallel));
7258 break;
7259 #ifndef NO_PVR
7260 case E_DRVTSP_IF_PVR0:
7261 HAL_TSP_GetTSIF_Status(1, &u16pad, &u16clk, &(pIfSet->bExtSync), &(pIfSet->bParallel));
7262 break;
7263 #endif //udef NO_PVR
7264 #ifdef TS2_IF_SUPPORT
7265 case E_DRVTSP_IF_PVR1:
7266 HAL_TSP_GetTSIF_Status(2, &u16pad, &u16clk, &(pIfSet->bExtSync), &(pIfSet->bParallel));
7267 break;
7268 #endif
7269 default:
7270 _TSP_RETURN(DRVTSP_NOT_SUPPORTED);
7271 }
7272
7273 u16Clock = u16clk;
7274
7275 switch(u16pad)
7276 {
7277 case TSP_MUX_INDEMOD:
7278 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_INDEMOD)
7279 Res = DRVTSP_FUNC_ERROR;
7280 pIfSet->ePad = E_DRVTSP_PAD_DEMOD;
7281 break;
7282 case TSP_MUX_TS0:
7283 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TS0)
7284 Res = DRVTSP_FUNC_ERROR;
7285 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT0;
7286 break;
7287 case TSP_MUX_TS1:
7288 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TS1)
7289 Res = DRVTSP_FUNC_ERROR;
7290 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT1;
7291 break;
7292 #ifdef TS2_IF_SUPPORT
7293 case TSP_MUX_TS2:
7294 if((u16clk & CLKGEN0_TSP_CLK_MASK) != TSP_CLK_TS2)
7295 Res = DRVTSP_FUNC_ERROR;
7296 pIfSet->ePad = E_DRVTSP_PAD_EXT_INPUT2;
7297 break;
7298 #endif
7299 default:
7300 break;
7301 }
7302
7303 pIfSet->bClkInv = ((u16clk & TSP_CLK_INVERSE) == TSP_CLK_INVERSE);
7304
7305 _TSP_RETURN(Res);
7306 }
7307
7308 //-------------------------------------------------------------------------------------------------
7309 /// Get the PES scrambling control status
7310 /// @param u8FltId \b IN: filter id
7311 /// @param pu8status \b OUT: pointer to store PES scrambled statis. Every bit indicates one status of one packet.
7312 /// @return TSP_Result
7313 /// @note
7314 //-------------------------------------------------------------------------------------------------
7315 TSP_Result MDrv_TSP_GetPesScmbSts(MS_U8 u8FltId, MS_U8 *pu8status)
7316 {
7317 _TSP_ENTRY();
7318 *pu8status = HAL_TSP_Get_PesScmb_Sts(u8FltId);
7319 _TSP_RETURN(DRVTSP_OK);
7320 }
7321
7322 //-------------------------------------------------------------------------------------------------
7323 /// Get the TS header scrambling control status
7324 /// @param u8FltId \b IN: filter id
7325 /// @param pu8status \b OUT: pointer to store TS scrambled statis. Every bit indicates one status of one packet.
7326 /// @note
7327 //-------------------------------------------------------------------------------------------------
7328 TSP_Result MDrv_TSP_GetTsScmbSts(MS_U8 u8FltId, MS_U8 *pu8status)
7329 {
7330 _TSP_ENTRY();
7331 *pu8status = HAL_TSP_Get_TsScmb_Sts(u8FltId);
7332 _TSP_RETURN(DRVTSP_OK);
7333 }
7334
7335 //-------------------------------------------------------------------------------------------------
7336 /// Get TSP driver version
7337 /// @param <IN> \b const MS_U8 **pVerString :
7338 /// @param <RET> \b : when get ok, return the pointer to the driver version
7339 //-------------------------------------------------------------------------------------------------
7340 TSP_Result MDrv_TSP_GetLibVer(const MSIF_Version **ppVersion)
7341 {
7342 // No mutex check, it can be called before Init
7343 if (!ppVersion)
7344 {
7345 return DRVTSP_FAIL;
7346 }
7347
7348 *ppVersion = &_drv_tsp_version;
7349
7350 return DRVTSP_OK;
7351 }
7352
7353 TSP_Result MDrv_TSP_Alive(MS_U32 u32EngId)
7354 {
7355 _TSP_ENTRY();
7356 if (HAL_TSP_Alive())
7357 {
7358 _TSP_RETURN(DRVTSP_OK);
7359 }
7360 else
7361 {
7362 _TSP_RETURN(DRVTSP_FAIL);
7363 }
7364 }
7365
7366 inline TSP_Result MDrv_TSP_IsAccess(MS_U32 u32Try)
7367 {
7368 return (HAL_TSP_TTX_IsAccess(u32Try))? DRVTSP_OK: DRVTSP_FAIL;
7369 }
7370
7371 inline TSP_Result MDrv_TSP_UnlockAccess(void)
7372 {
7373 HAL_TSP_TTX_UnlockAccess();
7374 return DRVTSP_OK;
7375 }
7376
7377 // Following are 2 private function used to solve annoying interrupt thread disappearing problem when fork.
7378 // Should not be exposed to general users.
7379 MS_BOOL MDrv_TSP_CloseInterrupt(void)
7380 {
7381 // IntDisable
7382 // IntDetach
7383 OSAL_TSP_IntDisable();
7384 OSAL_TSP_IntDetach();
7385
7386 return TRUE;
7387 }
7388
7389 //-------------------------------------------------------------------------------------------------
7390 /// Initialize lib resource API
7391 /// @param pu32ResMemAddr \b IN: Pointer to store resource memory address
7392 /// @return TSP_Result
7393 /// @note
7394 //-------------------------------------------------------------------------------------------------
7395 TSP_Result MDrv_TSP_InitLibResource(void *pu32ResMemAddr)
7396 {
7397 TSP_ASSERT((pu32ResMemAddr != 0),
7398 TSP_DBG("[TSP_ERROR][%s][%06d] pointer is 0x%p!\n", __FUNCTION__, __LINE__, pu32ResMemAddr));
7399
7400 MS_VIRT virtTspBank, virtIRBank;
7401 MS_PHY phyIrBankSize, phyTspBankSize;
7402
7403 _ptsp_res = (TSP_RESOURCE_PRIVATE*)pu32ResMemAddr;
7404
7405 if(_ptsp_res->_bSWInitReady != TRUE)
7406 {
7407 if(_TSP_InitResource(_ptsp_res) == FALSE)
7408 return DRVTSP_FAIL;
7409 }
7410
7411 // For multi-process use case. (different process should set the value of bank again)
7412 if(_bBankInit == FALSE)
7413 {
7414 if (FALSE == MDrv_MMIO_GetBASE(&virtTspBank, &phyTspBankSize, MS_MODULE_TSP))
7415 {
7416 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE fail\n"));
7417 MS_ASSERT(0);
7418 }
7419 if (FALSE == MDrv_MMIO_GetBASE(&virtIRBank, &phyIrBankSize, MS_MODULE_IR))
7420 {
7421 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE (PM base)fail\n"));
7422 MS_ASSERT(0);
7423 }
7424
7425 HAL_TSP_SetBank(virtTspBank, virtIRBank);
7426 _bBankInit = TRUE;
7427 }
7428
7429 return DRVTSP_OK;
7430 }
7431
7432 //-------------------------------------------------------------------------------------------------
7433 /// Initialize TSP driver and TSP engine
7434 /// @return TSP_Result
7435 /// @note
7436 /// It should be called before calling any other TSP DDI functions.
7437 /// Driver task is in @ref E_TASK_PRI_SYS level.
7438 //-------------------------------------------------------------------------------------------------
7439 TSP_Result MDrv_TSP_Init(MS_PHY phyFWAddr, MS_U32 u32FWSize)
7440 {
7441 TSP_Result bRet;
7442
7443 MS_DEBUG_MSG(TSP_DBG ("******************start TSP init*********************************\n"));
7444
7445 //if already init, set the same HK parameter & interrupt num to this process, and attached Isr for this new process
7446 if((_ptsp_res->_bSWInitReady == TRUE) && (_s32TspTaskId != -1))
7447 {
7448 return MDrv_TSP_Reinit(_bIsHK);
7449 }
7450
7451 MS_DEBUG_MSG(TSP_DBG ("******************start TSP init*********************************\n"));
7452
7453 _ptsp_res->_phyFwAddr = phyFWAddr;
7454 _ptsp_res->_u32FwSize = u32FWSize;
7455
7456 if (DRVTSP_OK != (bRet = _TSP_Init(TRUE, FALSE)))
7457 {
7458 return bRet;
7459 }
7460 MS_DEBUG_MSG(TSP_DBG ("**********************End TSP init*****************************\n"));
7461
7462 return DRVTSP_OK;
7463 }
7464
7465 //-------------------------------------------------------------------------------------------------
7466 /// Initialize TSP driver for hal parameters init and attaching Isr
7467 /// @return TSP_Result
7468 /// @note
7469 /// Only for the second process to init
7470 /// Driver task is in @ref E_TASK_PRI_SYS level.
7471 //-------------------------------------------------------------------------------------------------
7472 TSP_Result MDrv_TSP_Reinit(MS_BOOL bHK)
7473 {
7474 MS_VIRT virtTspBank, virtIRBank;
7475 MS_PHY u32IrBankSize, u32TspBankSize;
7476 MS_U8 u8ii = 0;
7477
7478 _bIsHK = bHK;
7479 _u32IntNum = (bHK) ? E_INT_IRQ_TSP2HK : E_INT_FIQ_TSP2AEON; // use this once MHEG5 using utopia msos
7480
7481 if (FALSE == MDrv_MMIO_GetBASE(&virtTspBank, &u32TspBankSize, MS_MODULE_TSP))
7482 {
7483 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE fail\n"));
7484 MS_ASSERT(0);
7485 }
7486 if (FALSE == MDrv_MMIO_GetBASE(&virtIRBank, &u32IrBankSize, MS_MODULE_IR))
7487 {
7488 MS_CRITICAL_MSG(TSP_DBG("MDrv_MMIO_GetBASE (PM base)fail\n"));
7489 MS_ASSERT(0);
7490 }
7491
7492 HAL_TSP_SetBank(virtTspBank, virtIRBank);
7493
7494
7495 #ifdef STC64_SUPPORT
7496 HAL_TSP_STC64_Mode_En(TRUE);
7497 #endif
7498
7499 _s32ExtMutexId = OSAL_TSP_MutexCreate((MS_U8*)tsp_ext_mutex);
7500 _s32TspEventId = OSAL_TSP_EventCreate((MS_U8*)tsp_event); // MsOS_CreateEventGroup("TSP_Event");
7501
7502 for (u8ii = 0; u8ii < ((TSP_SECFLT_NUM+31)>>5); u8ii++)
7503 {
7504 _s32TspSecRdyId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_secRdy);
7505 _s32TspSecOvfId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_crcerr);
7506 _s32TspSecCrcId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_secovf);
7507 _s32TspFltDisableId[u8ii] = OSAL_TSP_EventCreate((MS_U8*)tsp_fltdis);
7508 _u32SecNotifyId[u8ii] = 0;
7509 }
7510
7511 #if 0
7512 for (u8ii = 0; u8ii < ((TSP_PIDFLT_NUM_ALL+31)>>5); u8ii++)
7513 {
7514 _s32EventFree0[u8ii] = OSAL_TSP_EventCreate((MS_U8*)freelist0);
7515 _s32EventFreeDefer0[u8ii] = OSAL_TSP_EventCreate((MS_U8*)freelistdefer0);
7516 }
7517 #endif
7518
7519 #if (defined(HWPCR_ENABLE) && (TSP_HWPCR_BY_HK == 1))
7520 for (u8ii = 0; u8ii < ((TSP_PCRFLT_NUM+31)>>5); u8ii++)
7521 {
7522 _u32HwPcrNotifyId[u8ii] = 0;
7523 }
7524 #endif
7525
7526 #ifndef NO_PVR
7527 for (u8ii = 0; u8ii < ((TSP_PVR_IF_NUM+31)>>5); u8ii++)
7528 {
7529 _u32PvrNotifyId[u8ii] = 0;
7530 }
7531 #endif
7532
7533 #ifndef MSOS_TYPE_LINUX_KERNEL
7534 _s32TspTaskId = OSAL_TSP_TaskCreate(_TSP_Isr_Proc_Task, (MS_U8*)tsp_isr_task);
7535 #endif
7536
7537 _ptsp_res->_u32ProcessNum++;
7538
7539 // IntDisable
7540 // IntDetach
7541 OSAL_TSP_IntDisable();
7542 //#ifndef MSOS_TYPE_LINUX_KERNEL
7543 OSAL_TSP_IntDetach();
7544 //#endif
7545
7546 OSAL_TSP_IntAttach(_TSP_Isr);
7547 //#ifndef MSOS_TYPE_LINUX_KERNEL
7548 OSAL_TSP_IntEnable();
7549 //#endif
7550
7551 return DRVTSP_OK;
7552 }
7553
7554 TSP_Result MDrv_TSP_Reset(void)
7555 {
7556 _TSP_RegStateReset();
7557 HAL_TSP_Reset(0);
7558 return DRVTSP_OK;
7559 }
7560
7561 MS_BOOL MDrv_TSP_OpenInterrupt(void)
7562 {
7563 OSAL_TSP_IntAttach(_TSP_Isr);
7564 OSAL_TSP_IntEnable();
7565 return TRUE;
7566 }
7567
7568 TSP_Result MDrv_TSP_BurstLen(MS_U32 u32Len)
7569 {
7570 _TSP_ENTRY();
7571 HAL_TSP_SetDMABurstLen(u32Len);
7572 _TSP_RETURN(DRVTSP_OK);
7573 }
7574
7575 TSP_Result MDrv_TSP_GetFileInTimeStamp(MS_U32* u32TSLen)
7576 {
7577 #ifndef NO_FILEIN
7578
7579 _TSP_ENTRY();
7580 *u32TSLen = HAL_TSP_GetFileInTimeStamp();
7581 _TSP_RETURN(DRVTSP_OK);
7582
7583 #else
7584 return DRVTSP_NOT_SUPPORTED;
7585 #endif //udef NO_FILEIN
7586 }
7587
7588 TSP_Result MDrv_TSP_GetDbgPortInfo(MS_U32 u32DbgSel,MS_U32* u32DbgInfo)
7589 {
7590 _TSP_ENTRY();
7591 *u32DbgInfo = HAL_TSP_GetDBGPortInfo(u32DbgSel);
7592 _TSP_RETURN(DRVTSP_OK);
7593 }
7594
7595 //[LEGACY] //[OBSOLETE]
7596 TSP_Result MDrv_TSP_SetHK(MS_BOOL bIsHK)
7597 {
7598 _bIsHK = bIsHK;
7599 _u32IntNum = (bIsHK) ? E_INT_IRQ_TSP2HK : E_INT_FIQ_TSP2AEON; // use this once MHEG5 using utopia msos
7600 return DRVTSP_OK;
7601 }
7602 //[LEGACY] //[OBSOLETE]
7603
7604 TSP_Result MDrv_TSP_SetAVPause(MS_BOOL bSet)
7605 {
7606 _TSP_ENTRY();
7607
7608 #ifndef NO_CA
7609 HAL_TSP_Set_AVPAUSE(bSet);
7610 #endif
7611
7612 _TSP_RETURN(DRVTSP_OK);
7613 }
7614
7615 TSP_Result MDrv_TSP_FLT_LiveSrcSwitch(DrvTSP_FltType eFltSrcType)
7616 {
7617 #ifndef NO_PVR
7618 MS_U16 u16pad, u16clk = 0;
7619 MS_BOOL bParall = TRUE, bExtSync = TRUE;
7620 DrvTSP_PadIn epad = E_DRVTSP_PAD_DEMOD;
7621
7622 _TSP_ENTRY();
7623
7624 switch(eFltSrcType & E_DRVTSP_FLT_SOURCE_TYPE_MASK)
7625 {
7626 case E_DRVTSP_FLT_SOURCE_TYPE_LIVE:
7627 HAL_TSP_TSIF1_Enable(FALSE);
7628 #ifndef NO_CA
7629 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF0_LIVEIN|TSP_CA_OUTPUT_PLAY_LIVE);
7630 #endif
7631 break;
7632 case E_DRVTSP_FLT_SOURCE_TYPE_TS1:
7633 HAL_TSP_GetTSIF_Status(0, &u16pad, &u16clk, &bParall, &bExtSync);
7634 if(u16pad == TSP_MUX_TS0)
7635 {
7636 epad = E_DRVTSP_PAD_EXT_INPUT0;
7637 }
7638 else if(u16pad == TSP_MUX_TS1)
7639 {
7640 epad = E_DRVTSP_PAD_EXT_INPUT1;
7641 }
7642 #ifdef TS2_IF_SUPPORT
7643 else if(u16pad == TSP_MUX_TS2)
7644 {
7645 epad = E_DRVTSP_PAD_EXT_INPUT2;
7646 }
7647 #endif
7648 HAL_TSP_SelPad(0, 1, (MS_U32)epad);
7649 HAL_TSP_SelPad_ClkInv(0, 1, (u16clk & TSP_CLK_INVERSE));
7650 HAL_TSP_SelPad_ExtSync(0, bExtSync, 1);
7651 HAL_TSP_SelPad_Parl(0, bParall, 1);
7652 #ifndef NO_CA
7653 HAL_TSP_CSA_Set_ScrmPath(TSP_CA_INPUT_TSIF1|TSP_CA_OUTPUT_PLAY_LIVE);
7654 #endif
7655 HAL_TSP_TSIF1_Enable(TRUE);
7656 break;
7657 default:
7658 _TSP_RETURN(DRVTSP_NOT_SUPPORTED);
7659 break;
7660
7661 }
7662
7663 _TSP_RETURN(DRVTSP_OK);
7664 #endif //NO_PVR
7665
7666 return DRVTSP_OK;
7667 }
7668
7669 TSP_Result MDrv_TSP_AU_BD_Mode_Enable(MS_BOOL bEnable)
7670 {
7671 #ifndef NO_FILEIN
7672 if(HAL_TSP_AU_BD_Mode_Enable(bEnable))
7673 {
7674 return DRVTSP_OK;
7675 }
7676 else
7677 #endif
7678 {
7679 return DRVTSP_NOT_SUPPORTED;
7680 }
7681 }
7682
7683 TSP_Result MDrv_TSP_Get_FW_VER(MS_U32* u32FWVer)
7684 {
7685 MS_U32 _u32fw;
7686 _u32fw = HAL_TSP_Get_FW_VER();
7687 *u32FWVer = _u32fw;
7688 return DRVTSP_OK;
7689 }
7690
7691 TSP_Result MDrv_TSP_Get_Intr_Count(MS_U32* pu32Count)
7692 {
7693 *pu32Count = _ptsp_res->_u32DbgIntrCount;
7694 return DRVTSP_OK;
7695 }
7696
7697 void MDrv_TSP_WriteProtect_Enable(MS_BOOL bEnable, MS_PHY* pphyStartAddr, MS_PHY* pphyEndAddr)
7698 {
7699 HAL_TSP_WriteProtect_Enable(bEnable, pphyStartAddr, pphyEndAddr);
7700 }
7701
7702 void MDrv_TSP_OrzWriteProtect_Enable(MS_BOOL bEnable, MS_PHY phyStartAddr, MS_PHY phyEndAddr)
7703 {
7704 HAL_TSP_OrzWriteProtect_Enable(bEnable, phyStartAddr, phyEndAddr);
7705 }
7706
7707 TSP_Result MDrv_TSP_TSIF_Enable(DrvTSP_If tsif, MS_BOOL bEnable)
7708 {
7709 _TSP_ENTRY();
7710 switch (tsif)
7711 {
7712 case E_DRVTSP_IF_PLAYBACK:
7713 HAL_TSP_TSIF0_Enable(bEnable);
7714 break;
7715 case E_DRVTSP_IF_PVR0:
7716 HAL_TSP_TSIF1_Enable(bEnable);
7717 break;
7718 #ifdef DTS2_IF_SUPPORT
7719 case E_DRVTSP_IF_PVR1:
7720 HAL_TSP_TSIF2_Enable(bEnable);
7721 break;
7722 #endif
7723 default:
7724 ULOGE("TSP", "[%s][%d] IF not support\n",__FUNCTION__, __LINE__);
7725 break;
7726 }
7727 _TSP_RETURN(DRVTSP_OK);
7728 }
7729
7730 TSP_Result MDrv_TSP_ReadDropPktCnt(MS_U16* pu16ADropCnt, MS_U16* pu16VDropCnt)
7731 {
7732 _TSP_ENTRY();
7733
7734 if(HAL_TSP_Read_DropPktCnt(pu16ADropCnt, pu16VDropCnt) == TRUE)
7735 {
7736 _TSP_RETURN(DRVTSP_OK);
7737 }
7738 else
7739 {
7740 _TSP_RETURN(DRVTSP_FAIL);
7741 }
7742 }
7743 static void _DumpFwMsg(void)
7744 {
7745 int tmp = 0;
7746 int len = 0;
7747 char p8buf[256];
7748 char* p = NULL;
7749 MS_U32 u32WritePos = *(volatile MS_U32*)MS_PA2KSEG1(_FwDbgInfo.phyBufAddr);
7750
7751 p8buf[255] = '\0';
7752 p = (char*)(MS_PA2KSEG1(_FwDbgInfo.phyBufAddr) + _FwDbgInfo.u32ReadPos);
7753 //ULOGD("TSP", "_pFwDbgInfo->phyBufAddr = 0x%x\n", (unsigned int)_FwDbgInfo.phyBufAddr);
7754 //ULOGD("TSP", "_pFwDbgInfo->u32ReadPos = 0x%x\n", (unsigned int)_FwDbgInfo.u32ReadPos);
7755 //ULOGD("TSP", "_pFwDbgInfo->u32WritePos = 0x%x\n", (unsigned int)u32WritePos);
7756 if(u32WritePos > _FwDbgInfo.u32Size)
7757 {
7758 TSP_DBG("[%s], WARN : write pointer incorrect!!!\n", __FUNCTION__);
7759 return;
7760 }
7761 if(u32WritePos > _FwDbgInfo.u32ReadPos)
7762 {
7763 while(1)
7764 {
7765 len = (u32WritePos - _FwDbgInfo.u32ReadPos) > 255 ? 255 : (u32WritePos - _FwDbgInfo.u32ReadPos);
7766 if((tmp = snprintf(p8buf, len, "%s", p)) == 0)
7767 break;
7768 tmp++;
7769 p+=tmp;
7770 _FwDbgInfo.u32ReadPos += tmp;
7771 ULOGD("TSP", "[TSP] %s", p8buf);
7772 }
7773 }
7774 else if(u32WritePos < _FwDbgInfo.u32ReadPos)
7775 {
7776 while(1)
7777 {
7778 len = (_FwDbgInfo.u32Size - _FwDbgInfo.u32ReadPos) > 255? 255 : (_FwDbgInfo.u32Size - _FwDbgInfo.u32ReadPos);
7779 if((tmp = snprintf(p8buf, len, "%s", p)) == 0)
7780 {
7781 break;
7782 }
7783 tmp++;
7784 p+=tmp;
7785 _FwDbgInfo.u32ReadPos += tmp;
7786 ULOGD("TSP", "[TSP] %s", p8buf);
7787 }
7788
7789 _FwDbgInfo.u32ReadPos = sizeof(MS_U32);
7790 p = (char*)(MS_PA2KSEG1(_FwDbgInfo.phyBufAddr) + _FwDbgInfo.u32ReadPos);
7791
7792 while(1)
7793 {
7794 len = (u32WritePos - _FwDbgInfo.u32ReadPos) > 255 ? 255 : (u32WritePos - _FwDbgInfo.u32ReadPos);
7795 if((tmp = snprintf(p8buf, len, "%s", p)) == 0)
7796 {
7797 break;
7798 }
7799 tmp++;
7800 p+=tmp;
7801 _FwDbgInfo.u32ReadPos += tmp;
7802 ULOGD("TSP", "[TSP] %s", p8buf);
7803 }
7804 }
7805 }
7806
7807 TSP_Result MDrv_TSP_SetFwDBGParam(MS_PHY phyAddr, MS_U32 u32Size, MS_U32 u32DbgWord)
7808 {
7809 TSP_ASSERT((phyAddr != 0) && (u32Size != 0),
7810 TSP_DBG("[TSP_ERROR][%06d] memory information for debug buffer incorrect address : %lx, size : %d\n", __LINE__, (unsigned long)phyAddr, (unsigned int)u32Size));
7811
7812
7813 _TSP_ENTRY();
7814
7815 HAL_TSP_OrzWriteProtect_Enable(FALSE, 0, 0);
7816 if(HAL_TSP_SetFwDbgMem(phyAddr, u32Size) && HAL_TSP_SetFwDbgWord(u32DbgWord))
7817 {
7818 _FwDbgInfo.bEnable = TRUE;
7819 _FwDbgInfo.phyBufAddr = phyAddr;
7820 _FwDbgInfo.u32Size = u32Size;
7821 _FwDbgInfo.u32ReadPos = sizeof(MS_U32);
7822 _TSP_RETURN(DRVTSP_OK);
7823 }
7824 else
7825 {
7826 TSP_DBG("********HAL_TSP_SetFwDbgMem fail**************\n");
7827 _TSP_RETURN(DRVTSP_FAIL);
7828 }
7829 }
7830
7831 #if 0
7832 TSP_Result MDrv_TSP_ResetFileinTimestamp(void)
7833 {
7834 HAL_TSP_ResetTimeStamp();
7835 return DRVTSP_OK;
7836 }
7837 #endif
7838
7839 //-------------------------------------------------------------------------------------------------
7840 /// Set Virtual Queue buffer
7841 /// @param phyVQBaseAddr \b IN: Virtual Queue memorry address
7842 /// @param u32VQBufLen_192PKT \b IN: Number of packets for Virtual Queue (192 bytes per packet)
7843 /// @return TSP_Result
7844 /// @note
7845 //-------------------------------------------------------------------------------------------------
7846 TSP_Result MDrv_TSP_SetVQueBuf(MS_PHY phyVQBaseAddr, MS_U32 u32VQBufLen)
7847 {
7848 #ifdef VQ_ENABLE
7849 _TSP_ENTRY();
7850 HAL_TSP_SetVQBuffer(phyVQBaseAddr, u32VQBufLen);
7851 _TSP_RETURN(DRVTSP_OK);
7852 #else
7853 return DRVTSP_NOT_SUPPORTED;
7854 #endif
7855 }
7856
7857 //-------------------------------------------------------------------------------------------------
7858 /// Enable/Disable Virtual Quere
7859 /// @param bEnable \b IN: Virtual Queue memorry Enable flag
7860 /// @return TSP_Result
7861 /// @note
7862 //-------------------------------------------------------------------------------------------------
7863 TSP_Result MDrv_TSP_VQueEnable(MS_BOOL bEnable)
7864 {
7865 #ifdef VQ_ENABLE
7866
7867 _TSP_ENTRY();
7868 HAL_TSP_VQueue_Enable(bEnable);
7869
7870 if(!bEnable)
7871 {
7872 //HAL_TSP_SetVQBuffer(0, 0);
7873 HAL_TSP_VQueue_Reset();
7874 }
7875
7876 #ifndef FIVQ_ENABLE
7877 _ptsp_res->_bLiveSING_FilePP = bEnable;
7878 HAL_TSP_DoubleBuf_En(!_ptsp_res->_bLiveSING_FilePP);
7879 #endif
7880
7881 _TSP_RETURN(DRVTSP_OK);
7882
7883 #else
7884 return DRVTSP_NOT_SUPPORTED;
7885 #endif
7886 }
7887
7888 //-------------------------------------------------------------------------------------------------
7889 /// Reset Virtual Quere
7890 //-------------------------------------------------------------------------------------------------
7891 TSP_Result MDrv_TSP_VQueReset(void)
7892 {
7893 #ifdef VQ_ENABLE
7894
7895 _TSP_ENTRY();
7896 HAL_TSP_VQueue_Reset();
7897 _TSP_RETURN(DRVTSP_OK);
7898
7899 #else
7900 return DRVTSP_NOT_SUPPORTED;
7901 #endif
7902 }
7903
7904 TSP_Result MDrv_TSP_VQueue_OverflowInt_En(MS_BOOL bEnable)
7905 {
7906 #ifdef VQ_ENABLE
7907
7908 _TSP_ENTRY();
7909 HAL_TSP_VQueue_OverflowInt_En(bEnable);
7910 _TSP_RETURN(DRVTSP_OK);
7911
7912 #else
7913 return DRVTSP_NOT_SUPPORTED;
7914 #endif
7915 }
7916
7917 //-------------------------------------------------------------------------------------------------
7918 /// Set Virtual Quere request threshold
7919 /// @param u8req_len \b IN: Request length
7920 /// @return TSP_Result
7921 /// @note
7922 //-------------------------------------------------------------------------------------------------
7923 TSP_Result MDrv_TSP_Set_VQ_Threshold(MS_U8 u8req_len)
7924 {
7925 #ifdef VQ_ENABLE
7926
7927 _TSP_ENTRY();
7928 HAL_TSP_Set_Req_VQ_RX_Threshold(u8req_len);
7929 _TSP_RETURN(DRVTSP_OK);
7930
7931 #else
7932 return DRVTSP_NOT_SUPPORTED;
7933 #endif
7934 }
7935
7936 TSP_Result MDrv_TSP_Get_VQStatus(MS_U32* pu32Status)
7937 {
7938 #ifdef VQ_ENABLE
7939
7940 _TSP_ENTRY();
7941 *pu32Status = HAL_TSP_Get_VQStatus();
7942 _TSP_RETURN(DRVTSP_OK);
7943
7944 #else
7945 return DRVTSP_NOT_SUPPORTED;
7946 #endif
7947 }
7948
7949 //-------------------------------------------------------------------------------------------------
7950 /// Set MOBF encrypt key
7951 /// @param u32Key0 \b IN: Encrypt Key0
7952 /// @param u32Key1 \b IN: Encrypt Key1
7953 /// @return TSP_Result
7954 /// @note
7955 //-------------------------------------------------------------------------------------------------
7956 TSP_Result MDrv_TSP_Set_MOBF_PVRKey(MS_U32 u32Key0, MS_U32 u32Key1)
7957 {
7958 #ifdef MOBF_ENABLE
7959 _TSP_ENTRY();
7960 HAL_TSP_MOBF_Set_PVRKey(u32Key0, u32Key1);
7961 _TSP_RETURN(DRVTSP_OK);
7962 #else
7963 return DRVTSP_NOT_SUPPORTED;
7964 #endif
7965 }
7966
7967 //-------------------------------------------------------------------------------------------------
7968 /// Set MOBF encrypt key
7969 /// @param u32Key0 \b IN: Encrypt Key0
7970 /// @param u32Key1 \b IN: Encrypt Key1
7971 /// @return TSP_Result
7972 /// @note
7973 //-------------------------------------------------------------------------------------------------
7974 TSP_Result MDrv_TSP_Set_MOBF_PVR1Key(MS_U32 u32Key0, MS_U32 u32Key1)
7975 {
7976 #ifdef MOBF_ENABLE
7977 _TSP_ENTRY();
7978 HAL_TSP_MOBF_Set_PVRKey_EX(1, u32Key0, u32Key1);
7979 _TSP_RETURN(DRVTSP_OK);
7980 #else
7981 return DRVTSP_NOT_SUPPORTED;
7982 #endif
7983 }
7984
7985
7986 //-------------------------------------------------------------------------------------------------
7987 /// Set MOBF decrypt key
7988 /// @param u32Key \b IN: Decrypt Key
7989 /// @return TSP_Result
7990 /// @note
7991 //-------------------------------------------------------------------------------------------------
7992 TSP_Result MDrv_TSP_Set_MOBF_FileinKey(MS_U32 u32Key)
7993 {
7994 #ifdef MOBF_ENABLE
7995 _TSP_ENTRY();
7996 HAL_TSP_MOBF_Set_FileinKey(u32Key);
7997 _TSP_RETURN(DRVTSP_OK);
7998 #else
7999 return DRVTSP_NOT_SUPPORTED;
8000 #endif
8001 }
8002
8003 //-------------------------------------------------------------------------------------------------
8004 /// Enable/Disable MOBF encrypt mode
8005 /// @param benable \b IN: Enable flag
8006 /// @return TSP_Result
8007 /// @note
8008 //-------------------------------------------------------------------------------------------------
8009 TSP_Result MDrv_TSP_MOBF_PVR_Enable(MS_BOOL benable)
8010 {
8011 #ifdef MOBF_ENABLE
8012 _TSP_ENTRY();
8013 HAL_TSP_MOBF_PVR_Enable(benable);
8014 _TSP_RETURN(DRVTSP_OK);
8015 #else
8016 return DRVTSP_NOT_SUPPORTED;
8017 #endif
8018 }
8019
8020 //-------------------------------------------------------------------------------------------------
8021 /// Enable/Disable MOBF decrypt mode
8022 /// @param benable \b IN: Enable flag
8023 /// @return TSP_Result
8024 /// @note
8025 //-------------------------------------------------------------------------------------------------
8026 TSP_Result MDrv_TSP_MOBF_FileIn_Enable(MS_BOOL benable)
8027 {
8028 #ifdef MOBF_ENABLE
8029 _TSP_ENTRY();
8030 HAL_TSP_MOBF_Filein_Enable(benable);
8031 _TSP_RETURN(DRVTSP_OK);
8032 #else
8033 return DRVTSP_NOT_SUPPORTED;
8034 #endif
8035 }
8036
8037 TSP_Result MDrv_TSP_CMD_Run(MS_U32 u32Cmd, MS_U32 u32Config0, MS_U32 u32Config1 ,void *pData)
8038 {
8039 _TSP_ENTRY();
8040
8041 if(HAL_TSP_CMD_Run(u32Cmd, u32Config0, u32Config1,pData))
8042 {
8043 _TSP_RETURN(DRVTSP_OK);
8044 }
8045 else
8046 {
8047 _TSP_RETURN(DRVTSP_FAIL);
8048 }
8049 }
8050
8051 TSP_Result MDrv_TSP_SetFwDataAddr(MS_PHY phyDataAddr, MS_U32 u32Size)
8052 {
8053 TSP_ASSERT((phyDataAddr & _TSP_QMEM_D_MASK),
8054 TSP_DBG("[TSP_ERROR][%06d] setFwDataAddr 0x%x <= 0x%x\n", __LINE__, (unsigned int)phyDataAddr, (unsigned int)(~_TSP_QMEM_D_MASK)));
8055
8056 _TSP_ENTRY();
8057
8058 HAL_TSP_OrzWriteProtect_Enable(TRUE, phyDataAddr, phyDataAddr+u32Size);
8059 HAL_TSP_SecFlt_SetDataAddr(phyDataAddr);
8060 _ptsp_res->_phyTspFWDramBuf = phyDataAddr;
8061 _ptsp_res->_u32TspFwDramBufSize = u32Size;
8062 _TSP_RETURN(DRVTSP_OK);
8063 }
8064
8065 // -------------------------------------------------------------
8066 // Debug table
8067 // -------------------------------------------------------------
8068 #ifdef DEBUG_TABLE_SUPPORT
8069 TSP_Result MDrv_TSP_Get_DisContiCnt(DrvTSP_DisContiCnt_info* tspInfo, MS_U32* pu32Cnt)
8070 {
8071 TSP_DisconPktCnt_Info TspDisContiCntInfo;
8072
8073 _TSP_ENTRY();
8074
8075 memset(&TspDisContiCntInfo, 0, sizeof(TSP_DisconPktCnt_Info));
8076 TspDisContiCntInfo.TspCmd = tspInfo->TspCmd;
8077 TspDisContiCntInfo.TspFifo = tspInfo->TspFifo;
8078 TspDisContiCntInfo.TspSrc = tspInfo->TspSrc;
8079
8080 *pu32Cnt = HAL_TSP_Get_DisContiCnt(&TspDisContiCntInfo);
8081
8082 _TSP_RETURN(DRVTSP_OK);
8083 }
8084
8085 TSP_Result MDrv_TSP_Get_DropPktCnt(DrvTSP_DropPktCnt_info* tspInfo, MS_U32* pu32Cnt)
8086 {
8087 TSP_DisconPktCnt_Info TspDropPktCntInfo;
8088
8089 _TSP_ENTRY();
8090
8091 memset(&TspDropPktCntInfo, 0, sizeof(TSP_DisconPktCnt_Info));
8092 TspDropPktCntInfo.TspCmd = tspInfo->TspCmd;
8093 TspDropPktCntInfo.TspFifo = tspInfo->TspFifo;
8094 TspDropPktCntInfo.TspSrc = tspInfo->TspSrc;
8095
8096 *pu32Cnt = HAL_TSP_Get_DropPktCnt(&TspDropPktCntInfo);
8097
8098 _TSP_RETURN(DRVTSP_OK);
8099 }
8100
8101 TSP_Result MDrv_TSP_Get_LockPktCnt(DrvTSP_LockPktCnt_info* tspInfo, MS_U32* pu32Cnt)
8102 {
8103 TSP_LockPktCnt_info TspLockCntInfo;
8104
8105 _TSP_ENTRY();
8106
8107 memset(&TspLockCntInfo, 0, sizeof(TSP_LockPktCnt_info));
8108 TspLockCntInfo.TspCmd = tspInfo->TspCmd;
8109 TspLockCntInfo.TspTsif = tspInfo->TspTsif;
8110
8111 *pu32Cnt = HAL_TSP_Get_LockPktCnt(&TspLockCntInfo);
8112
8113 _TSP_RETURN(DRVTSP_OK);
8114 }
8115
8116 TSP_Result MDrv_TSP_Get_AVPktCnt(DrvTSP_AVPktCnt_info* tspInfo, MS_U32* pu32Cnt)
8117 {
8118 TSP_AVPktCnt_info TspAVCntInfo;
8119
8120 _TSP_ENTRY();
8121
8122 memset(&TspAVCntInfo, 0, sizeof(TSP_AVPktCnt_info));
8123 TspAVCntInfo.TspCmd = tspInfo->TspCmd;
8124 TspAVCntInfo.TspFifo = tspInfo->TspFifo;
8125 TspAVCntInfo.TspFifoSrc = tspInfo->TspFifoSrc;
8126
8127 *pu32Cnt = HAL_TSP_GetAVPktCnt(&TspAVCntInfo);
8128
8129 _TSP_RETURN(DRVTSP_OK);
8130 }
8131 #endif
8132
8133 //-------------------------------------------------------------------------------------------------
8134 /// Get TEI Section error Packet count
8135 /// @param FltSrc \b IN: Filter source of packet
8136 /// @param pu32PktCnt \b OUT: pointer to store TEI packet count value
8137 /// @note
8138 //-------------------------------------------------------------------------------------------------
8139 TSP_Result MDrv_TSP_Get_SecTEI_PktCount(DrvTSP_FltType FltSrc, MS_U32* pu32PktCnt)
8140 {
8141 _TSP_ENTRY();
8142 if(FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE)
8143 {
8144 *pu32PktCnt = HAL_TSP_Get_SecTEI_PktCount(1);
8145 }
8146 else
8147 {
8148 *pu32PktCnt = HAL_TSP_Get_SecTEI_PktCount(0);
8149 }
8150
8151 _TSP_RETURN(DRVTSP_OK);
8152 }
8153
8154 //-------------------------------------------------------------------------------------------------
8155 /// Reset Section TEI error Packet count
8156 /// @param FltSrc \b IN: Filter source of packet
8157 /// @note
8158 //-------------------------------------------------------------------------------------------------
8159 TSP_Result MDrv_TSP_Reset_SecTEI_PktCount(DrvTSP_FltType FltSrc)
8160 {
8161 _TSP_ENTRY();
8162 if(FltSrc == E_DRVTSP_FLT_SOURCE_TYPE_FILE)
8163 {
8164 HAL_TSP_Reset_SecTEI_PktCount(1);
8165 }
8166 else
8167 {
8168 HAL_TSP_Reset_SecTEI_PktCount(0);
8169 }
8170
8171 _TSP_RETURN(DRVTSP_OK);
8172 }
8173
8174 //-------------------------------------------------------------------------------------------------
8175 /// Get Section Dis-continuity Packet count
8176 /// @param u32FltID \b IN: Filter source of packet
8177 /// @param pu32PktCnt \b OUT: pointer to store Dis-continuity packet count value
8178 /// @note
8179 //-------------------------------------------------------------------------------------------------
8180 TSP_Result MDrv_TSP_Get_SecDisCont_PktCount(MS_U32 u32FltID, MS_U32* pu32PktCnt)
8181 {
8182 _TSP_ENTRY();
8183 *pu32PktCnt = HAL_TSP_Get_SecDisCont_PktCount(u32FltID);
8184 _TSP_RETURN(DRVTSP_OK);
8185 }
8186
8187 //-------------------------------------------------------------------------------------------------
8188 /// Reset Section Dis-continuity Packet count
8189 /// @param u32FltID \b IN: Filter source of packet
8190 /// @note
8191 //-------------------------------------------------------------------------------------------------
8192 TSP_Result MDrv_TSP_Reset_SecDisCont_PktCount(MS_U32 u32FltID)
8193 {
8194 _TSP_ENTRY();
8195 HAL_TSP_Reset_SecDisCont_PktCount(u32FltID);
8196 _TSP_RETURN(DRVTSP_OK);
8197 }
8198
8199 //-------------------------------------------------------------------------------------------------------
8200 // Refer to _TSP_Isr_ProcSelf, this is for user mode to getting events when using kernel dmx driver
8201 // Plese update both _TSP_Isr_ProcSelf & MDrv_TSP_Get_IoSignal at the same time for synchrony ISR evets processing flow
8202 //-------------------------------------------------------------------------------------------------------
8203 TSP_Result MDrv_TSP_Wait_IoSignal(DrvTSP_IoSignal *pstIoSignal)
8204 {
8205 #ifdef MSOS_TYPE_LINUX_KERNEL
8206 MS_U32 u32ii, u32Evt = 0;
8207
8208 for(u32ii = 0; u32ii < TSP_MAX_PVRSIGFLAG_NUM; u32ii++)
8209 {
8210 pstIoSignal->u32PvrBufFullFlag[u32ii] = 0;
8211 }
8212 for(u32ii = 0; u32ii < TSP_MAX_SIGFLAG_NUM; u32ii++)
8213 {
8214 pstIoSignal->u32SecRdyFlag[u32ii] = 0;
8215 pstIoSignal->u32SecOvfFlag[u32ii] = 0;
8216 }
8217
8218 _TSP_GetEvent(u32Evt, TSP_TASK_EVENT_GROUP_SELF|TSP_TASK_EVENT_FLT_FREE, OSAL_EVENT_OR_CLEAR, MSOS_WAIT_FOREVER);
8219 pstIoSignal->u32TspEvt = u32Evt;
8220 //ULOGD("TSP", "u32TspEvt %lx\n", pstIoSignal->u32TspEvt);
8221
8222 #endif //end of MSOS_TYPE_LINUX_KERNEL
8223
8224 return DRVTSP_OK;
8225 }
8226
8227 TSP_Result MDrv_TSP_Proc_IoSignal(DrvTSP_IoSignal *pstIoSignal)
8228 {
8229
8230 #ifdef MSOS_TYPE_LINUX_KERNEL
8231 TSP_Result Ret = DRVTSP_OK;
8232 MS_U32 u32ii, u32jj;
8233 MS_U32 u32GroupNum = (TSP_SECFLT_NUM_All + 31) >> 5;
8234
8235 if(pstIoSignal->u32TspEvt & TSP_TASK_EVENT_FLT_FREE)
8236 {
8237 _TSP_Isr_ProcSelf(TSP_TASK_EVENT_FLT_FREE, &Ret);
8238 pstIoSignal->u32TspEvt &= ~TSP_TASK_EVENT_FLT_FREE;
8239 }
8240
8241 #ifndef NO_PVR
8242 // set PVR buffer events
8243 if (pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_PVR0_RDY_POLL|TSP_TASK_EVENT_PVR1_RDY_POLL|TSP_TASK_EVENT_PVR0_RDY_SELF|TSP_TASK_EVENT_PVR1_RDY_SELF))
8244 {
8245 if (_ptsp_res->_PvrEvtNotify[0] && _ptsp_res->_PvrCallback[0])
8246 {
8247 switch(pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL | TSP_TASK_EVENT_PVR0_RDY_SELF | TSP_TASK_EVENT_PVR1_RDY_SELF))
8248 {
8249 case TSP_TASK_EVENT_PVR0_RDY_SELF:
8250 case TSP_TASK_EVENT_PVR0_RDY_POLL:
8251 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_FULL))
8252 {
8253 pstIoSignal->u32PvrBufFullFlag[0] = 1;
8254 }
8255 break;
8256 case TSP_TASK_EVENT_PVR1_RDY_SELF:
8257 case TSP_TASK_EVENT_PVR1_RDY_POLL:
8258 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_FULL))
8259 {
8260 pstIoSignal->u32PvrBufFullFlag[0] |= 2;
8261 }
8262 break;
8263 case (TSP_TASK_EVENT_PVR0_RDY_SELF | TSP_TASK_EVENT_PVR1_RDY_SELF):
8264 case (TSP_TASK_EVENT_PVR0_RDY_POLL | TSP_TASK_EVENT_PVR1_RDY_POLL):
8265 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[0], E_DRVTSP_EVENT_PVRBUF_OVERFLOW))
8266 {
8267 pstIoSignal->u32PvrBufFullFlag[0] = 0xFF;
8268 }
8269 break;
8270 default:
8271 break;
8272 }
8273 }
8274 }
8275
8276 #ifdef TS2_IF_SUPPORT
8277 if (pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_CBPVR0_RDY_POLL|TSP_TASK_EVENT_CBPVR0_RDY_SELF))
8278 {
8279 if (_ptsp_res->_PvrEvtNotify[1] && _ptsp_res->_PvrCallback[1])
8280 {
8281 switch (pstIoSignal->u32TspEvt & (TSP_TASK_EVENT_CBPVR0_RDY_POLL | TSP_TASK_EVENT_CBPVR0_RDY_SELF))
8282 {
8283 case TSP_TASK_EVENT_CBPVR0_RDY_POLL:
8284 case TSP_TASK_EVENT_CBPVR0_RDY_SELF:
8285 if (HAS_FLAG(_ptsp_res->_PvrEvtNotify[1], E_DRVTSP_EVENT_CBBUF_FULL))
8286 {
8287 pstIoSignal->u32PvrBufFullFlag[1] = 1;
8288 }
8289 break;
8290 }
8291 }
8292 }
8293 #endif //endof TS2_IF_SUPPORT
8294
8295 #endif //end of NO_PVR
8296
8297 if (pstIoSignal->u32TspEvt & TSP_TASK_EVENT_SECTION_SELF)
8298 {
8299 for(u32ii = 0; u32ii < u32GroupNum; u32ii++)
8300 {
8301 MDrv_TSP_Get_SecEvents(u32ii, pstIoSignal);
8302 }
8303 }
8304
8305 #endif //end of MSOS_TYPE_LINUX_KERN
8306
8307 return DRVTSP_OK;
8308 }
8309
8310 TSP_Result MDrv_TSP_Get_SecEvents(MS_U32 u32Group, DrvTSP_IoSignal *pstIoSignal)
8311 {
8312 MS_U32 u32PidFltGroup = 0, u32SecFlt = 0, u32PidFlt = 0;
8313 MS_U32 u32RdyMask = 0, u32OvfMask = 0;
8314
8315 _TSP_GetModeSecRdy(u32Group, 0xFFFFFFFF, &u32RdyMask, OSAL_EVENT_OR_CLEAR);
8316 _TSP_GetModeSecOvf(u32Group, 0xFFFFFFFF, &u32OvfMask, OSAL_EVENT_OR_CLEAR);
8317
8318 u32SecFlt = u32Group << 5;
8319 while(u32RdyMask)
8320 {
8321 if(u32RdyMask & 0x01)
8322 {
8323 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltMap[u32SecFlt] != u32SecFlt)
8324 {
8325 for(u32PidFlt = 0; u32PidFlt < TSP_PIDFLT_NUM_ALL; u32PidFlt++)
8326 {
8327 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltMap[u32PidFlt] == u32SecFlt)
8328 {
8329 break;
8330 }
8331 }
8332 }
8333 else
8334 {
8335 u32PidFlt = u32SecFlt;
8336 }
8337 if(u32PidFlt < TSP_PIDFLT_NUM_ALL)
8338 {
8339 if((_ptsp_res->_TspState[pstIoSignal->u32Eng].FltState[u32PidFlt] & E_DRVTSP_FLT_STATE_ENABLE)&&
8340 (_ptsp_res->_TspState[pstIoSignal->u32Eng].SecFltEvtNotify[u32SecFlt] & E_DRVTSP_EVENT_DATA_READY) &&
8341 (_ptsp_res->_TspState[pstIoSignal->u32Eng].SecFltCallback[u32SecFlt]))
8342 {
8343 u32PidFltGroup = u32PidFlt >> 5;
8344 pstIoSignal->u32SecRdyFlag[u32PidFltGroup] |= (1 << (u32PidFlt & 0x1F));
8345 }
8346 }
8347 }
8348 u32RdyMask >>= 1;
8349 u32SecFlt++;
8350 }
8351
8352 u32SecFlt = u32Group << 5;
8353 while(u32OvfMask)
8354 {
8355 if(u32OvfMask & 0x01)
8356 {
8357 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltMap[u32SecFlt] != u32SecFlt)
8358 {
8359 for(u32PidFlt = 0; u32PidFlt < TSP_PIDFLT_NUM_ALL; u32PidFlt++)
8360 {
8361 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltMap[u32PidFlt] == u32SecFlt)
8362 {
8363 break;
8364 }
8365 }
8366 }
8367 else
8368 {
8369 u32PidFlt = u32SecFlt;
8370 }
8371 if(u32PidFlt < TSP_PIDFLT_NUM_ALL)
8372 {
8373 if(_ptsp_res->_TspState[pstIoSignal->u32Eng].FltState[u32PidFlt] & E_DRVTSP_FLT_STATE_ENABLE)
8374 {
8375 _TSP_IND_LOCK();
8376 _TSP_PidFlt_Disable(pstIoSignal->u32Eng, u32PidFlt); // ???? move out --> OK // // critical section
8377 _TSP_IND_UNLOCK();
8378 }
8379 if ((_ptsp_res->_TspState[pstIoSignal->u32Eng].FltState[u32PidFlt] != E_DRVTSP_FLT_STATE_FREE) &&
8380 (_ptsp_res->_TspState[pstIoSignal->u32Eng].SecFltEvtNotify[u32SecFlt] & E_DRVTSP_EVENT_BUF_OVERFLOW) &&
8381 (_ptsp_res->_TspState[pstIoSignal->u32Eng].SecFltCallback[u32SecFlt]))
8382 {
8383 u32PidFltGroup = u32PidFlt >> 5;
8384 pstIoSignal->u32SecOvfFlag[u32PidFltGroup] |= (1 << (u32PidFlt & 0x1F));
8385 }
8386 }
8387 }
8388 u32OvfMask >>= 1;
8389 u32SecFlt++;
8390 }
8391
8392 return DRVTSP_OK;
8393 }
8394
8395
8396