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Searched refs:TSP_CTRL1_CMDQ_RESET (Results 1 – 25 of 35) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c350 REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Reset()
363 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Reset()
1667 REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Filein_CmdQRst()
1684 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Filein_CmdQRst()
H A DregTSP.h804 #define TSP_CTRL1_CMDQ_RESET 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DregTSP.h762 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
H A DhalTSP.c2399 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_CMDQ_RESET)); in HAL_TSP_CmdQ_Reset()
2401 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_CMDQ_RESET)); in HAL_TSP_CmdQ_Reset()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DregTSP.h762 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
H A DhalTSP.c2403 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_CMDQ_RESET)); in HAL_TSP_CmdQ_Reset()
2405 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_CMDQ_RESET)); in HAL_TSP_CmdQ_Reset()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DregTSP.h758 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
H A DhalTSP.c2422 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_CMDQ_RESET)); in HAL_TSP_CmdQ_Reset()
2424 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_CMDQ_RESET)); in HAL_TSP_CmdQ_Reset()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h891 #define TSP_CTRL1_CMDQ_RESET 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.c451 REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Reset()
464 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Reset()
2468 REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Filein_CmdQRst()
2488 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Filein_CmdQRst()
H A DregTSP.h840 #define TSP_CTRL1_CMDQ_RESET 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DregTSP.h879 #define TSP_CTRL1_CMDQ_RESET 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c375 REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Reset()
388 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Reset()
2531 REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Filein_CmdQRst()
2551 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Filein_CmdQRst()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c461 REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Reset()
474 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Reset()
2679 REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Filein_CmdQRst()
2699 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_CMDQ_RESET); in HAL_TSP_Filein_CmdQRst()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h885 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h876 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h907 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h911 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DregTSP.h911 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DregTSP.h918 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DregTSP.h918 #define TSP_CTRL1_CMDQ_RESET 0x0800UL macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h842 #define TSP_CTRL1_CMDQ_RESET 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h880 #define TSP_CTRL1_CMDQ_RESET 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h868 #define TSP_CTRL1_CMDQ_RESET 0x0800 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h868 #define TSP_CTRL1_CMDQ_RESET 0x0800 macro

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