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Searched refs:REG_Ctrl_TSO1 (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tso/
H A DregTSO.h533 } REG_Ctrl_TSO1; typedef
H A DhalTSO.c122 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
296 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tso/
H A DregTSO.h560 } REG_Ctrl_TSO1; typedef
H A DhalTSO.c122 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
352 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tso/
H A DregTSO.h560 } REG_Ctrl_TSO1; typedef
H A DhalTSO.c122 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
360 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tso/
H A DregTSO.h581 } REG_Ctrl_TSO1; typedef
H A DhalTSO.c127 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
312 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tso/
H A DregTSO.h590 } REG_Ctrl_TSO1; typedef
H A DhalTSO.c127 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
368 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tso/
H A DregTSO.h590 } REG_Ctrl_TSO1; typedef
H A DhalTSO.c127 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
368 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tso/
H A DregTSO.h587 } REG_Ctrl_TSO1; typedef
H A DhalTSO.c127 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
359 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/
H A DregTSO.h587 } REG_Ctrl_TSO1; typedef
H A DhalTSO.c127 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
359 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c46 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
227 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_u32TSORegBase+ REG_CTRL_BASE_TSO1); // 0x1612 in HAL_TSO_SetBank()
H A DregTSO.h849 } REG_Ctrl_TSO1; typedef
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c46 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
227 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_u32TSORegBase+ REG_CTRL_BASE_TSO1); // 0x1612 in HAL_TSO_SetBank()
H A DregTSO.h849 } REG_Ctrl_TSO1; typedef
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DregTSO.h877 } REG_Ctrl_TSO1; typedef
H A DhalTSO.c46 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
227 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_u32TSORegBase+ REG_CTRL_BASE_TSO1); // 0x1612 in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c45 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
227 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_u32TSORegBase+ REG_CTRL_BASE_TSO1); // 0x1612 in HAL_TSO_SetBank()
H A DregTSO.h901 } REG_Ctrl_TSO1; typedef
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c45 static REG_Ctrl_TSO1* _TSOCtrl1 = NULL;
228 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_u32TSORegBase+ REG_CTRL_BASE_TSO1); // 0x1612 in HAL_TSO_SetBank()

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