Home
last modified time | relevance | path

Searched refs:REG_CTRL_BASE_TSO (Results 1 – 25 of 26) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tso/
H A DregTSO.h195 #define REG_CTRL_BASE_TSO (0x27400) // 0x113A macro
H A DhalTSO.c295 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tso/
H A DregTSO.h204 #define REG_CTRL_BASE_TSO (0x27400UL) // 0x113A macro
H A DhalTSO.c351 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tso/
H A DregTSO.h204 #define REG_CTRL_BASE_TSO (0x27400UL) // 0x113A macro
H A DhalTSO.c144 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…
359 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tso/
H A DregTSO.h194 #define REG_CTRL_BASE_TSO (0x27400UL) // 0x113A macro
H A DhalTSO.c150 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…
311 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tso/
H A DregTSO.h204 #define REG_CTRL_BASE_TSO (0x27400UL) // 0x113A macro
H A DhalTSO.c152 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…
367 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tso/
H A DregTSO.h204 #define REG_CTRL_BASE_TSO (0x27400UL) // 0x113A macro
H A DhalTSO.c152 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…
367 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tso/
H A DregTSO.h201 #define REG_CTRL_BASE_TSO (0x27400UL) // 0x113A macro
H A DhalTSO.c152 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…
358 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/
H A DregTSO.h201 #define REG_CTRL_BASE_TSO (0x27400UL) // 0x113A macro
H A DhalTSO.c152 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…
358 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DregTSO.h172 #define REG_CTRL_BASE_TSO (0xE0C00UL) // 0x1706 macro
H A DhalTSO.c226 _TSOCtrl = (REG_Ctrl_TSO*)(_u32TSORegBase+ REG_CTRL_BASE_TSO); // 0x1706 in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DregTSO.h172 #define REG_CTRL_BASE_TSO (0xE0C00UL) // 0x1706 macro
H A DhalTSO.c226 _TSOCtrl = (REG_Ctrl_TSO*)(_u32TSORegBase+ REG_CTRL_BASE_TSO); // 0x1706 in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DregTSO.h172 #define REG_CTRL_BASE_TSO (0xE0C00UL) // 0x1706 macro
H A DhalTSO.c226 _TSOCtrl = (REG_Ctrl_TSO*)(_u32TSORegBase+ REG_CTRL_BASE_TSO); // 0x1706 in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DregTSO.h172 #define REG_CTRL_BASE_TSO (0xE0C00UL) // 0x1706 macro
H A DhalTSO.c226 _TSOCtrl = (REG_Ctrl_TSO*)(_u32TSORegBase+ REG_CTRL_BASE_TSO); // 0x1706 in HAL_TSO_SetBank()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DregTSO.h172 #define REG_CTRL_BASE_TSO (0xE0C00UL) // 0x1706 macro

12