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Searched refs:el_status (Results 1 – 16 of 16) sorted by relevance

/rk3399_ARM-atf/plat/imx/common/
H A Dimx_bl31_common.c11 unsigned long el_status; in plat_get_spsr_for_bl33_entry() local
16 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in plat_get_spsr_for_bl33_entry()
17 el_status &= ID_AA64PFR0_ELX_MASK; in plat_get_spsr_for_bl33_entry()
19 mode = (el_status) ? MODE_EL2 : MODE_EL1; in plat_get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/intel/soc/common/aarch64/
H A Dplatform_common.c36 unsigned long el_status; in socfpga_get_spsr_for_bl33_entry() local
41 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in socfpga_get_spsr_for_bl33_entry()
42 el_status &= ID_AA64PFR0_ELX_MASK; in socfpga_get_spsr_for_bl33_entry()
44 mode = (el_status) ? MODE_EL2 : MODE_EL1; in socfpga_get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/marvell/armada/common/aarch64/
H A Dmarvell_common.c110 unsigned long el_status; in marvell_get_spsr_for_bl33_entry() local
115 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in marvell_get_spsr_for_bl33_entry()
116 el_status &= ID_AA64PFR0_ELX_MASK; in marvell_get_spsr_for_bl33_entry()
118 mode = (el_status) ? MODE_EL2 : MODE_EL1; in marvell_get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/hisilicon/poplar/
H A Dbl2_plat_setup.c63 unsigned long el_status; in poplar_get_spsr_for_bl33_entry() local
68 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in poplar_get_spsr_for_bl33_entry()
69 el_status &= ID_AA64PFR0_ELX_MASK; in poplar_get_spsr_for_bl33_entry()
71 mode = (el_status) ? MODE_EL2 : MODE_EL1; in poplar_get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/imx/imx93/
H A Dimx93_bl31_setup.c45 unsigned long el_status; in get_spsr_for_bl33_entry() local
50 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
51 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
53 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/ti/common/
H A Dti_bl31_setup.c34 unsigned long el_status; in k3_get_spsr_for_bl33_entry() local
39 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in k3_get_spsr_for_bl33_entry()
40 el_status &= ID_AA64PFR0_ELX_MASK; in k3_get_spsr_for_bl33_entry()
42 mode = (el_status) ? MODE_EL2 : MODE_EL1; in k3_get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/intel/soc/stratix10/
H A Dbl2_plat_setup.c144 unsigned long el_status; in get_spsr_for_bl33_entry() local
149 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
150 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
152 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/intel/soc/agilex/
H A Dbl2_plat_setup.c157 unsigned long el_status; in get_spsr_for_bl33_entry() local
162 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
163 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
165 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/intel/soc/agilex5/
H A Dbl2_plat_setup.c219 unsigned long el_status; in get_spsr_for_bl33_entry() local
224 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
225 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
227 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/socionext/synquacer/
H A Dsq_bl31_setup.c93 unsigned long el_status; in sq_get_spsr_for_bl33_entry() local
98 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in sq_get_spsr_for_bl33_entry()
99 el_status &= ID_AA64PFR0_ELX_MASK; in sq_get_spsr_for_bl33_entry()
101 mode = (el_status) ? MODE_EL2 : MODE_EL1; in sq_get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/imx/imx8m/imx8mn/
H A Dimx8mn_bl31_setup.c92 unsigned long el_status; in get_spsr_for_bl33_entry() local
97 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
98 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
100 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/imx/imx8m/imx8mq/
H A Dimx8mq_bl31_setup.c117 unsigned long el_status; in get_spsr_for_bl33_entry() local
122 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
123 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
125 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/imx/imx8m/imx8mm/
H A Dimx8mm_bl31_setup.c121 unsigned long el_status; in get_spsr_for_bl33_entry() local
126 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
127 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
129 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/imx/imx8m/imx8mp/
H A Dimx8mp_bl31_setup.c123 unsigned long el_status; in get_spsr_for_bl33_entry() local
128 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
129 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
131 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/imx/imx8qx/
H A Dimx8qx_bl31_setup.c98 unsigned long el_status; in get_spsr_for_bl33_entry() local
103 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
104 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
106 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/rk3399_ARM-atf/plat/imx/imx8qm/
H A Dimx8qm_bl31_setup.c77 unsigned long el_status; in get_spsr_for_bl33_entry() local
82 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
83 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
85 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()