| /rk3399_ARM-atf/bl31/ |
| H A D | bl31_traps.c | 71 return MODE_EL2; in target_el()
121 if (target_el == MODE_EL2) { in create_spsr()
167 ((target_el == MODE_EL1) || ((target_el == MODE_EL2) && is_tge_enabled())) && in create_spsr()
209 if (target_el == MODE_EL2) { in create_spsr()
254 if (to_el == MODE_EL2) { in inject_undef64()
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| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_common.c | 89 mode = (el_implemented(2) != EL_IMPL_NONE) ? MODE_EL2 : MODE_EL1; in arm_get_spsr()
196 assert((client_mode == MODE_EL2) || (client_mode == MODE_EL1)); in plat_sdei_validate_entry_point()
197 if (client_mode == MODE_EL2) { in plat_sdei_validate_entry_point()
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| /rk3399_ARM-atf/plat/imx/common/ |
| H A D | imx_bl31_common.c | 19 mode = (el_status) ? MODE_EL2 : MODE_EL1; in plat_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/arm/common/aarch64/ |
| H A D | execution_state_switch.c | 93 from_el2 = caller_64 ? (GET_EL(spsr) == MODE_EL2) : in arm_execution_state_switch()
138 el = from_el2 ? MODE_EL2 : MODE_EL1; in arm_execution_state_switch()
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| /rk3399_ARM-atf/plat/intel/soc/common/aarch64/ |
| H A D | platform_common.c | 44 mode = (el_status) ? MODE_EL2 : MODE_EL1; in socfpga_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/brcm/common/ |
| H A D | brcm_common.c | 45 mode = el_implemented(2) ? MODE_EL2 : MODE_EL1; in brcm_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/qti/msm8916/ |
| H A D | msm8916_bl31_setup.c | 29 .bl33.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
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| /rk3399_ARM-atf/plat/common/aarch64/ |
| H A D | plat_common.c | 75 case MODE_EL2: in get_el_str()
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| /rk3399_ARM-atf/plat/marvell/armada/common/aarch64/ |
| H A D | marvell_common.c | 118 mode = (el_status) ? MODE_EL2 : MODE_EL1; in marvell_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/bl1/aarch64/ |
| H A D | bl1_context_mgmt.c | 99 mode = MODE_EL2; in bl1_prepare_next_image()
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| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_image_desc.c | 61 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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| /rk3399_ARM-atf/plat/qti/common/src/ |
| H A D | qti_image_desc.c | 61 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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| /rk3399_ARM-atf/plat/renesas/common/ |
| H A D | bl2_plat_mem_params_desc.c | 21 #define BL33_MODE MODE_EL2
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| /rk3399_ARM-atf/plat/arm/board/corstone1000/common/ |
| H A D | corstone1000_bl2_mem_params_desc.c | 80 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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| /rk3399_ARM-atf/plat/socionext/uniphier/ |
| H A D | uniphier_image_desc.c | 89 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | sunxi_bl31_setup.c | 101 bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/services/std_svc/drtm/ |
| H A D | drtm_main.h | 52 DLME_AT_EL2 = MODE_EL2
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| /rk3399_ARM-atf/plat/st/stm32mp2/ |
| H A D | plat_bl2_mem_params_desc.c | 16 #define BL33_MODE MODE_EL2
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| /rk3399_ARM-atf/plat/hisilicon/poplar/ |
| H A D | bl2_plat_setup.c | 71 mode = (el_status) ? MODE_EL2 : MODE_EL1; in poplar_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/imx/imx93/ |
| H A D | imx93_bl31_setup.c | 53 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/ti/common/ |
| H A D | ti_bl31_setup.c | 42 mode = (el_status) ? MODE_EL2 : MODE_EL1; in k3_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/rpi/common/ |
| H A D | rpi3_common.c | 203 return SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in rpi3_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/intel/soc/stratix10/ |
| H A D | bl2_plat_setup.c | 152 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/intel/soc/agilex/ |
| H A D | bl2_plat_setup.c | 165 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/ |
| H A D | bl2_plat_setup.c | 227 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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