| #
7e848540 |
| 20-Mar-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "dtpm_poc" into integration
* changes: feat(docs): update mboot threat model with dTPM docs(tpm): add design documentation for dTPM fix(rpi3): expose BL1_RW to BL2 ma
Merge changes from topic "dtpm_poc" into integration
* changes: feat(docs): update mboot threat model with dTPM docs(tpm): add design documentation for dTPM fix(rpi3): expose BL1_RW to BL2 map for mboot feat(rpi3): add dTPM backed measured boot feat(tpm): add Infineon SLB9670 GPIO SPI config feat(tpm): add tpm drivers and framework feat(io): add generic gpio spi bit-bang driver feat(rpi3): implement eventlog handoff to BL33 feat(rpi3): implement mboot for rpi3
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| #
9acaaded |
| 07-Nov-2024 |
Abhi Singh <abhi.singh@arm.com> |
fix(rpi3): expose BL1_RW to BL2 map for mboot
BL2 requires the ability to access the TCG Event Log during Measured Boot. Currently the Platform hangs since the Event Log is not exposed to BL2's mma
fix(rpi3): expose BL1_RW to BL2 map for mboot
BL2 requires the ability to access the TCG Event Log during Measured Boot. Currently the Platform hangs since the Event Log is not exposed to BL2's mmap. Define a RPI3_BL1_RW region to be added to the BL2 Image, if Measured Boot is enabled.
Change-Id: Ic236a80e73ea342b4590cfb65bafbb8ffac17085 Signed-off-by: Abhi Singh <abhi.singh@arm.com>
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| #
87e9ee87 |
| 28-Nov-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "dtpm_poc" into integration
* changes: refactor(rpi3): move mbedtls helper to common code fix(rpi3): use correct name for include guards
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| #
1c800903 |
| 05-Nov-2024 |
Abhi Singh <abhi.singh@arm.com> |
refactor(rpi3): move mbedtls helper to common code
In order to support measured boot we need plat_get_mbedtls_heap, this function currently resides in rpi3_trusted_boot.c, but we do not need trusted
refactor(rpi3): move mbedtls helper to common code
In order to support measured boot we need plat_get_mbedtls_heap, this function currently resides in rpi3_trusted_boot.c, but we do not need trusted board boot to use measured boot, so moving this to common code removes the need to compile rpi3_trusted_boot.c
Change-Id: I6ac6dfa8c540e456d7cb6932098c921907ad086a Signed-off-by: Tushar Khandelwal <tushar.khandelwal@arm.com> Signed-off-by: Abhi Singh <abhi.singh@arm.com>
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| #
5318255f |
| 22-Mar-2024 |
André Przywara <andre.przywara@arm.com> |
Merge changes Id72a0370,I2bafba38,I2bd48441,I164c579c,Iddf8aea0, ... into integration
* changes: feat(rpi): add Raspberry Pi 5 support fix(rpi): consider MT when calculating core index from MPID
Merge changes Id72a0370,I2bafba38,I2bd48441,I164c579c,Iddf8aea0, ... into integration
* changes: feat(rpi): add Raspberry Pi 5 support fix(rpi): consider MT when calculating core index from MPIDR refactor(rpi): move register definitions out of rpi_hw.h refactor(rpi): add platform macro for the crash UART base address refactor(rpi): split out console registration logic refactor(rpi): move more platform-specific code into common
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| #
b5029782 |
| 01-Dec-2023 |
Mario Bălănică <mariobalanica02@gmail.com> |
refactor(rpi): split out console registration logic
Detection of the UART in use and GPIO code only apply to RPi 3 and 4.
RPi 5 has a dedicated PL011 debug port.
Change-Id: Iddf8aea01278e2b79b4e7c
refactor(rpi): split out console registration logic
Detection of the UART in use and GPIO code only apply to RPi 3 and 4.
RPi 5 has a dedicated PL011 debug port.
Change-Id: Iddf8aea01278e2b79b4e7c476740f1add8c419f0 Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com>
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| #
c9796852 |
| 18-Mar-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "rpix-multi-console" into integration
* changes: rpi: docs: Update maintainers file to new RPi directory scheme rpi: console: Autodetect Mini-UART vs. PL011 configuratio
Merge changes from topic "rpix-multi-console" into integration
* changes: rpi: docs: Update maintainers file to new RPi directory scheme rpi: console: Autodetect Mini-UART vs. PL011 configuration rpi3: build: Include GPIO driver in all BL stages rpi: Allow using PL011 UART for RPi3/RPi4 rpi3: console: Use same "clock-less" setup scheme as RPi4 rpi3: gpio: Simplify GPIO setup
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| #
9cc3fa1b |
| 11-Mar-2020 |
Andre Przywara <andre.przywara@arm.com> |
rpi: console: Autodetect Mini-UART vs. PL011 configuration
The Raspberry Pi has two different UART devices pin-muxed to GPIO 14&15: One ARM PL011 one and the 8250 compatible "Mini-UART". A dtoverlay
rpi: console: Autodetect Mini-UART vs. PL011 configuration
The Raspberry Pi has two different UART devices pin-muxed to GPIO 14&15: One ARM PL011 one and the 8250 compatible "Mini-UART". A dtoverlay parameter in config.txt will tell the firmware to switch between the two: it will setup the right clocks and will configure the pinmuxes accordingly.
To autodetect the user's choice, we read the pinmux register and check its setting: ALT5 (0x2) means the Mini-UART is used, ALT0 (0x4) points to the PL011. Based on that we select the UART driver to initialise.
This will allow console output in any case.
Change-Id: I620d3ce68de6c6576599f2a405636020e1fd1376 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
5e6d821c |
| 10-Mar-2020 |
Andre Przywara <andre.przywara@arm.com> |
rpi: Allow using PL011 UART for RPi3/RPi4
The Broadcom 283x SoCs feature multiple UARTs: the mostly used "Mini-UART", which is an 8250 compatible IP, and at least one PL011. While the 8250 is usuall
rpi: Allow using PL011 UART for RPi3/RPi4
The Broadcom 283x SoCs feature multiple UARTs: the mostly used "Mini-UART", which is an 8250 compatible IP, and at least one PL011. While the 8250 is usually used for serial console purposes, it suffers from a design flaw, where its clock depends on the VPU clock, which can change at runtime. This will reliably mess up the baud rate. To avoid this problem, people might choose to use the PL011 UART for the serial console, which is pin-mux'ed to the very same GPIO pins. This can be done by adding "miniuart-bt" to the "dtoverlay=" line in config.txt.
To prepare for this situation, use the newly gained freedom of sharing one console_t pointer across different UART drivers, to introduce the option of choosing the PL011 for the console.
This is for now hard-coded to choose the Mini-UART by default. A follow-up patch will introduce automatic detection.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: I8cf2522151e09ff4ff94a6d396aec6fc4b091a05
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| #
795aefe5 |
| 10-Mar-2020 |
Andre Przywara <andre.przywara@arm.com> |
rpi3: console: Use same "clock-less" setup scheme as RPi4
In the wake of the upcoming unification of the console setup code between RPi3 and RPi4, extend the "clock-less" setup scheme to the RPi3. T
rpi3: console: Use same "clock-less" setup scheme as RPi4
In the wake of the upcoming unification of the console setup code between RPi3 and RPi4, extend the "clock-less" setup scheme to the RPi3. This avoid programming any clocks or baud rate registers, which makes the port more robust against GPU firmware changes.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: Ida83a963bb18a878997e9cbd55f8ceac6a2e1c1f
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| #
896d684d |
| 25-Feb-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge changes from topic "console_t_cleanup" into integration
* changes: marvell: Consolidate console register calls uniphier: Use generic console_t data structure spe: Use generic console_t d
Merge changes from topic "console_t_cleanup" into integration
* changes: marvell: Consolidate console register calls uniphier: Use generic console_t data structure spe: Use generic console_t data structure LS 16550: Use generic console_t data structure stm32: Use generic console_t data structure rcar: Use generic console_t data structure a3700: Use generic console_t data structure 16550: Use generic console_t data structure imx: Use generic console_t data structure
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| #
98964f05 |
| 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
16550: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data stru
16550: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as well, let's use that generic location and drop the UART driver specific data structure at all.
Change-Id: I5c2fe3b6a667acf80c808cfec4a64059a2c9c25f Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
17b0bb6c |
| 27-Sep-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "raspberry-pi-4-support" into integration
* changes: rpi4: Add initial documentation file rpi4: Add stdout-path to device tree rpi4: Add GIC maintenance interrupt to G
Merge changes from topic "raspberry-pi-4-support" into integration
* changes: rpi4: Add initial documentation file rpi4: Add stdout-path to device tree rpi4: Add GIC maintenance interrupt to GIC DT node rpi4: Cleanup memory regions, move pens to first page rpi4: Reserve resident BL31 region from non-secure world rpi4: Amend DTB to advertise PSCI rpi4: Determine BL33 entry point at runtime rpi4: Accommodate "armstub8.bin" header at the beginning of BL31 image Add basic support for Raspberry Pi 4 rpi3: Allow runtime determination of UART base clock rate FDT helper functions: Respect architecture in PSCI function IDs FDT helper functions: Add function documentation
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| #
448fb352 |
| 11-Jul-2019 |
Andre Przywara <andre.przywara@arm.com> |
rpi4: Determine BL33 entry point at runtime
Now that we have the armstub magic value in place, the GPU firmware will write the kernel load address (and DTB address) into our special page, so we can
rpi4: Determine BL33 entry point at runtime
Now that we have the armstub magic value in place, the GPU firmware will write the kernel load address (and DTB address) into our special page, so we can always easily access the actual location without hardcoding any addresses into the BL31 image.
Make the compile-time defined PRELOADED_BL33_BASE macro optional, and read the BL33 entry point from the magic location, if the macro was not defined. We do the same for the DTB address.
This also splits the currently "common" definition of plat_get_ns_image_entrypoint() to be separate between RPi3 and RPi4.
Change-Id: I6f26c0adc6fce2df47786b271c490928b4529abb Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
7c0a1877 |
| 04-Aug-2019 |
Andre Przywara <andre.przywara@arm.com> |
rpi3: Allow runtime determination of UART base clock rate
At the moment the UART input clock rate is hard coded at compile time. This works as long as the GPU firmware always sets up the same rate,
rpi3: Allow runtime determination of UART base clock rate
At the moment the UART input clock rate is hard coded at compile time. This works as long as the GPU firmware always sets up the same rate, which does not seem to be true for the Raspberry Pi 4.
In preparation for being able to change this at runtime, add a base clock parameter to the console setup function. This is still hardcoded for the Raspberry Pi 3.
Change-Id: I398bc2f1e9b46f7af9a84cb0b33cbe8e78f2d900 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
ed01e0c4 |
| 16-Sep-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "raspberry-pi-4-support" into integration
* changes: rpi3: Do prescaler and control setup in C rpi3: Prepare for supporting a GIC (in RPi4) rpi3: Make SHARED_RAM optio
Merge changes from topic "raspberry-pi-4-support" into integration
* changes: rpi3: Do prescaler and control setup in C rpi3: Prepare for supporting a GIC (in RPi4) rpi3: Make SHARED_RAM optional rpi3: Rename RPI3_IO_BASE to RPI_IO_BASE rpi3: Move shared rpi3 files into common directory
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| #
a95e6415 |
| 15-Jul-2019 |
Andre Przywara <andre.przywara@arm.com> |
rpi3: Make SHARED_RAM optional
The existing Raspberry Pi 3 port sports a number of memory regions, which are used for several purposes. The upcoming RPi4 port will not use all of those, so make the
rpi3: Make SHARED_RAM optional
The existing Raspberry Pi 3 port sports a number of memory regions, which are used for several purposes. The upcoming RPi4 port will not use all of those, so make the SHARED_RAM region optional, by only mapping it if it has actually been defined. This helps to get a cleaner RPi4 port.
Change-Id: Id69677b7fb6ed48d9f238854b610896785db8cab Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
4f2b9848 |
| 09-Jul-2019 |
Andre Przywara <andre.przywara@arm.com> |
rpi3: Move shared rpi3 files into common directory
To be able to share code more easily between the existing Raspberry Pi 3 and the upcoming Raspberry Pi 4 platform, move some code which is not boar
rpi3: Move shared rpi3 files into common directory
To be able to share code more easily between the existing Raspberry Pi 3 and the upcoming Raspberry Pi 4 platform, move some code which is not board specific into a "common" directory.
Change-Id: I9211ab2d754b040128fac13c2f0a30a5cc8c7f2c Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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