Merge "feat(drtm): remove todo that is implemented" into integration

feat(drtm): remove todo that is implemented

The PE state is set in compliance with the PSCI specification.
The general purpose registers are reset, the PC is set to the
entry point, the SPSR registe

feat(drtm): remove todo that is implemented

The PE state is set in compliance with the PSCI specification.
The general purpose registers are reset, the PC is set to the
entry point, the SPSR register is set. The todo can be removed
as the PE state is set appropriately.

Change-Id: Ib41bbf119e6175a11b37f07fe3df9e81fe10b5f6
Signed-off-by: Xialin Liu <xialin.liu@arm.com>

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Merge changes I0b0443d5,Ic454a87a into integration

* changes:
fix(gic): quote the correct flag on error
feat(lib): add a generic EXTRACT macro

feat(lib): add a generic EXTRACT macro

The EXTRACT macro is useful to extract a named field from a numeric
value, usually a register. It is functionally identical to the `ubfx`
instruction and uses

feat(lib): add a generic EXTRACT macro

The EXTRACT macro is useful to extract a named field from a numeric
value, usually a register. It is functionally identical to the `ubfx`
instruction and uses the same #defines (REG_FIELD_SHIFT and
REG_FIELD_WIDTH).

This is the same macro that we use in tftf. It works well there and is
quite useful for manipulating register fields concisely.

This macro replaces the EXTRACT_FIELD macro. Their function is
identical, however, EXTRACT allows for easier interoperation with the
`ubfx` instruction, makes code more similar to tftf, and is more
concise.

Change-Id: Ic454a87af5e5fac108c7b7cb6b6804ec65a8d0e8
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge "feat(drtm): update DLME data header with actual Event Log size" into integration

feat(drtm): update DLME data header with actual Event Log size

The definition of `dlme_tpm_log_size` has been revised to represent
the actual Event Log data size instead of the fixed minimum of 64KB

feat(drtm): update DLME data header with actual Event Log size

The definition of `dlme_tpm_log_size` has been revised to represent
the actual Event Log data size instead of the fixed minimum of 64KB.
This change will be reflected in the upcoming DRTM specification
update.

Note: This change requires a corresponding update to the ACS DRTM
app in CI.

Change-Id: I967b5a372b283abd46409685d7266ffa60c142b0
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "mb/drtm" into integration

* changes:
feat(drtm): validate launch features in DRTM parameters
feat(lib): add EXTRACT_FIELD macro for field extraction

feat(drtm): validate launch features in DRTM parameters

Perform sanity checks on the launch features received via DRTM parameters.
Return INVALID_PARAMETERS if they are incorrect.

Change-Id: I7e806

feat(drtm): validate launch features in DRTM parameters

Perform sanity checks on the launch features received via DRTM parameters.
Return INVALID_PARAMETERS if they are incorrect.

Change-Id: I7e8068154028d1c8f6b6b45449616bb5711ea76e
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "mb/drtm" into integration

* changes:
feat(drtm): retrieve DLME image authentication features
feat(drtm): log No-Action Event in Event Log for DRTM measurements
feat(f

Merge changes from topic "mb/drtm" into integration

* changes:
feat(drtm): retrieve DLME image authentication features
feat(drtm): log No-Action Event in Event Log for DRTM measurements
feat(fvp): add stub function to retrieve DLME image auth features
feat(drtm): introduce plat API for DLME authentication features
feat(drtm): ensure event types aligns with DRTM specification v1.1
fix(drtm): add missing DLME data regions for min size requirement
feat(fvp): add stub platform function to get ACPI table region size
feat(drtm): add platform API to retrieve ACPI tables region size

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feat(drtm): retrieve DLME image authentication features

Retrieve DLME image authentication features and report them
back to the DCE preamble. Currently, this value is always set
to 0, as no platform

feat(drtm): retrieve DLME image authentication features

Retrieve DLME image authentication features and report them
back to the DCE preamble. Currently, this value is always set
to 0, as no platform supports DLME authentication.

Additionally, the default schema is always used instead of
the DLME PCR schema since DLME authentication is not currently
supported.

This change primarily upgrades the DRTM parameters version to V2,
aligning with DRTM spec v1.1 [1].

[1]: https://developer.arm.com/documentation/den0113/c/?lang=en

Change-Id: Ie2ceb0d2ff49465643597e8725710a93d89e74a2
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(drtm): add missing DLME data regions for min size requirement

Ensure compliance with minimum size requirements by including the
missing DLME data regions, such as the DLME data header and ACPI
r

fix(drtm): add missing DLME data regions for min size requirement

Ensure compliance with minimum size requirements by including the
missing DLME data regions, such as the DLME data header and ACPI
region size.
This will prevent incorrect allocation of DLME data regions in
the DCE preamble.

Change-Id: Ic493262152dfe39eb2d54f8771f19651be042288
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "mb/drtm" into integration

* changes:
fix(drtm): fix DLME data size check
fix(drtm): sort the address-map in ascending order
feat(libc): import qsort implementation

fix(drtm): fix DLME data size check

dlme_data_min_size is currently defined in pages but is being compared
against byte sizes in the code. This patch corrects this issue.

Change-Id: Ib250ef6efedf32

fix(drtm): fix DLME data size check

dlme_data_min_size is currently defined in pages but is being compared
against byte sizes in the code. This patch corrects this issue.

Change-Id: Ib250ef6efedf321706624dfca263e8042a25f6d1
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes I137f69be,Ia2e7168f,I0e569d12,I614272ec,Ib68293f2 into integration

* changes:
perf(psci): pass my_core_pos around instead of calling it repeatedly
refactor(psci): move timestamp co

Merge changes I137f69be,Ia2e7168f,I0e569d12,I614272ec,Ib68293f2 into integration

* changes:
perf(psci): pass my_core_pos around instead of calling it repeatedly
refactor(psci): move timestamp collection to psci_pwrdown_cpu
refactor(psci): factor common code out of the standby finisher
refactor(psci): don't use PSCI_INVALID_PWR_LVL to signal OFF state
docs(psci): drop outdated cache maintenance comment

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perf(psci): pass my_core_pos around instead of calling it repeatedly

On some platforms plat_my_core_pos is a nontrivial function that takes a
bit of time and the compiler really doesn't like to inli

perf(psci): pass my_core_pos around instead of calling it repeatedly

On some platforms plat_my_core_pos is a nontrivial function that takes a
bit of time and the compiler really doesn't like to inline. In the PSCI
library, at least, we have no need to keep repeatedly calling it and we
can instead pass it around as an argument. This saves on a lot of
redundant calls, speeding the library up a bit.

Change-Id: I137f69bea80d7cac90d7a20ffe98e1ba8d77246f
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge "fix(drtm): adjust Event Log size in DLME" into integration

fix(drtm): adjust Event Log size in DLME

Updated the code to ensure the Event Log in the DLME meets
the minimum size requirement of 64KB, as specified in the
specification.

Change-Id: If0b179a97c0d

fix(drtm): adjust Event Log size in DLME

Updated the code to ensure the Event Log in the DLME meets
the minimum size requirement of 64KB, as specified in the
specification.

Change-Id: If0b179a97c0dca489edc0047da401bbb4ce09f39
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "fix(drtm): do cache maintenance before launching DLME" into integration

fix(drtm): do cache maintenance before launching DLME

According to the specifications, the DLME launch should occur with
the cache disabled. Initially, the cache was enabled to enhance
performance.

fix(drtm): do cache maintenance before launching DLME

According to the specifications, the DLME launch should occur with
the cache disabled. Initially, the cache was enabled to enhance
performance. However, to comply with the PSCI specification, we
decided to disable it before launching the DLME.

Also, ensure that full DLME region is invalidated.

Change-Id: Idf619afb7e4a34ebe213bd3b559105ade993f3ad
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "mb/misc-fixes" into integration

* changes:
docs: fix typos in cot binding
fix(drtm): return proper values for DRTM get and set error SMCs
fix(tools): update the fipto

Merge changes from topic "mb/misc-fixes" into integration

* changes:
docs: fix typos in cot binding
fix(drtm): return proper values for DRTM get and set error SMCs
fix(tools): update the fiptool and certtool to fix POSIX build

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fix(drtm): return proper values for DRTM get and set error SMCs

The DRTM get and set error previously returned SMC_UNK when these
SMCs were issued. This has been corrected to return an appropriate
e

fix(drtm): return proper values for DRTM get and set error SMCs

The DRTM get and set error previously returned SMC_UNK when these
SMCs were issued. This has been corrected to return an appropriate
error code on failure, and success otherwise.
Also,align the error code values with the specification.

Change-Id: I8f11f94f1ab097245003dbde97365fa54e0097ba
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "drtm1.0-updates" into integration

* changes:
feat(drtm): update DRTM version to 1.0
feat(drtm): update references to DRTM beta0
feat(drtm): for TPM features fw hash a

Merge changes from topic "drtm1.0-updates" into integration

* changes:
feat(drtm): update DRTM version to 1.0
feat(drtm): update references to DRTM beta0
feat(drtm): for TPM features fw hash algorithm should be 16-bits
feat(drtm): add ACPI table region size to the DLME header
feat(drtm): update return code if secondary PE is not off
feat(drtm): add additional return codes

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feat(drtm): update references to DRTM beta0

Update all references to DRTM beta0 to be 1.0 instead.

Signed-off-by: Stuart Yoder <stuart.yoder@arm.com>
Change-Id: Ieda70f26f3be42f4705e9b267706674c94f

feat(drtm): update references to DRTM beta0

Update all references to DRTM beta0 to be 1.0 instead.

Signed-off-by: Stuart Yoder <stuart.yoder@arm.com>
Change-Id: Ieda70f26f3be42f4705e9b267706674c94f120f2

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feat(drtm): update return code if secondary PE is not off

DRTM 1.0 specifies that if any secondary PEs are not off
during a dynamic launch the return code must be
SECONDARY_PE_NOT_OFF.

Signed-off-b

feat(drtm): update return code if secondary PE is not off

DRTM 1.0 specifies that if any secondary PEs are not off
during a dynamic launch the return code must be
SECONDARY_PE_NOT_OFF.

Signed-off-by: Stuart Yoder <stuart.yoder@arm.com>
Change-Id: Idcb1f3c60daa63a5bc994bdeacca8aab7066f628

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Merge "feat(drtm): add DRTM parameters structure version check" into integration