| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | wa_cve_2022_23960_bhb_vector.S | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | wa_cve_2022_23960_bhb.S | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | cortex_a77.S | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | cortex_a78.S | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | neoverse_v1.S | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | neoverse_n1.S | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | cortex_x2.S | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | neoverse_n2.S | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | cortex_a710.S | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a77.h | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | cortex_a78.h | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | neoverse_n1.h | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | cortex_x2.h | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | neoverse_v1.h | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | cortex_a710.h | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| H A D | neoverse_n2.h | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 1fe4a9d181ead0dcb2bc494e90552d3e7f0aaf4c Tue Jan 18 07:59:06 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex-A77, Cortex-A78, Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1 CPUs.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
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