| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/ |
| H A D | img,pistachio-pinctrl.txt | 6 controller on Pistachio has 99 pins, 90 of which are MFIOs which can be 8 each. The GPIO banks are represented as sub-nodes of the pad controller node. 10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and 11 ../interrupt-controller/interrupts.txt for generic information regarding 15 -------------------------------------------- 16 - compatible: "img,pistachio-system-pinctrl". 17 - reg: Address range of the pinctrl registers. 19 Required properties for GPIO bank sub-nodes: 20 -------------------------------------------- 21 - interrupts: Interrupt line for the GPIO bank. [all …]
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| H A D | marvell,kirkwood-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding 7 - compatible: "marvell,88f6180-pinctrl", 8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl", 9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl", 10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl" 11 - reg: register specifier of MPP registers 14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs. 16 Available mpp pins/groups and functions: 22 name pins functions 28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk) [all …]
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| H A D | nxp,lpc1850-scu.txt | 2 -------------------------------------------------------- 5 - compatible : Should be "nxp,lpc1850-scu" 6 - reg : Address and length of the register set for the device 7 - clocks : Clock specifier (see clock bindings for details) 9 The lpc1850-scu driver uses the generic pin multiplexing and generic pin 10 configuration documented in pinctrl-bindings.txt. 13 - function 14 - pins 15 - bias-disable 16 - bias-pull-up [all …]
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| H A D | bitmain,bm1880-pinctrl.txt | 7 - compatible: Should be "bitmain,bm1880-pinctrl" 8 - reg: Offset and length of pinctrl space in SCTRL. 10 Please refer to pinctrl-bindings.txt in this directory for details of the 16 pin, a group, or a list of pins or groups. This configuration for BM1880 SoC 17 includes pinmux and various pin configuration parameters, such as pull-up, 24 The following generic properties as defined in pinctrl-bindings.txt are valid 29 - pins: An array of strings, each string containing the name of a pin. 30 Valid values for pins are: 32 MIO0 - MIO111 34 - groups: An array of strings, each string containing the name of a pin [all …]
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| H A D | cnxt,cx92755-pinctrl.txt | 11 - compatible: Must be "cnxt,cx92755-pinctrl" 12 - reg: Base address of the General Purpose Pin Mapping register block and the 14 - gpio-controller: Marks the device node as a GPIO controller. 15 - #gpio-cells: Must be <2>. The first cell is the pin number and the 16 second cell is used to specify flags. See include/dt-bindings/gpio/gpio.h 22 compatible = "cnxt,cx92755-pinctrl"; 24 gpio-controller; 25 #gpio-cells = <2>; 36 Each pin configuration node is a sub-node of the pin controller node and is a 40 Please refer to the pinctrl-bindings.txt in this directory for details of the [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | lpc4350-hitex-eval.dts | 9 * Released under the terms of 3-clause BSD License 13 /dts-v1/; 18 #include "dt-bindings/input/input.h" 19 #include "dt-bindings/gpio/gpio.h" 23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350"; 26 serial0 = &uart0; 33 stdout-path = &uart0; 42 compatible = "gpio-keys-polled"; 43 poll-interval = <100>; 97 compatible = "gpio-leds"; [all …]
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| H A D | lpc4357-ea4357-devkit.dts | 9 * Released under the terms of 3-clause BSD License 13 /dts-v1/; 18 #include "dt-bindings/input/input.h" 19 #include "dt-bindings/gpio/gpio.h" 23 compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350"; 26 serial0 = &uart0; 33 stdout-path = &uart0; 42 compatible = "regulator-fixed"; 43 regulator-name = "3v3-supply"; 44 regulator-min-microvolt = <3300000>; [all …]
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| H A D | kirkwood-openblocks_a6.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include "kirkwood-6282.dtsi" 9 compatible = "plathome,openblocks-a6", "marvell,kirkwood-88f6283", "marvell,kirkwood"; 18 stdout-path = &uart0; 31 nr-ports = <1>; 44 pinctrl: pin-controller@10000 { 45 pinctrl-0 = <&pmx_dip_switches>; 46 pinctrl-names = "default"; 48 pmx_uart0: pmx-uart0 { [all …]
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| H A D | kirkwood-openblocks_a7.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11 /dts-v1/; 14 #include "kirkwood-6282.dtsi" 18 compatible = "plathome,openblocks-a7", "marvell,kirkwood-88f6283", "marvell,kirkwood"; 27 stdout-path = &uart0; 40 nr-ports = <1>; 53 pinctrl: pin-controller@10000 { 54 pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header 56 pinctrl-names = "default"; [all …]
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| H A D | mt7629-rfb.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 8 #include <dt-bindings/input/input.h> 13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629"; 16 serial0 = &uart0; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 44 reg_3p3v: regulator-3p3v { 45 compatible = "regulator-fixed"; [all …]
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| H A D | lpc4357-myd-lpc4357.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel 5 * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 8 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 17 compatible = "myir,myd-lpc4357", "nxp,lpc4357"; 20 stdout-path = "serial3:115200n8"; 29 compatible = "gpio-leds"; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&led_pins>; [all …]
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| H A D | ste-nomadik-s8815.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree for the ST-Ericsson Nomadik S8815 board 7 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include "ste-nomadik-stn8815.dtsi" 12 model = "Calao Systems USB-S8815"; 13 compatible = "calaosystems,usb-s8815"; 20 serial0 = &uart0; 26 mmcsd-gpio { 27 gpio-hog; [all …]
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| H A D | sama5d3_uart.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with 9 #include <dt-bindings/pinctrl/at91.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/clock/at91.h> 15 serial5 = &uart0; 22 uart0 { 23 pinctrl_uart0: uart0-0 { 24 atmel,pins = 31 pinctrl_uart1: uart1-0 { [all …]
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| H A D | rk3288-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include "rockchip-pinconf.dtsi" 11 hdmi_gpio: hdmi-gpio { 12 rockchip,pins = 17 hdmi_cec_c0: hdmi-cec-c0 { 18 rockchip,pins = 22 hdmi_cec_c7: hdmi-cec-c7 { 23 rockchip,pins = 27 hdmi_ddc: hdmi-ddc { [all …]
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| H A D | s3c2416-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/pinctrl/samsung.h> 16 gpio-controller; 17 #gpio-cells = <2>; 21 gpio-controller; 22 #gpio-cells = <2>; 26 gpio-controller; 27 #gpio-cells = <2>; 31 gpio-controller; 32 #gpio-cells = <2>; [all …]
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| H A D | rv1108.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/rv1108-cru.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 15 interrupt-parent = <&gic>; [all …]
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| H A D | spear310-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 13 compatible = "st,spear310-evb", "st,spear310"; 14 #address-cells = <1>; 15 #size-cells = <1>; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&state_default>; 28 st,pins = "gpio0_pin0_grp", 37 st,pins = "i2c0_grp"; 41 st,pins = "mii0_grp"; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/toshiba/ |
| H A D | tmpv7708_pins.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 spi0_pins: spi0-pins { 8 spi1_pins: spi1-pins { 12 spi2_pins: spi2-pins { 16 spi3_pins: spi3-pins { 20 spi4_pins: spi4-pins { 24 spi5_pins: spi5-pins { 28 spi6_pins: spi6-pins { 32 uart0_pins: uart0-pins { 33 function = "uart0"; [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | rk3188.dtsi | 5 * SPDX-License-Identifier: GPL-2.0+ or X11 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/clock/rk3188-cru.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; 26 operating-points = < [all …]
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| H A D | rv1108.dtsi | 4 * SPDX-License-Identifier: GPL-2.0+ 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/rv1108-cru.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/media/rockchip_mipi_dsi.h> 13 #include <linux/media-bus-format.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| H A D | rk3036.dtsi | 2 * SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3036-cru.h> 15 interrupt-parent = <&gic>; 22 serial0 = &uart0; 34 arm-pmu { 35 compatible = "arm,cortex-a7-pmu"; [all …]
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| H A D | .rk3368-lion.dtb.dts.tmp | |
| H A D | rk3066a.dtsi | 5 * SPDX-License-Identifier: GPL-2.0+ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/clock/rk3066a-cru.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; 26 operating-points = < [all …]
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| H A D | sama5d3_uart.dtsi | 2 * sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with 10 #include <dt-bindings/pinctrl/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/at91.h> 16 serial5 = &uart0; 23 uart0 { 24 pinctrl_uart0: uart0-0 { 25 atmel,pins = 32 pinctrl_uart1: uart1-0 { 33 atmel,pins = [all …]
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| /OK3568_Linux_fs/kernel/arch/mips/boot/dts/img/ |
| H A D | pistachio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/pistachio-clk.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/mips-gic.h> 11 #include <dt-bindings/reset/pistachio-resets.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 19 interrupt-parent = <&gic>; 22 #address-cells = <1>; [all …]
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