xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/toshiba/tmpv7708_pins.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun&pmux {
4*4882a593Smuzhiyun	spi0_pins: spi0-pins {
5*4882a593Smuzhiyun		function = "spi0";
6*4882a593Smuzhiyun		groups = "spi0_grp";
7*4882a593Smuzhiyun	};
8*4882a593Smuzhiyun	spi1_pins: spi1-pins {
9*4882a593Smuzhiyun		function = "spi1";
10*4882a593Smuzhiyun		groups = "spi1_grp";
11*4882a593Smuzhiyun	};
12*4882a593Smuzhiyun	spi2_pins: spi2-pins {
13*4882a593Smuzhiyun		function = "spi2";
14*4882a593Smuzhiyun		groups = "spi2_grp";
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun	spi3_pins: spi3-pins {
17*4882a593Smuzhiyun		function = "spi3";
18*4882a593Smuzhiyun		groups = "spi3_grp";
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun	spi4_pins: spi4-pins {
21*4882a593Smuzhiyun		function = "spi4";
22*4882a593Smuzhiyun		groups = "spi4_grp";
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun	spi5_pins: spi5-pins {
25*4882a593Smuzhiyun		function = "spi5";
26*4882a593Smuzhiyun		groups = "spi5_grp";
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun	spi6_pins: spi6-pins {
29*4882a593Smuzhiyun		function = "spi6";
30*4882a593Smuzhiyun		groups = "spi6_grp";
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun	uart0_pins: uart0-pins {
33*4882a593Smuzhiyun		function = "uart0";
34*4882a593Smuzhiyun		groups = "uart0_grp";
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun	uart1_pins: uart1-pins {
37*4882a593Smuzhiyun		function = "uart1";
38*4882a593Smuzhiyun		groups = "uart1_grp";
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun	uart2_pins: uart2-pins {
41*4882a593Smuzhiyun		function = "uart2";
42*4882a593Smuzhiyun		groups = "uart2_grp";
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun	uart3_pins: uart3-pins {
45*4882a593Smuzhiyun		function = "uart3";
46*4882a593Smuzhiyun		groups = "uart3_grp";
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun	i2c0_pins: i2c0-pins {
49*4882a593Smuzhiyun		function = "i2c0";
50*4882a593Smuzhiyun		groups = "i2c0_grp";
51*4882a593Smuzhiyun		bias-pull-up;
52*4882a593Smuzhiyun	};
53*4882a593Smuzhiyun	i2c1_pins: i2c1-pins {
54*4882a593Smuzhiyun		function = "i2c1";
55*4882a593Smuzhiyun		groups = "i2c1_grp";
56*4882a593Smuzhiyun		bias-pull-up;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun	i2c2_pins: i2c2-pins {
59*4882a593Smuzhiyun		function = "i2c2";
60*4882a593Smuzhiyun		groups = "i2c2_grp";
61*4882a593Smuzhiyun		bias-pull-up;
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun	i2c3_pins: i2c3-pins {
64*4882a593Smuzhiyun		function = "i2c3";
65*4882a593Smuzhiyun		groups = "i2c3_grp";
66*4882a593Smuzhiyun		bias-pull-up;
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun	i2c4_pins: i2c4-pins {
69*4882a593Smuzhiyun		function = "i2c4";
70*4882a593Smuzhiyun		groups = "i2c4_grp";
71*4882a593Smuzhiyun		bias-pull-up;
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun	i2c5_pins: i2c5-pins {
74*4882a593Smuzhiyun		function = "i2c5";
75*4882a593Smuzhiyun		groups = "i2c5_grp";
76*4882a593Smuzhiyun		bias-pull-up;
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun	i2c6_pins: i2c6-pins {
79*4882a593Smuzhiyun		function = "i2c6";
80*4882a593Smuzhiyun		groups = "i2c6_grp";
81*4882a593Smuzhiyun		bias-pull-up;
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun	i2c7_pins: i2c7-pins {
84*4882a593Smuzhiyun		function = "i2c7";
85*4882a593Smuzhiyun		groups = "i2c7_grp";
86*4882a593Smuzhiyun		bias-pull-up;
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun	i2c8_pins: i2c8-pins {
89*4882a593Smuzhiyun		function = "i2c8";
90*4882a593Smuzhiyun		groups = "i2c8_grp";
91*4882a593Smuzhiyun		bias-pull-up;
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun};
94