1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include "kirkwood.dtsi" 5*4882a593Smuzhiyun#include "kirkwood-6282.dtsi" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "Plat'Home OpenBlocksA6"; 9*4882a593Smuzhiyun compatible = "plathome,openblocks-a6", "marvell,kirkwood-88f6283", "marvell,kirkwood"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun memory { 12*4882a593Smuzhiyun device_type = "memory"; 13*4882a593Smuzhiyun reg = <0x00000000 0x20000000>; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen { 17*4882a593Smuzhiyun bootargs = "console=ttyS0,115200n8 earlyprintk"; 18*4882a593Smuzhiyun stdout-path = &uart0; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun ocp@f1000000 { 22*4882a593Smuzhiyun serial@12000 { 23*4882a593Smuzhiyun status = "okay"; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun serial@12100 { 27*4882a593Smuzhiyun status = "okay"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun sata@80000 { 31*4882a593Smuzhiyun nr-ports = <1>; 32*4882a593Smuzhiyun status = "okay"; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun i2c@11100 { 36*4882a593Smuzhiyun status = "okay"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun s35390a: s35390a@30 { 39*4882a593Smuzhiyun compatible = "sii,s35390a"; 40*4882a593Smuzhiyun reg = <0x30>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun pinctrl: pin-controller@10000 { 45*4882a593Smuzhiyun pinctrl-0 = <&pmx_dip_switches>; 46*4882a593Smuzhiyun pinctrl-names = "default"; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun pmx_uart0: pmx-uart0 { 49*4882a593Smuzhiyun marvell,pins = "mpp10", "mpp11", "mpp15", 50*4882a593Smuzhiyun "mpp16"; 51*4882a593Smuzhiyun marvell,function = "uart0"; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun pmx_uart1: pmx-uart1 { 55*4882a593Smuzhiyun marvell,pins = "mpp13", "mpp14", "mpp8", 56*4882a593Smuzhiyun "mpp9"; 57*4882a593Smuzhiyun marvell,function = "uart1"; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun pmx_sysrst: pmx-sysrst { 61*4882a593Smuzhiyun marvell,pins = "mpp6"; 62*4882a593Smuzhiyun marvell,function = "sysrst"; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun pmx_dip_switches: pmx-dip-switches { 66*4882a593Smuzhiyun marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23"; 67*4882a593Smuzhiyun marvell,function = "gpio"; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun pmx_gpio_header: pmx-gpio-header { 71*4882a593Smuzhiyun marvell,pins = "mpp24", "mpp25", "mpp26", "mpp27", 72*4882a593Smuzhiyun "mpp28", "mpp29", "mpp30", "mpp31"; 73*4882a593Smuzhiyun marvell,function = "gpio"; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun pmx_gpio_init: pmx-init { 77*4882a593Smuzhiyun marvell,pins = "mpp38"; 78*4882a593Smuzhiyun marvell,function = "gpio"; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun pmx_usb_oc: pmx-usb-oc { 82*4882a593Smuzhiyun marvell,pins = "mpp39"; 83*4882a593Smuzhiyun marvell,function = "gpio"; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun pmx_leds: pmx-leds { 87*4882a593Smuzhiyun marvell,pins = "mpp41", "mpp42", "mpp43"; 88*4882a593Smuzhiyun marvell,function = "gpio"; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun gpio-leds { 94*4882a593Smuzhiyun compatible = "gpio-leds"; 95*4882a593Smuzhiyun pinctrl-0 = <&pmx_leds>; 96*4882a593Smuzhiyun pinctrl-names = "default"; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun led-red { 99*4882a593Smuzhiyun label = "obsa6:red:stat"; 100*4882a593Smuzhiyun gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun led-green { 104*4882a593Smuzhiyun label = "obsa6:green:stat"; 105*4882a593Smuzhiyun gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun led-yellow { 109*4882a593Smuzhiyun label = "obsa6:yellow:stat"; 110*4882a593Smuzhiyun gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun gpio_keys { 115*4882a593Smuzhiyun compatible = "gpio-keys"; 116*4882a593Smuzhiyun pinctrl-0 = <&pmx_gpio_init>; 117*4882a593Smuzhiyun pinctrl-names = "default"; 118*4882a593Smuzhiyun #address-cells = <1>; 119*4882a593Smuzhiyun #size-cells = <0>; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun power { 122*4882a593Smuzhiyun label = "Init Button"; 123*4882a593Smuzhiyun linux,code = <KEY_POWER>; 124*4882a593Smuzhiyun gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun}; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun&nand { 130*4882a593Smuzhiyun chip-delay = <25>; 131*4882a593Smuzhiyun status = "okay"; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun partition@0 { 134*4882a593Smuzhiyun label = "uboot"; 135*4882a593Smuzhiyun reg = <0x0 0x90000>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun partition@90000 { 139*4882a593Smuzhiyun label = "env"; 140*4882a593Smuzhiyun reg = <0x90000 0x44000>; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun partition@d4000 { 144*4882a593Smuzhiyun label = "test"; 145*4882a593Smuzhiyun reg = <0xd4000 0x20000>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun partition@f4000 { 149*4882a593Smuzhiyun label = "conf"; 150*4882a593Smuzhiyun reg = <0xf4000 0x400000>; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun partition@4f4000 { 154*4882a593Smuzhiyun label = "linux"; 155*4882a593Smuzhiyun reg = <0x4f4000 0x1d20000>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun partition@2214000 { 159*4882a593Smuzhiyun label = "user"; 160*4882a593Smuzhiyun reg = <0x2214000 0x1dec000>; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun}; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun&mdio { 165*4882a593Smuzhiyun status = "okay"; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun ethphy0: ethernet-phy@0 { 168*4882a593Smuzhiyun reg = <0>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun}; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyunð0 { 173*4882a593Smuzhiyun status = "okay"; 174*4882a593Smuzhiyun ethernet0-port@0 { 175*4882a593Smuzhiyun phy-handle = <ðphy0>; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun}; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun&gpio0 { 180*4882a593Smuzhiyun status = "okay"; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun pinctrl-0 = <&pmx_gpio_header>; 183*4882a593Smuzhiyun pinctrl-names = "default"; 184*4882a593Smuzhiyun}; 185