xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/kirkwood-openblocks_a7.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree file for OpenBlocks A7 board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Free Electrons
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/dts-v1/;
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun#include "kirkwood.dtsi"
14*4882a593Smuzhiyun#include "kirkwood-6282.dtsi"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun/ {
17*4882a593Smuzhiyun	model = "Plat'Home OpenBlocksA7";
18*4882a593Smuzhiyun	compatible = "plathome,openblocks-a7", "marvell,kirkwood-88f6283", "marvell,kirkwood";
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory {
21*4882a593Smuzhiyun		device_type = "memory";
22*4882a593Smuzhiyun		reg = <0x00000000 0x40000000>; /* 1 GB */
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	chosen {
26*4882a593Smuzhiyun		bootargs = "console=ttyS0,115200n8 earlyprintk";
27*4882a593Smuzhiyun		stdout-path = &uart0;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	ocp@f1000000 {
31*4882a593Smuzhiyun		serial@12000 {
32*4882a593Smuzhiyun			status = "okay";
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun		serial@12100 {
36*4882a593Smuzhiyun			status = "okay";
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		sata@80000 {
40*4882a593Smuzhiyun			nr-ports = <1>;
41*4882a593Smuzhiyun			status = "okay";
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		i2c@11100 {
45*4882a593Smuzhiyun			status = "okay";
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun			s24c02: s24c02@50 {
48*4882a593Smuzhiyun				compatible = "atmel,24c02";
49*4882a593Smuzhiyun				reg = <0x50>;
50*4882a593Smuzhiyun			};
51*4882a593Smuzhiyun		};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		pinctrl: pin-controller@10000 {
54*4882a593Smuzhiyun			pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header
55*4882a593Smuzhiyun				     &pmx_gpio_header_gpo>;
56*4882a593Smuzhiyun			pinctrl-names = "default";
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun			pmx_uart0: pmx-uart0 {
59*4882a593Smuzhiyun				marvell,pins = "mpp10", "mpp11", "mpp15",
60*4882a593Smuzhiyun					"mpp16";
61*4882a593Smuzhiyun				marvell,function = "uart0";
62*4882a593Smuzhiyun			};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun			pmx_uart1: pmx-uart1 {
65*4882a593Smuzhiyun				marvell,pins = "mpp13", "mpp14", "mpp8",
66*4882a593Smuzhiyun					"mpp9";
67*4882a593Smuzhiyun				marvell,function = "uart1";
68*4882a593Smuzhiyun			};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun			pmx_sysrst: pmx-sysrst {
71*4882a593Smuzhiyun				marvell,pins = "mpp6";
72*4882a593Smuzhiyun				marvell,function = "sysrst";
73*4882a593Smuzhiyun			};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun			pmx_dip_switches: pmx-dip-switches {
76*4882a593Smuzhiyun				marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47";
77*4882a593Smuzhiyun				marvell,function = "gpio";
78*4882a593Smuzhiyun			};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun			/*
81*4882a593Smuzhiyun			 * Accessible on connector J202. The MPP
82*4882a593Smuzhiyun			 * listed below are pin 1-7, pin 8 is unused,
83*4882a593Smuzhiyun			 * pin 9 is external reset input and pin 10 is
84*4882a593Smuzhiyun			 * ground.
85*4882a593Smuzhiyun			 */
86*4882a593Smuzhiyun			pmx_gpio_header: pmx-gpio-header {
87*4882a593Smuzhiyun				marvell,pins = "mpp17", "mpp29", "mpp28",
88*4882a593Smuzhiyun					       "mpp35", "mpp34", "mpp40";
89*4882a593Smuzhiyun				marvell,function = "gpio";
90*4882a593Smuzhiyun			};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun			pmx_gpio_header_gpo: pxm-gpio-header-gpo {
93*4882a593Smuzhiyun				marvell,pins = "mpp7";
94*4882a593Smuzhiyun				marvell,function = "gpo";
95*4882a593Smuzhiyun			};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun			pmx_gpio_init: pmx-init {
98*4882a593Smuzhiyun				marvell,pins = "mpp38";
99*4882a593Smuzhiyun				marvell,function = "gpio";
100*4882a593Smuzhiyun			};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun			pmx_usb_oc: pmx-usb-oc {
103*4882a593Smuzhiyun				marvell,pins = "mpp39";
104*4882a593Smuzhiyun				marvell,function = "gpio";
105*4882a593Smuzhiyun			};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun			pmx_leds: pmx-leds {
108*4882a593Smuzhiyun				marvell,pins = "mpp41", "mpp42", "mpp43";
109*4882a593Smuzhiyun				marvell,function = "gpio";
110*4882a593Smuzhiyun			};
111*4882a593Smuzhiyun		};
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	gpio-leds {
115*4882a593Smuzhiyun		compatible = "gpio-leds";
116*4882a593Smuzhiyun		pinctrl-0 = <&pmx_leds>;
117*4882a593Smuzhiyun		pinctrl-names = "default";
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun		led-red {
120*4882a593Smuzhiyun			label = "obsa7:red:stat";
121*4882a593Smuzhiyun			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
122*4882a593Smuzhiyun		};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun		led-green {
125*4882a593Smuzhiyun			label = "obsa7:green:stat";
126*4882a593Smuzhiyun			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
127*4882a593Smuzhiyun		};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun		led-yellow {
130*4882a593Smuzhiyun			label = "obsa7:yellow:stat";
131*4882a593Smuzhiyun			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun        };
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	gpio_keys {
136*4882a593Smuzhiyun		compatible = "gpio-keys";
137*4882a593Smuzhiyun		pinctrl-0 = <&pmx_gpio_init>;
138*4882a593Smuzhiyun		pinctrl-names = "default";
139*4882a593Smuzhiyun		#address-cells = <1>;
140*4882a593Smuzhiyun		#size-cells = <0>;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun		button {
143*4882a593Smuzhiyun			label = "Init Button";
144*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
145*4882a593Smuzhiyun			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
146*4882a593Smuzhiyun		};
147*4882a593Smuzhiyun	};
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun&nand {
151*4882a593Smuzhiyun	chip-delay = <25>;
152*4882a593Smuzhiyun	status = "okay";
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	partition@0 {
155*4882a593Smuzhiyun		label = "uboot";
156*4882a593Smuzhiyun		reg = <0x0 0x1c0000>;
157*4882a593Smuzhiyun	};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun	partition@1c0000 {
160*4882a593Smuzhiyun		label = "env";
161*4882a593Smuzhiyun		reg = <0x1c0000 0x2c0000>;
162*4882a593Smuzhiyun	};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun	partition@480000 {
165*4882a593Smuzhiyun		label = "test";
166*4882a593Smuzhiyun		reg = <0x480000 0x160000>;
167*4882a593Smuzhiyun	};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun	partition@5e0000 {
170*4882a593Smuzhiyun		label = "conf";
171*4882a593Smuzhiyun		reg = <0x5e0000 0x540000>;
172*4882a593Smuzhiyun	};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	partition@b20000 {
175*4882a593Smuzhiyun		label = "linux";
176*4882a593Smuzhiyun		reg = <0xb20000 0x3d40000>;
177*4882a593Smuzhiyun	};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun	partition@4860000 {
180*4882a593Smuzhiyun		label = "user";
181*4882a593Smuzhiyun		reg = <0x4860000 0xb7a0000>;
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun&mdio {
186*4882a593Smuzhiyun	status = "okay";
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun	ethphy0: ethernet-phy@0 {
189*4882a593Smuzhiyun		reg = <0>;
190*4882a593Smuzhiyun	};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun	ethphy1: ethernet-phy@1 {
193*4882a593Smuzhiyun		reg = <1>;
194*4882a593Smuzhiyun	};
195*4882a593Smuzhiyun};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun&eth0 {
198*4882a593Smuzhiyun	status = "okay";
199*4882a593Smuzhiyun	ethernet0-port@0 {
200*4882a593Smuzhiyun		phy-handle = <&ethphy0>;
201*4882a593Smuzhiyun	};
202*4882a593Smuzhiyun};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun&eth1 {
205*4882a593Smuzhiyun	status = "okay";
206*4882a593Smuzhiyun	ethernet1-port@0 {
207*4882a593Smuzhiyun		phy-handle = <&ethphy1>;
208*4882a593Smuzhiyun	};
209*4882a593Smuzhiyun};
210