| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/ |
| H A D | phy-rockchip-naneng-usb2.txt | 4 - compatible : should be one of the listed compatibles: 5 * "rockchip,rv1126-usb2phy" 6 - reg : the address offset of grf for usb-phy configuration. 7 - rockchip,grf : phandle to the syscon managing the "general register files" 8 - clocks : phandle + phy specifier pair, for the input clocks of phy. 9 - clock-names : input clocks name of phy. 10 - resets : phandle + reset specifier pairs. 11 - reset-names : reset names of phy. 12 - #clock-cells : should be 0. 13 - clock-output-names : specify the 480m output clock name. [all …]
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| H A D | phy-rockchip-inno-usb2.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,px30-usb2phy 16 - rockchip,rk1808-usb2phy 17 - rockchip,rk3128-usb2phy 18 - rockchip,rk3228-usb2phy 19 - rockchip,rk3308-usb2phy [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/ |
| H A D | ste-dma40.txt | 4 - compatible: "stericsson,dma40" 5 - reg: Address range of the DMAC registers 6 - reg-names: Names of the above areas to use during resource look-up 7 - interrupt: Should contain the DMAC interrupt number 8 - #dma-cells: must be <3> 9 - memcpy-channels: Channels to be used for memcpy 12 - dma-channels: Number of channels supported by hardware - if not present 14 - disabled-channels: Channels which can not be used 18 dma: dma-controller@801c0000 { 19 compatible = "stericsson,db8500-dma40", "stericsson,dma40"; [all …]
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| /OK3568_Linux_fs/kernel/drivers/usb/musb/ |
| H A D | musb_virthub.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * MUSB OTG driver virtual root hub support 6 * Copyright (C) 2005-2006 by Texas Instruments 7 * Copyright (C) 2006-2007 Nokia Corporation 29 spin_lock_irqsave(&musb->lock, flags); in musb_host_finish_resume() 31 power = musb_readb(musb->mregs, MUSB_POWER); in musb_host_finish_resume() 33 musb_dbg(musb, "root port resume stopped, power %02x", power); in musb_host_finish_resume() 34 musb_writeb(musb->mregs, MUSB_POWER, power); in musb_host_finish_resume() 41 musb->is_active = 1; in musb_host_finish_resume() 42 musb->port1_status &= ~(USB_PORT_STAT_SUSPEND | MUSB_PORT_STAT_RESUME); in musb_host_finish_resume() [all …]
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| /OK3568_Linux_fs/u-boot/drivers/usb/host/ |
| H A D | ehci-faraday.c | 5 * Dante Su <dantesu@faraday-tech.com> 7 * SPDX-License-Identifier: GPL-2.0+ 24 struct fotg210_regs otg; member 29 return !readl(®s->usb.easstr); in ehci_is_fotg2xx() 42 ret = (void __iomem *)((ulong)ctrl->hcor - 0x10); in faraday_ehci_get_port_speed() 44 spd = OTGCSR_SPD(readl(®s->otg.otgcsr)); in faraday_ehci_get_port_speed() 46 spd = BMCSR_SPD(readl(®s->usb.bmcsr)); in faraday_ehci_get_port_speed() 59 printf("ehci-faraday: invalid device speed\n"); in faraday_ehci_get_port_speed() 66 uint32_t *faraday_ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port) in faraday_ehci_get_portsc_register() argument 69 if (port) { in faraday_ehci_get_portsc_register() [all …]
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| H A D | ehci-mx6.c | 5 * SPDX-License-Identifier: GPL-2.0+ 13 #include <usb/ehci-ci.h> 15 #include <asm/arch/imx-regs.h> 17 #include <asm/mach-imx/iomux-v3.h> 18 #include <asm/mach-imx/sys_proto.h> 20 #include <asm/mach-types.h> 22 #include <linux/usb/otg.h> 60 #define UCTRL_PWR_POL (1 << 9) /* OTG Polarity of Power Pin */ 61 #define UCTRL_OVER_CUR_POL (1 << 8) /* OTG Polarity of Overcurrent */ 62 #define UCTRL_OVER_CUR_DIS (1 << 7) /* Disable OTG Overcurrent Detection */ [all …]
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| H A D | ehci-mx5.c | 5 * SPDX-License-Identifier: GPL-2.0+ 12 #include <usb/ehci-ci.h> 14 #include <asm/arch/imx-regs.h> 37 /* OTG wakeup intr enable */ 39 /* OTG power mask */ 41 /* OTG power pin polarity */ 53 /* OTG Polarity of Overcurrent */ 55 /* OTG Disable Overcurrent Event */ 61 /* OTG Power Pin Polarity */ 82 int mxc_set_usbcontrol(int port, unsigned int flags) in mxc_set_usbcontrol() argument [all …]
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| /OK3568_Linux_fs/kernel/Documentation/ABI/stable/ |
| H A D | sysfs-class-udc | 6 Indicates if an OTG A-Host supports HNP at an alternate port. 14 Indicates if an OTG A-Host supports HNP at this port. 22 Indicates if an OTG A-Host enabled HNP support. 30 Indicates the current negotiated speed at this port. 38 Indicates that this port is the default Host on an OTG session 47 Indicates that this port support OTG. 55 Indicates the maximum USB speed supported by this port. 81 states are: 'not-attached', 'attached', 'powered',
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| /OK3568_Linux_fs/kernel/arch/arm/mach-pxa/ |
| H A D | regs-u2d.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 21 #define U2DCR_DWRE (1 << 16) /* Device Remote Wake-up Feature */ 32 #define U2DINT_CC (1 << 31) /* Interrupt - Configuration Change */ 33 #define U2DINT_SOF (1 << 30) /* Interrupt - SOF */ 34 #define U2DINT_USOF (1 << 29) /* Interrupt - micro SOF */ 35 #define U2DINT_RU (1 << 28) /* Interrupt - Resume */ 36 #define U2DINT_SU (1 << 27) /* Interrupt - Suspend */ 37 #define U2DINT_RS (1 << 26) /* Interrupt - Reset */ 38 #define U2DINT_DPE (1 << 25) /* Interrupt - Data Packet Error */ 39 #define U2DINT_FIFOERR (0x4) /* Interrupt - endpoint FIFO error */ [all …]
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| H A D | pxa27x-udc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 10 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ 11 #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation 12 Protocol Port Support */ 13 #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol 15 #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol 17 #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ 42 #define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */ 43 #define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */ 44 #define UDCICR1_IERU (1 << 29) /* IntEn - Resume */ [all …]
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| /OK3568_Linux_fs/kernel/drivers/extcon/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 11 host USB ports. Many of 30-pin connectors including PDMI are 33 tristate "X-Power AXP288 EXTCON support" 38 and USB MUX switching by X-Power AXP288 PMIC. 48 port accessory detector and switch. The FSA9480 is fully controlled using 50 and UART data to use a common connector port. 63 Say Y here to enable extcon support for USB OTG ports controlled by 90 Maxim MAX14577/77836. The MAX14577/77836 MUIC is a USB port accessory 94 tristate "Maxim MAX3355 USB OTG EXTCON Support" 97 If you say yes here you get support for the USB OTG role detection by [all …]
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| /OK3568_Linux_fs/kernel/drivers/phy/rockchip/ |
| H A D | phy-rockchip-inno-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 #include <linux/clk-provider.h> 11 #include <linux/extcon-provider.h> 32 #include <linux/usb/otg.h> 60 * enum usb_chg_state - Different states involved in USB charger detection. 100 * struct rockchip_chg_det_reg - usb charger detect registers 101 * @cp_det: charging port detected successfully. 102 * @dcp_det: dedicated charging port detected successfully. 126 * struct rockchip_usb2phy_port_cfg - usb-phy port configuration. 139 * @bypass_otg: bypass otg module. [all …]
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| H A D | phy-rockchip-naneng-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 #include <linux/clk-provider.h> 11 #include <linux/extcon-provider.h> 31 #include <linux/usb/otg.h> 84 * struct rockchip_usb2phy_port_cfg: usb phy port configuration. 85 * @bypass_otgsuspendm: otg-suspendm bypass control register. 114 * @utmi_iddig: otg port id pin status register. 151 * @reg: the address offset of grf for usb-phy config. 176 * struct rockchip_usb2phy_port: usb phy port data. 177 * @phy: the struct phy of this port. [all …]
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| /OK3568_Linux_fs/kernel/include/linux/platform_data/ |
| H A D | usb-mx2.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 19 enum mx21_usbh_xcvr otg_xcvr; /* tranceiver mode otg (as host) port */ 22 enable_otg_host:1, /* enable "OTG" port (as host) */ 23 host1_xcverless:1, /* traceiverless host1 port */ 25 otg_ext_xcvr:1, /* external tranceiver for OTG port */
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/misc/ |
| H A D | hisilicon-hikey-usb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/misc/hisilicon-hikey-usb.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - John Stultz <john.stultz@linaro.org> 15 role-switch intermediary to detect the state of the USB-C 16 port, to switch the hub into dual-role USB-C or host mode, 17 which enables the onboard USB-A host ports. 20 …https://github.com/96boards/documentation/raw/master/consumer/hikey/hikey960/hardware-docs/HiKey96… 25 - const: hisilicon,gpio_hubv1 [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/usb/ |
| H A D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Neil Armstrong <narmstrong@baylibre.com> 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 23 connected to the Glue to serve as OTG ID change detection. 26 host-only mode. 33 - amlogic,meson-gxl-usb-ctrl [all …]
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| H A D | fsl-usb.txt | 9 - compatible : Should be "fsl-usb2-mph" for multi port host USB 10 controllers, or "fsl-usb2-dr" for dual role USB controllers 11 or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121. 13 also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132). 14 - phy_type : For multi port host USB controllers, should be one of 17 - reg : Offset and length of the register set for the device 18 - port0 : boolean; if defined, indicates port0 is connected for 19 fsl-usb2-mph compatible controllers. Either this property or 20 "port1" (or both) must be defined for "fsl-usb2-mph" compatible 22 - port1 : boolean; if defined, indicates port1 is connected for [all …]
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| /OK3568_Linux_fs/kernel/Documentation/driver-api/usb/ |
| H A D | gadget.rst | 11 This document presents a Linux-USB "Gadget" kernel mode API, for use 17 - Supports USB 2.0, for high speed devices which can stream data at 20 - Handles devices with dozens of endpoints just as well as ones with 21 just two fixed-function ones. Gadget drivers can be written so 22 they're easy to port to new hardware. 24 - Flexible enough to expose more complex USB device capabilities such 28 - USB "On-The-Go" (OTG) support, in conjunction with updates to the 29 Linux-USB host side. 31 - Sharing data structures and API models with the Linux-USB host side 32 API. This helps the OTG support, and looks forward to more-symmetric [all …]
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| /OK3568_Linux_fs/u-boot/drivers/usb/phy/ |
| H A D | rockchip_usb2_phy.c | 4 * SPDX-License-Identifier: GPL-2.0+ 31 * struct rockchip_usb2_phy_cfg: usb-phy port configuration 32 * @port_reset: usb otg per-port reset register 33 * @soft_con: software control usb otg register 56 { .compatible = "rockchip,rk3288-usb-phy", .data = &rk3288_pdata }, 65 tmp = en ? reg->enable : reg->disable; in property_enable() 66 mask = GENMASK(reg->bitend, reg->bitstart); in property_enable() 67 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in property_enable() 69 writel(val, pdata->regs_phy + reg->offset); in property_enable() 90 const void *blob = gd->fdt_blob; in otg_phy_parse() [all …]
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| /OK3568_Linux_fs/kernel/drivers/phy/tegra/ |
| H A D | xusb.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. 31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate() 32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate() 34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate() 35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate() 38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate() 39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate() 45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate() 53 .compatible = "nvidia,tegra124-xusb-padctl", [all …]
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| /OK3568_Linux_fs/kernel/drivers/usb/dwc3/ |
| H A D | drd.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * drd.c - DesignWare USB3 DRD Controller Dual-role support 5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com 21 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_disable_events() 24 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_disable_events() 29 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_enable_events() 32 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_enable_events() 37 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT); in dwc3_otg_clear_events() 39 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_clear_events() 56 spin_lock(&dwc->lock); in dwc3_otg_thread_irq() [all …]
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| /OK3568_Linux_fs/kernel/drivers/usb/phy/ |
| H A D | phy-fsl-usb.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 4 #include <linux/usb/otg-fsm.h> 5 #include <linux/usb/otg.h> 30 /* bit 9-8 are async schedule park mode count */ 37 /* bit 23-16 are interrupt threshold control */ 77 /* PORTSC Register Bit Masks,Only one PORT in OTG mode*/ 99 /* bit 11-10 are line status */ 106 /* bit 15-14 are port indicator control */ 113 /* bit 19-16 are port test control */ 122 /* bit 27-26 are port speed */ [all …]
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| /OK3568_Linux_fs/kernel/drivers/usb/host/ |
| H A D | ehci-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs 6 * Copyright (C) 2009 - 2013 NVIDIA Corporation 10 #include <linux/dma-mapping.h> 27 #include <linux/usb/otg.h> 36 #define DRV_NAME "tegra-ehci" 56 (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv; in tegra_reset_usb_controller() 60 phy_np = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0); in tegra_reset_usb_controller() 62 return -ENOENT; in tegra_reset_usb_controller() 69 rst = of_reset_control_get_shared(phy_np, "utmi-pads"); in tegra_reset_usb_controller() [all …]
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| /OK3568_Linux_fs/kernel/Documentation/firmware-guide/acpi/ |
| H A D | extcon-intel-int3496.rst | 6 devices with an acpi-id of INT3496, such as found for example on 9 This ACPI device describes how the OS can read the id-pin of the devices' 10 USB-otg port, as well as how it optionally can enable Vbus output on the 11 otg port and how it can optionally control the muxing of the data pins 18 Index 0 The input gpio for the id-pin, this is always present and valid 19 Index 1 The output gpio for enabling Vbus output from the device to the otg 20 port, write 1 to enable the Vbus output (this gpio descriptor may
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/ |
| H A D | r8a77951-salvator-xs.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the Salvator-X 2nd version board with R-Car H3 ES2.0+ 5 * Copyright (C) 2015-2017 Renesas Electronics Corp. 8 /dts-v1/; 10 #include "salvator-xs.dtsi" 13 model = "Renesas Salvator-X 2nd version board based on r8a77951"; 14 compatible = "renesas,salvator-xs", "renesas,r8a7795"; 47 clock-names = "du.0", "du.1", "du.2", "du.3", 56 dr_mode = "otg"; 64 port@1 { [all …]
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