1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Rockchip USB2.0 phy with inno IP block 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Heiko Stuebner <heiko@sntech.de> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun enum: 15*4882a593Smuzhiyun - rockchip,px30-usb2phy 16*4882a593Smuzhiyun - rockchip,rk1808-usb2phy 17*4882a593Smuzhiyun - rockchip,rk3128-usb2phy 18*4882a593Smuzhiyun - rockchip,rk3228-usb2phy 19*4882a593Smuzhiyun - rockchip,rk3308-usb2phy 20*4882a593Smuzhiyun - rockchip,rk3328-usb2phy 21*4882a593Smuzhiyun - rockchip,rk3366-usb2phy 22*4882a593Smuzhiyun - rockchip,rk3368-usb2phy 23*4882a593Smuzhiyun - rockchip,rk3399-usb2phy 24*4882a593Smuzhiyun - rockchip,rk3568-usb2phy 25*4882a593Smuzhiyun - rockchip,rk3588-usb2phy 26*4882a593Smuzhiyun - rockchip,rv1106-usb2phy 27*4882a593Smuzhiyun - rockchip,rv1108-usb2phy 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun reg: 30*4882a593Smuzhiyun maxItems: 1 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun clock-output-names: 33*4882a593Smuzhiyun description: 34*4882a593Smuzhiyun The usb 480m output clock name. 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun "#clock-cells": 37*4882a593Smuzhiyun const: 0 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun "#phy-cells": 40*4882a593Smuzhiyun const: 0 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun clocks: 43*4882a593Smuzhiyun maxItems: 1 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun clock-names: 46*4882a593Smuzhiyun const: phyclk 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun assigned-clocks: 49*4882a593Smuzhiyun description: 50*4882a593Smuzhiyun Phandle of the usb 480m clock. 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun assigned-clock-parents: 53*4882a593Smuzhiyun description: 54*4882a593Smuzhiyun Parent of the usb 480m clock. 55*4882a593Smuzhiyun Select between usb-phy output 480m and xin24m. 56*4882a593Smuzhiyun Refer to clk/clock-bindings.txt for generic clock consumer properties. 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun extcon: 59*4882a593Smuzhiyun description: 60*4882a593Smuzhiyun Phandle to the extcon device providing the cable state for the otg phy. 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun wakeup-source: 63*4882a593Smuzhiyun description: 64*4882a593Smuzhiyun Enable USB irq wakeup when suspend. 65*4882a593Smuzhiyun Only work when suspend wakeup-config is not work. 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun rockchip,usbgrf: 68*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/phandle 69*4882a593Smuzhiyun description: 70*4882a593Smuzhiyun Phandle to the syscon managing the 'usb general register files'. 71*4882a593Smuzhiyun When set the driver will request its phandle as one companion-grf 72*4882a593Smuzhiyun for some special SoCs (e.g rv1108). 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun rockchip,usbctrl-grf: 75*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/phandle 76*4882a593Smuzhiyun description: 77*4882a593Smuzhiyun Phandle to the syscon managing the 'usb ctrl general register files'. 78*4882a593Smuzhiyun When set the driver will request its phandle as the 79*4882a593Smuzhiyun usb controller grf for some SoCs (e.g rk3588). 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun rockchip,u2phy-tuning: 82*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 83*4882a593Smuzhiyun description: when set, tuning u2phy to improve usb2 SI. 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun host-port: 86*4882a593Smuzhiyun type: object 87*4882a593Smuzhiyun additionalProperties: false 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun properties: 90*4882a593Smuzhiyun "#phy-cells": 91*4882a593Smuzhiyun const: 0 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun interrupts: 94*4882a593Smuzhiyun description: host linestate interrupt 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun interrupt-names: 97*4882a593Smuzhiyun const: linestate 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun phy-supply: 100*4882a593Smuzhiyun description: 101*4882a593Smuzhiyun Phandle to a regulator that provides power to VBUS. 102*4882a593Smuzhiyun See ./phy-bindings.txt for details. 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun required: 105*4882a593Smuzhiyun - "#phy-cells" 106*4882a593Smuzhiyun - interrupts 107*4882a593Smuzhiyun - interrupt-names 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun otg-port: 110*4882a593Smuzhiyun type: object 111*4882a593Smuzhiyun additionalProperties: false 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun properties: 114*4882a593Smuzhiyun "#phy-cells": 115*4882a593Smuzhiyun const: 0 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun interrupts: 118*4882a593Smuzhiyun minItems: 1 119*4882a593Smuzhiyun maxItems: 3 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun interrupt-names: 122*4882a593Smuzhiyun oneOf: 123*4882a593Smuzhiyun - const: linestate 124*4882a593Smuzhiyun - const: otg-mux 125*4882a593Smuzhiyun - items: 126*4882a593Smuzhiyun - const: otg-bvalid 127*4882a593Smuzhiyun - const: otg-id 128*4882a593Smuzhiyun - const: linestate 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun phy-supply: 131*4882a593Smuzhiyun description: 132*4882a593Smuzhiyun Phandle to a regulator that provides power to VBUS. 133*4882a593Smuzhiyun See ./phy-bindings.txt for details. 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun vbus-supply: 136*4882a593Smuzhiyun description: 137*4882a593Smuzhiyun Phandle to a fixed-regulator that provides power to VBUS. 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun rockchip,utmi-bypass-uart: 140*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 141*4882a593Smuzhiyun description: when set, indicates that support usb to bypass uart 142*4882a593Smuzhiyun feature. This property can only be added in debug stage. 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun rockchip,utmi-avalid: 145*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 146*4882a593Smuzhiyun description: when set, the usb2 phy will use avalid status bit to 147*4882a593Smuzhiyun get vbus status. If not, it will use bvalid status bit to get vbus 148*4882a593Smuzhiyun status by default. 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun rockchip,vbus-always-on: 151*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 152*4882a593Smuzhiyun description: when set, indicates that the otg vbus is always powered on. 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun rockchip,low-power-mode: 155*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 156*4882a593Smuzhiyun description: when set, the port will enter low power state when suspend. 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun rockchip,typec-vbus-det: 159*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 160*4882a593Smuzhiyun description: when set, check the vbus status from grf con for Type-C 161*4882a593Smuzhiyun interface. It's used when the vbusdet pin is always pulled up. 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun rockchip,sel-pipe-phystatus: 164*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 165*4882a593Smuzhiyun description: when set, select the pipe phy status from grf for usb 166*4882a593Smuzhiyun controller. It's used when the usb3 phy is disabled, and it needs 167*4882a593Smuzhiyun to combine with the usbctrl-grf. 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun rockchip,dis-u2-susphy: 170*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 171*4882a593Smuzhiyun description: when set, disable the usb2 phy enter suspend automatically. 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun required: 174*4882a593Smuzhiyun - "#phy-cells" 175*4882a593Smuzhiyun - interrupts 176*4882a593Smuzhiyun - interrupt-names 177*4882a593Smuzhiyun 178*4882a593Smuzhiyunrequired: 179*4882a593Smuzhiyun - compatible 180*4882a593Smuzhiyun - reg 181*4882a593Smuzhiyun - clock-output-names 182*4882a593Smuzhiyun - "#clock-cells" 183*4882a593Smuzhiyun - "#phy-cells" 184*4882a593Smuzhiyun - host-port 185*4882a593Smuzhiyun - otg-port 186*4882a593Smuzhiyun 187*4882a593SmuzhiyunadditionalProperties: false 188*4882a593Smuzhiyun 189*4882a593Smuzhiyunexamples: 190*4882a593Smuzhiyun - | 191*4882a593Smuzhiyun #include <dt-bindings/clock/rk3399-cru.h> 192*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 193*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/irq.h> 194*4882a593Smuzhiyun u2phy0: usb2-phy@e450 { 195*4882a593Smuzhiyun compatible = "rockchip,rk3399-usb2phy"; 196*4882a593Smuzhiyun reg = <0xe450 0x10>; 197*4882a593Smuzhiyun clocks = <&cru SCLK_USB2PHY0_REF>; 198*4882a593Smuzhiyun clock-names = "phyclk"; 199*4882a593Smuzhiyun clock-output-names = "clk_usbphy0_480m"; 200*4882a593Smuzhiyun #clock-cells = <0>; 201*4882a593Smuzhiyun #phy-cells = <0>; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun u2phy0_host: host-port { 204*4882a593Smuzhiyun #phy-cells = <0>; 205*4882a593Smuzhiyun interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>; 206*4882a593Smuzhiyun interrupt-names = "linestate"; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun u2phy0_otg: otg-port { 210*4882a593Smuzhiyun #phy-cells = <0>; 211*4882a593Smuzhiyun interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>, 212*4882a593Smuzhiyun <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>, 213*4882a593Smuzhiyun <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>; 214*4882a593Smuzhiyun interrupt-names = "otg-bvalid", "otg-id", "linestate"; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun }; 217