1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2009 Martin Fuzzey <mfuzzey@gmail.com> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __ASM_ARCH_MX21_USBH 7*4882a593Smuzhiyun #define __ASM_ARCH_MX21_USBH 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun enum mx21_usbh_xcvr { 10*4882a593Smuzhiyun /* Values below as used by hardware (HWMODE register) */ 11*4882a593Smuzhiyun MX21_USBXCVR_TXDIF_RXDIF = 0, 12*4882a593Smuzhiyun MX21_USBXCVR_TXDIF_RXSE = 1, 13*4882a593Smuzhiyun MX21_USBXCVR_TXSE_RXDIF = 2, 14*4882a593Smuzhiyun MX21_USBXCVR_TXSE_RXSE = 3, 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun struct mx21_usbh_platform_data { 18*4882a593Smuzhiyun enum mx21_usbh_xcvr host_xcvr; /* tranceiver mode host 1,2 ports */ 19*4882a593Smuzhiyun enum mx21_usbh_xcvr otg_xcvr; /* tranceiver mode otg (as host) port */ 20*4882a593Smuzhiyun u16 enable_host1:1, 21*4882a593Smuzhiyun enable_host2:1, 22*4882a593Smuzhiyun enable_otg_host:1, /* enable "OTG" port (as host) */ 23*4882a593Smuzhiyun host1_xcverless:1, /* traceiverless host1 port */ 24*4882a593Smuzhiyun host1_txenoe:1, /* output enable host1 transmit enable */ 25*4882a593Smuzhiyun otg_ext_xcvr:1, /* external tranceiver for OTG port */ 26*4882a593Smuzhiyun unused:10; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #endif /* __ASM_ARCH_MX21_USBH */ 30