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/OK3568_Linux_fs/kernel/drivers/net/ethernet/realtek/r8168/
H A Drtltool.c1 // SPDX-License-Identifier: GPL-2.0-only
6 # controllers with PCI-Express interface.
53 if (copy_from_user(&my_cmd, ifr->ifr_data, sizeof(my_cmd))) in rtl8168_tool_ioctl()
54 return -EFAULT; in rtl8168_tool_ioctl()
60 return -EPERM; in rtl8168_tool_ioctl()
63 my_cmd.data = readb(tp->mmio_addr+my_cmd.offset); in rtl8168_tool_ioctl()
65 my_cmd.data = readw(tp->mmio_addr+(my_cmd.offset&~1)); in rtl8168_tool_ioctl()
67 my_cmd.data = readl(tp->mmio_addr+(my_cmd.offset&~3)); in rtl8168_tool_ioctl()
69 ret = -EOPNOTSUPP; in rtl8168_tool_ioctl()
73 if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { in rtl8168_tool_ioctl()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpio/
H A Dgpio-cs5535.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2007-2009 Andres Salomon <dilinger@collabora.co.uk>
17 #define DRV_NAME "cs5535-gpio"
21 * 31-29,23 : reserved (always mask out)
24 * 22-16 : LPC
44 * design pattern, see Documentation/driver-api/driver-model/design-patterns.rst
51 spinlock_t lock; member
63 unsigned long addr = chip->base + 0x80 + reg; in errata_outl()
68 * non-selected bits; the recommended workaround is a in errata_outl()
69 * read-modify-write operation. in errata_outl()
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H A Dgpio-ws16c48.c1 // SPDX-License-Identifier: GPL-2.0-only
34 * struct ws16c48_gpio - GPIO device private data structure
38 * @lock: synchronization lock to prevent I/O race conditions
47 raw_spinlock_t lock; member
53 static int ws16c48_gpio_get_direction(struct gpio_chip *chip, unsigned offset) in ws16c48_gpio_get_direction() argument
56 const unsigned port = offset / 8; in ws16c48_gpio_get_direction()
57 const unsigned mask = BIT(offset % 8); in ws16c48_gpio_get_direction()
59 if (ws16c48gpio->io_state[port] & mask) in ws16c48_gpio_get_direction()
65 static int ws16c48_gpio_direction_input(struct gpio_chip *chip, unsigned offset) in ws16c48_gpio_direction_input() argument
68 const unsigned port = offset / 8; in ws16c48_gpio_direction_input()
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H A Dgpio-104-dio-48e.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the ACCES 104-DIO-48E series
6 * This driver supports the following ACCES devices: 104-DIO-48E and
7 * 104-DIO-24E.
30 MODULE_PARM_DESC(base, "ACCES 104-DIO-48E base addresses");
34 MODULE_PARM_DESC(irq, "ACCES 104-DIO-48E interrupt line numbers");
37 * struct dio48e_gpio - GPIO device private data structure
42 * @lock: synchronization lock to prevent I/O race conditions
51 raw_spinlock_t lock; member
56 static int dio48e_gpio_get_direction(struct gpio_chip *chip, unsigned offset) in dio48e_gpio_get_direction() argument
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H A Dgpio-max730x.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * - DIN must be stable at the rising edge of clock.
12 * - when writing:
13 * - always clock in 16 clocks at once
14 * - at DIN: D15 first, D0 last
15 * - D0..D7 = databyte, D8..D14 = commandbyte
16 * - D15 = low -> write command
17 * - when reading
18 * - always clock in 16 clocks at once
19 * - at DIN: D15 first, D0 last
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H A Dgpio-gpio-mm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the Diamond Systems GPIO-MM
6 * This driver supports the following Diamond Systems devices: GPIO-MM and
7 * GPIO-MM-12.
28 MODULE_PARM_DESC(base, "Diamond Systems GPIO-MM base addresses");
31 * struct gpiomm_gpio - GPIO device private data structure
36 * @lock: synchronization lock to prevent I/O race conditions
44 spinlock_t lock; member
49 unsigned int offset) in gpiomm_gpio_get_direction() argument
52 const unsigned int port = offset / 8; in gpiomm_gpio_get_direction()
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H A Dgpio-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
43 * @offset_timer: Maps an offset to an @timer_users index, or zero if disabled
56 raw_spinlock_t lock; member
214 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
216 return gpio->base + bank->rdata_reg; in bank_reg()
218 return gpio->base + bank->val_regs + GPIO_VAL_DIR; in bank_reg()
220 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
222 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
224 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
226 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2; in bank_reg()
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H A Dgpio-pci-idio-16.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the ACCES PCI-IDIO-16
20 * struct idio_16_gpio_reg - GPIO device registers structure
21 * @out0_7: Read: FET Drive Outputs 0-7
22 * Write: FET Drive Outputs 0-7
23 * @in0_7: Read: Isolated Inputs 0-7
27 * @filter_ctl: Read: Activate Input Filters 0-15
28 * Write: Deactivate Input Filters 0-15
29 * @out8_15: Read: FET Drive Outputs 8-15
30 * Write: FET Drive Outputs 8-15
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H A Dgpio-viperboard.c1 // SPDX-License-Identifier: GPL-2.0+
45 u8 offset; member
77 …"gpio-a sampling freq in Hz (default is 1000Hz) valid values: 10, 100, 1000, 10000, 100000, 100000…
79 /* ----- begin of gipo a chip -------------------------------------------- */
82 unsigned int offset) in vprbrd_gpioa_get() argument
86 struct vprbrd *vb = gpio->vb; in vprbrd_gpioa_get()
87 struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; in vprbrd_gpioa_get()
90 if (gpio->gpioa_out & (1 << offset)) in vprbrd_gpioa_get()
91 return !!(gpio->gpioa_val & (1 << offset)); in vprbrd_gpioa_get()
93 mutex_lock(&vb->lock); in vprbrd_gpioa_get()
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H A Dgpio-sch311x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * GPIO driver for the SMSC SCH311x Super-I/O chips
20 #define DRV_NAME "gpio-sch311x"
44 spinlock_t lock; /* lock for this GPIO block */ member
93 * Super-IO functions
102 return -EBUSY; in sch311x_sio_enter()
132 static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset) in sch311x_gpio_request() argument
136 if (block->config_regs[offset] == 0) /* GPIO is not available */ in sch311x_gpio_request()
137 return -ENODEV; in sch311x_gpio_request()
139 if (!request_region(block->runtime_reg + block->config_regs[offset], in sch311x_gpio_request()
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H A Dgpio-pl061.c1 // SPDX-License-Identifier: GPL-2.0-only
51 raw_spinlock_t lock; member
63 static int pl061_get_direction(struct gpio_chip *gc, unsigned offset) in pl061_get_direction() argument
67 if (readb(pl061->base + GPIODIR) & BIT(offset)) in pl061_get_direction()
73 static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) in pl061_direction_input() argument
79 raw_spin_lock_irqsave(&pl061->lock, flags); in pl061_direction_input()
80 gpiodir = readb(pl061->base + GPIODIR); in pl061_direction_input()
81 gpiodir &= ~(BIT(offset)); in pl061_direction_input()
82 writeb(gpiodir, pl061->base + GPIODIR); in pl061_direction_input()
83 raw_spin_unlock_irqrestore(&pl061->lock, flags); in pl061_direction_input()
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H A Dgpio-omap.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2003-2005 Nokia Corporation
9 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
27 #include <linux/platform_data/gpio-omap.h>
58 raw_spinlock_t lock; member
83 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)
84 #define LINE_USED(line, offset) (line & (BIT(offset))) argument
111 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction()
117 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_reg() argument
120 void __iomem *reg = bank->base; in omap_set_gpio_dataout_reg()
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H A Dgpio-siox.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2018 Pengutronix, Uwe Kleine-König <kernel@pengutronix.de>
14 struct mutex lock; member
30 struct gpio_siox_ddata *ddata = dev_get_drvdata(&sdevice->dev); in gpio_siox_set_data()
32 mutex_lock(&ddata->lock); in gpio_siox_set_data()
33 buf[0] = ddata->setdata[0]; in gpio_siox_set_data()
34 mutex_unlock(&ddata->lock); in gpio_siox_set_data()
41 struct gpio_siox_ddata *ddata = dev_get_drvdata(&sdevice->dev); in gpio_siox_get_data()
42 size_t offset; in gpio_siox_get_data() local
45 mutex_lock(&ddata->lock); in gpio_siox_get_data()
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H A Dgpio-zx.c1 // SPDX-License-Identifier: GPL-2.0-only
41 raw_spinlock_t lock; member
47 static int zx_direction_input(struct gpio_chip *gc, unsigned offset) in zx_direction_input() argument
53 if (offset >= gc->ngpio) in zx_direction_input()
54 return -EINVAL; in zx_direction_input()
56 raw_spin_lock_irqsave(&chip->lock, flags); in zx_direction_input()
57 gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR); in zx_direction_input()
58 gpiodir &= ~BIT(offset); in zx_direction_input()
59 writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR); in zx_direction_input()
60 raw_spin_unlock_irqrestore(&chip->lock, flags); in zx_direction_input()
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H A Dgpio-mockup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2015-2016 Bamvor Jian Zhang <bamv2005@gmail.com>
37 * struct gpio_pin_status - structure describing a GPIO status
52 struct mutex lock; member
58 unsigned int offset; member
82 unsigned int offset) in __gpio_mockup_get() argument
84 return chip->lines[offset].value; in __gpio_mockup_get()
87 static int gpio_mockup_get(struct gpio_chip *gc, unsigned int offset) in gpio_mockup_get() argument
92 mutex_lock(&chip->lock); in gpio_mockup_get()
93 val = __gpio_mockup_get(chip, offset); in gpio_mockup_get()
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H A Dgpio-pcie-idio-24.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the ACCES PCIe-IDIO-24 family
15 * This driver supports the following ACCES devices: PCIe-IDIO-24,
16 * PCIe-IDI-24, PCIe-IDO-24, and PCIe-IDIO-12.
58 * 23: Built-In Self-Test (BIST) Interrupt Active
73 * struct idio_24_gpio_reg - GPIO device registers structure
74 * @out0_7: Read: FET Outputs 0-7
75 * Write: FET Outputs 0-7
76 * @out8_15: Read: FET Outputs 8-15
77 * Write: FET Outputs 8-15
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H A Dgpio-merrifield.c1 // SPDX-License-Identifier: GPL-2.0
47 .npins = (gend) - (gstart) + 1, \
53 raw_spinlock_t lock; member
86 static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned int offset, in gpio_reg() argument
90 u8 reg = offset / 32; in gpio_reg()
92 return priv->reg_base + reg_type_offset + reg * 4; in gpio_reg()
95 static int mrfld_gpio_get(struct gpio_chip *chip, unsigned int offset) in mrfld_gpio_get() argument
97 void __iomem *gplr = gpio_reg(chip, offset, GPLR); in mrfld_gpio_get()
99 return !!(readl(gplr) & BIT(offset % 32)); in mrfld_gpio_get()
102 static void mrfld_gpio_set(struct gpio_chip *chip, unsigned int offset, in mrfld_gpio_set() argument
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H A Dgpio-timberdale.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #define DRIVER_NAME "timb-gpio"
36 spinlock_t lock; /* mutual exclusion */ member
43 unsigned offset, bool enabled) in timbgpio_update_bit() argument
48 spin_lock(&tgpio->lock); in timbgpio_update_bit()
49 reg = ioread32(tgpio->membase + offset); in timbgpio_update_bit()
56 iowrite32(reg, tgpio->membase + offset); in timbgpio_update_bit()
57 spin_unlock(&tgpio->lock); in timbgpio_update_bit()
72 value = ioread32(tgpio->membase + TGPIOVAL); in timbgpio_gpio_get()
88 static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset) in timbgpio_to_irq() argument
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H A Dgpio-exar.c1 // SPDX-License-Identifier: GPL-2.0-only
27 struct mutex lock; member
35 unsigned int offset) in exar_update() argument
40 mutex_lock(&exar_gpio->lock); in exar_update()
41 temp = readb(exar_gpio->regs + reg); in exar_update()
42 temp &= ~BIT(offset); in exar_update()
44 temp |= BIT(offset); in exar_update()
45 writeb(temp, exar_gpio->regs + reg); in exar_update()
46 mutex_unlock(&exar_gpio->lock); in exar_update()
50 unsigned int offset) in exar_set_direction() argument
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/OK3568_Linux_fs/kernel/arch/mips/vr41xx/common/
H A Dicu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2001-2002 MontaVista Software Inc.
7 * Copyright (C) 2003-2006 Yoichi Yuasa <yuasa@linux-mips.org>
12 * - New creation, NEC VR4122 and VR4131 are supported.
13 * - Added support for NEC VR4111 and VR4121.
15 * Yoichi Yuasa <yuasa@linux-mips.org>
16 * - Coped with INTASSIGN of NEC VR4133.
84 #define SYSINT1_IRQ_TO_PIN(x) ((x) - SYSINT1_IRQ_BASE) /* Pin 0-15 */
85 #define SYSINT2_IRQ_TO_PIN(x) ((x) - SYSINT2_IRQ_BASE) /* Pin 0-15 */
87 #define INT_TO_IRQ(x) ((x) + 2) /* Int0-4 -> IRQ2-6 */
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/OK3568_Linux_fs/kernel/drivers/pinctrl/sirf/
H A Dpinctrl-sirf.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * Copyright (c) 2011 - 2014 Cambridge Silicon Radio Limited, a CSR plc group
32 #include "pinctrl-sirf.h"
34 #define DRIVER_NAME "pinmux-sirf"
39 spinlock_t lock; member
45 spinlock_t lock; member
73 struct seq_file *s, unsigned offset) in sirfsoc_pin_dbg_show() argument
106 dev_err(spmx->dev, "No child nodes passed via DT\n"); in sirfsoc_dt_node_to_map()
107 return -ENODEV; in sirfsoc_dt_node_to_map()
112 return -ENOMEM; in sirfsoc_dt_node_to_map()
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/OK3568_Linux_fs/kernel/drivers/pinctrl/actions/
H A Dpinctrl-owl.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Author: David Liu <liuwei@actions-semi.com>
24 #include <linux/pinctrl/pinconf-generic.h>
29 #include "../pinctrl-utils.h"
30 #include "pinctrl-owl.h"
33 * struct owl_pinctrl - pinctrl state of the device
37 * @lock: spinlock to protect registers
49 raw_spinlock_t lock; member
74 tmp = readl_relaxed(pctrl->base + reg); in owl_read_field()
75 mask = (1 << width) - 1; in owl_read_field()
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/OK3568_Linux_fs/kernel/Documentation/locking/
H A Drobust-futex-ABI.rst48 kernel, then it can actually have two such structures - one using 32 bit
56 pointer to a single linked list of 'lock entries', one per lock,
58 to itself, 'head'. The last 'lock entry' points back to the 'head'.
60 The second word, called 'offset', specifies the offset from the
61 address of the associated 'lock entry', plus or minus, of what will
62 be called the 'lock word', from that 'lock entry'. The 'lock word'
63 is always a 32 bit word, unlike the other words above. The 'lock
65 of the thread holding the lock in the bottom 30 bits. See further
69 the address of the 'lock entry', during list insertion and removal,
73 Each 'lock entry' on the single linked list starting at 'head' consists
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/lima/
H A Dlima_vm.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
5 #include <linux/dma-mapping.h>
26 #define LIMA_VM_PT_MASK ((1 << LIMA_VM_PD_SHIFT) - 1)
27 #define LIMA_VM_BT_MASK ((1 << LIMA_VM_PB_SHIFT) - 1)
43 vm->bts[pbe].cpu[bte] = 0; in lima_vm_unmap_range()
52 if (!vm->bts[pbe].cpu) { in lima_vm_map_page()
57 vm->bts[pbe].cpu = dma_alloc_wc( in lima_vm_map_page()
58 vm->dev->dev, LIMA_PAGE_SIZE << LIMA_VM_NUM_PT_PER_BT_SHIFT, in lima_vm_map_page()
59 &vm->bts[pbe].dma, GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO); in lima_vm_map_page()
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/OK3568_Linux_fs/kernel/mm/
H A Dswapfile.c1 // SPDX-License-Identifier: GPL-2.0-only
30 #include <linux/backing-dev.h>
62 /* protected with swap_lock. reading in vm_swap_full() doesn't need lock */
64 static int least_priority = -1;
68 static const char Bad_offset[] = "Bad swap offset entry ";
69 static const char Unused_offset[] = "Unused swap offset entry ";
83 * This uses its own lock instead of swap_lock because when a
84 * swap_info_struct changes between not-full/full, it needs to
85 * add/remove itself to/from this list, but the swap_info_struct->lock
87 * before any swap_info_struct->lock.
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