xref: /OK3568_Linux_fs/kernel/drivers/gpio/gpio-exar.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * GPIO driver for Exar XR17V35X chip
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2015 Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/bitops.h>
8*4882a593Smuzhiyun #include <linux/device.h>
9*4882a593Smuzhiyun #include <linux/gpio/driver.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/pci.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define EXAR_OFFSET_MPIOLVL_LO 0x90
17*4882a593Smuzhiyun #define EXAR_OFFSET_MPIOSEL_LO 0x93
18*4882a593Smuzhiyun #define EXAR_OFFSET_MPIOLVL_HI 0x96
19*4882a593Smuzhiyun #define EXAR_OFFSET_MPIOSEL_HI 0x99
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define DRIVER_NAME "gpio_exar"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun static DEFINE_IDA(ida_index);
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun struct exar_gpio_chip {
26*4882a593Smuzhiyun 	struct gpio_chip gpio_chip;
27*4882a593Smuzhiyun 	struct mutex lock;
28*4882a593Smuzhiyun 	int index;
29*4882a593Smuzhiyun 	void __iomem *regs;
30*4882a593Smuzhiyun 	char name[20];
31*4882a593Smuzhiyun 	unsigned int first_pin;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
exar_update(struct gpio_chip * chip,unsigned int reg,int val,unsigned int offset)34*4882a593Smuzhiyun static void exar_update(struct gpio_chip *chip, unsigned int reg, int val,
35*4882a593Smuzhiyun 			unsigned int offset)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);
38*4882a593Smuzhiyun 	int temp;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	mutex_lock(&exar_gpio->lock);
41*4882a593Smuzhiyun 	temp = readb(exar_gpio->regs + reg);
42*4882a593Smuzhiyun 	temp &= ~BIT(offset);
43*4882a593Smuzhiyun 	if (val)
44*4882a593Smuzhiyun 		temp |= BIT(offset);
45*4882a593Smuzhiyun 	writeb(temp, exar_gpio->regs + reg);
46*4882a593Smuzhiyun 	mutex_unlock(&exar_gpio->lock);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
exar_set_direction(struct gpio_chip * chip,int direction,unsigned int offset)49*4882a593Smuzhiyun static int exar_set_direction(struct gpio_chip *chip, int direction,
50*4882a593Smuzhiyun 			      unsigned int offset)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun 	struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);
53*4882a593Smuzhiyun 	unsigned int addr = (offset + exar_gpio->first_pin) / 8 ?
54*4882a593Smuzhiyun 		EXAR_OFFSET_MPIOSEL_HI : EXAR_OFFSET_MPIOSEL_LO;
55*4882a593Smuzhiyun 	unsigned int bit  = (offset + exar_gpio->first_pin) % 8;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	exar_update(chip, addr, direction, bit);
58*4882a593Smuzhiyun 	return 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
exar_get(struct gpio_chip * chip,unsigned int reg)61*4882a593Smuzhiyun static int exar_get(struct gpio_chip *chip, unsigned int reg)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);
64*4882a593Smuzhiyun 	int value;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	mutex_lock(&exar_gpio->lock);
67*4882a593Smuzhiyun 	value = readb(exar_gpio->regs + reg);
68*4882a593Smuzhiyun 	mutex_unlock(&exar_gpio->lock);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	return value;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun 
exar_get_direction(struct gpio_chip * chip,unsigned int offset)73*4882a593Smuzhiyun static int exar_get_direction(struct gpio_chip *chip, unsigned int offset)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);
76*4882a593Smuzhiyun 	unsigned int addr = (offset + exar_gpio->first_pin) / 8 ?
77*4882a593Smuzhiyun 		EXAR_OFFSET_MPIOSEL_HI : EXAR_OFFSET_MPIOSEL_LO;
78*4882a593Smuzhiyun 	unsigned int bit  = (offset + exar_gpio->first_pin) % 8;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	if (exar_get(chip, addr) & BIT(bit))
81*4882a593Smuzhiyun 		return GPIO_LINE_DIRECTION_IN;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	return GPIO_LINE_DIRECTION_OUT;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
exar_get_value(struct gpio_chip * chip,unsigned int offset)86*4882a593Smuzhiyun static int exar_get_value(struct gpio_chip *chip, unsigned int offset)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun 	struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);
89*4882a593Smuzhiyun 	unsigned int addr = (offset + exar_gpio->first_pin) / 8 ?
90*4882a593Smuzhiyun 		EXAR_OFFSET_MPIOLVL_HI : EXAR_OFFSET_MPIOLVL_LO;
91*4882a593Smuzhiyun 	unsigned int bit  = (offset + exar_gpio->first_pin) % 8;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	return !!(exar_get(chip, addr) & BIT(bit));
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun 
exar_set_value(struct gpio_chip * chip,unsigned int offset,int value)96*4882a593Smuzhiyun static void exar_set_value(struct gpio_chip *chip, unsigned int offset,
97*4882a593Smuzhiyun 			   int value)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);
100*4882a593Smuzhiyun 	unsigned int addr = (offset + exar_gpio->first_pin) / 8 ?
101*4882a593Smuzhiyun 		EXAR_OFFSET_MPIOLVL_HI : EXAR_OFFSET_MPIOLVL_LO;
102*4882a593Smuzhiyun 	unsigned int bit  = (offset + exar_gpio->first_pin) % 8;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	exar_update(chip, addr, value, bit);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
exar_direction_output(struct gpio_chip * chip,unsigned int offset,int value)107*4882a593Smuzhiyun static int exar_direction_output(struct gpio_chip *chip, unsigned int offset,
108*4882a593Smuzhiyun 				 int value)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	exar_set_value(chip, offset, value);
111*4882a593Smuzhiyun 	return exar_set_direction(chip, 0, offset);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun 
exar_direction_input(struct gpio_chip * chip,unsigned int offset)114*4882a593Smuzhiyun static int exar_direction_input(struct gpio_chip *chip, unsigned int offset)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	return exar_set_direction(chip, 1, offset);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
gpio_exar_probe(struct platform_device * pdev)119*4882a593Smuzhiyun static int gpio_exar_probe(struct platform_device *pdev)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	struct pci_dev *pcidev = to_pci_dev(pdev->dev.parent);
122*4882a593Smuzhiyun 	struct exar_gpio_chip *exar_gpio;
123*4882a593Smuzhiyun 	u32 first_pin, ngpios;
124*4882a593Smuzhiyun 	void __iomem *p;
125*4882a593Smuzhiyun 	int index, ret;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	/*
128*4882a593Smuzhiyun 	 * The UART driver must have mapped region 0 prior to registering this
129*4882a593Smuzhiyun 	 * device - use it.
130*4882a593Smuzhiyun 	 */
131*4882a593Smuzhiyun 	p = pcim_iomap_table(pcidev)[0];
132*4882a593Smuzhiyun 	if (!p)
133*4882a593Smuzhiyun 		return -ENOMEM;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	ret = device_property_read_u32(&pdev->dev, "exar,first-pin",
136*4882a593Smuzhiyun 				       &first_pin);
137*4882a593Smuzhiyun 	if (ret)
138*4882a593Smuzhiyun 		return ret;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	ret = device_property_read_u32(&pdev->dev, "ngpios", &ngpios);
141*4882a593Smuzhiyun 	if (ret)
142*4882a593Smuzhiyun 		return ret;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	exar_gpio = devm_kzalloc(&pdev->dev, sizeof(*exar_gpio), GFP_KERNEL);
145*4882a593Smuzhiyun 	if (!exar_gpio)
146*4882a593Smuzhiyun 		return -ENOMEM;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	mutex_init(&exar_gpio->lock);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	index = ida_simple_get(&ida_index, 0, 0, GFP_KERNEL);
151*4882a593Smuzhiyun 	if (index < 0) {
152*4882a593Smuzhiyun 		ret = index;
153*4882a593Smuzhiyun 		goto err_mutex_destroy;
154*4882a593Smuzhiyun 	}
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	sprintf(exar_gpio->name, "exar_gpio%d", index);
157*4882a593Smuzhiyun 	exar_gpio->gpio_chip.label = exar_gpio->name;
158*4882a593Smuzhiyun 	exar_gpio->gpio_chip.parent = &pdev->dev;
159*4882a593Smuzhiyun 	exar_gpio->gpio_chip.direction_output = exar_direction_output;
160*4882a593Smuzhiyun 	exar_gpio->gpio_chip.direction_input = exar_direction_input;
161*4882a593Smuzhiyun 	exar_gpio->gpio_chip.get_direction = exar_get_direction;
162*4882a593Smuzhiyun 	exar_gpio->gpio_chip.get = exar_get_value;
163*4882a593Smuzhiyun 	exar_gpio->gpio_chip.set = exar_set_value;
164*4882a593Smuzhiyun 	exar_gpio->gpio_chip.base = -1;
165*4882a593Smuzhiyun 	exar_gpio->gpio_chip.ngpio = ngpios;
166*4882a593Smuzhiyun 	exar_gpio->regs = p;
167*4882a593Smuzhiyun 	exar_gpio->index = index;
168*4882a593Smuzhiyun 	exar_gpio->first_pin = first_pin;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	ret = devm_gpiochip_add_data(&pdev->dev,
171*4882a593Smuzhiyun 				     &exar_gpio->gpio_chip, exar_gpio);
172*4882a593Smuzhiyun 	if (ret)
173*4882a593Smuzhiyun 		goto err_destroy;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	platform_set_drvdata(pdev, exar_gpio);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	return 0;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun err_destroy:
180*4882a593Smuzhiyun 	ida_simple_remove(&ida_index, index);
181*4882a593Smuzhiyun err_mutex_destroy:
182*4882a593Smuzhiyun 	mutex_destroy(&exar_gpio->lock);
183*4882a593Smuzhiyun 	return ret;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
gpio_exar_remove(struct platform_device * pdev)186*4882a593Smuzhiyun static int gpio_exar_remove(struct platform_device *pdev)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	struct exar_gpio_chip *exar_gpio = platform_get_drvdata(pdev);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	ida_simple_remove(&ida_index, exar_gpio->index);
191*4882a593Smuzhiyun 	mutex_destroy(&exar_gpio->lock);
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	return 0;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun static struct platform_driver gpio_exar_driver = {
197*4882a593Smuzhiyun 	.probe	= gpio_exar_probe,
198*4882a593Smuzhiyun 	.remove	= gpio_exar_remove,
199*4882a593Smuzhiyun 	.driver	= {
200*4882a593Smuzhiyun 		.name = DRIVER_NAME,
201*4882a593Smuzhiyun 	},
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun module_platform_driver(gpio_exar_driver);
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun MODULE_ALIAS("platform:" DRIVER_NAME);
207*4882a593Smuzhiyun MODULE_DESCRIPTION("Exar GPIO driver");
208*4882a593Smuzhiyun MODULE_AUTHOR("Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>");
209*4882a593Smuzhiyun MODULE_LICENSE("GPL");
210