xref: /OK3568_Linux_fs/kernel/drivers/gpio/gpio-max730x.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /**
3*4882a593Smuzhiyun  * Copyright (C) 2006 Juergen Beisert, Pengutronix
4*4882a593Smuzhiyun  * Copyright (C) 2008 Guennadi Liakhovetski, Pengutronix
5*4882a593Smuzhiyun  * Copyright (C) 2009 Wolfram Sang, Pengutronix
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * The Maxim MAX7300/1 device is an I2C/SPI driven GPIO expander. There are
8*4882a593Smuzhiyun  * 28 GPIOs. 8 of them can trigger an interrupt. See datasheet for more
9*4882a593Smuzhiyun  * details
10*4882a593Smuzhiyun  * Note:
11*4882a593Smuzhiyun  * - DIN must be stable at the rising edge of clock.
12*4882a593Smuzhiyun  * - when writing:
13*4882a593Smuzhiyun  *   - always clock in 16 clocks at once
14*4882a593Smuzhiyun  *   - at DIN: D15 first, D0 last
15*4882a593Smuzhiyun  *   - D0..D7 = databyte, D8..D14 = commandbyte
16*4882a593Smuzhiyun  *   - D15 = low -> write command
17*4882a593Smuzhiyun  * - when reading
18*4882a593Smuzhiyun  *   - always clock in 16 clocks at once
19*4882a593Smuzhiyun  *   - at DIN: D15 first, D0 last
20*4882a593Smuzhiyun  *   - D0..D7 = dummy, D8..D14 = register address
21*4882a593Smuzhiyun  *   - D15 = high -> read command
22*4882a593Smuzhiyun  *   - raise CS and assert it again
23*4882a593Smuzhiyun  *   - always clock in 16 clocks at once
24*4882a593Smuzhiyun  *   - at DOUT: D15 first, D0 last
25*4882a593Smuzhiyun  *   - D0..D7 contains the data from the first cycle
26*4882a593Smuzhiyun  *
27*4882a593Smuzhiyun  * The driver exports a standard gpiochip interface
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include <linux/module.h>
31*4882a593Smuzhiyun #include <linux/init.h>
32*4882a593Smuzhiyun #include <linux/platform_device.h>
33*4882a593Smuzhiyun #include <linux/mutex.h>
34*4882a593Smuzhiyun #include <linux/spi/max7301.h>
35*4882a593Smuzhiyun #include <linux/gpio/driver.h>
36*4882a593Smuzhiyun #include <linux/slab.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun  * Pin configurations, see MAX7301 datasheet page 6
40*4882a593Smuzhiyun  */
41*4882a593Smuzhiyun #define PIN_CONFIG_MASK 0x03
42*4882a593Smuzhiyun #define PIN_CONFIG_IN_PULLUP 0x03
43*4882a593Smuzhiyun #define PIN_CONFIG_IN_WO_PULLUP 0x02
44*4882a593Smuzhiyun #define PIN_CONFIG_OUT 0x01
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define PIN_NUMBER 28
47*4882a593Smuzhiyun 
max7301_direction_input(struct gpio_chip * chip,unsigned offset)48*4882a593Smuzhiyun static int max7301_direction_input(struct gpio_chip *chip, unsigned offset)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun 	struct max7301 *ts = container_of(chip, struct max7301, chip);
51*4882a593Smuzhiyun 	u8 *config;
52*4882a593Smuzhiyun 	u8 offset_bits, pin_config;
53*4882a593Smuzhiyun 	int ret;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	/* First 4 pins are unused in the controller */
56*4882a593Smuzhiyun 	offset += 4;
57*4882a593Smuzhiyun 	offset_bits = (offset & 3) << 1;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	config = &ts->port_config[offset >> 2];
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	if (ts->input_pullup_active & BIT(offset))
62*4882a593Smuzhiyun 		pin_config = PIN_CONFIG_IN_PULLUP;
63*4882a593Smuzhiyun 	else
64*4882a593Smuzhiyun 		pin_config = PIN_CONFIG_IN_WO_PULLUP;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	mutex_lock(&ts->lock);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	*config = (*config & ~(PIN_CONFIG_MASK << offset_bits))
69*4882a593Smuzhiyun 			   | (pin_config << offset_bits);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	mutex_unlock(&ts->lock);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	return ret;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
__max7301_set(struct max7301 * ts,unsigned offset,int value)78*4882a593Smuzhiyun static int __max7301_set(struct max7301 *ts, unsigned offset, int value)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	if (value) {
81*4882a593Smuzhiyun 		ts->out_level |= 1 << offset;
82*4882a593Smuzhiyun 		return ts->write(ts->dev, 0x20 + offset, 0x01);
83*4882a593Smuzhiyun 	} else {
84*4882a593Smuzhiyun 		ts->out_level &= ~(1 << offset);
85*4882a593Smuzhiyun 		return ts->write(ts->dev, 0x20 + offset, 0x00);
86*4882a593Smuzhiyun 	}
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
max7301_direction_output(struct gpio_chip * chip,unsigned offset,int value)89*4882a593Smuzhiyun static int max7301_direction_output(struct gpio_chip *chip, unsigned offset,
90*4882a593Smuzhiyun 				    int value)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	struct max7301 *ts = container_of(chip, struct max7301, chip);
93*4882a593Smuzhiyun 	u8 *config;
94*4882a593Smuzhiyun 	u8 offset_bits;
95*4882a593Smuzhiyun 	int ret;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	/* First 4 pins are unused in the controller */
98*4882a593Smuzhiyun 	offset += 4;
99*4882a593Smuzhiyun 	offset_bits = (offset & 3) << 1;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	config = &ts->port_config[offset >> 2];
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	mutex_lock(&ts->lock);
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	*config = (*config & ~(PIN_CONFIG_MASK << offset_bits))
106*4882a593Smuzhiyun 			   | (PIN_CONFIG_OUT << offset_bits);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	ret = __max7301_set(ts, offset, value);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (!ret)
111*4882a593Smuzhiyun 		ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config);
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	mutex_unlock(&ts->lock);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	return ret;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
max7301_get(struct gpio_chip * chip,unsigned offset)118*4882a593Smuzhiyun static int max7301_get(struct gpio_chip *chip, unsigned offset)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	struct max7301 *ts = gpiochip_get_data(chip);
121*4882a593Smuzhiyun 	int config, level = -EINVAL;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	/* First 4 pins are unused in the controller */
124*4882a593Smuzhiyun 	offset += 4;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	mutex_lock(&ts->lock);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	config = (ts->port_config[offset >> 2] >> ((offset & 3) << 1))
129*4882a593Smuzhiyun 			& PIN_CONFIG_MASK;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	switch (config) {
132*4882a593Smuzhiyun 	case PIN_CONFIG_OUT:
133*4882a593Smuzhiyun 		/* Output: return cached level */
134*4882a593Smuzhiyun 		level =  !!(ts->out_level & (1 << offset));
135*4882a593Smuzhiyun 		break;
136*4882a593Smuzhiyun 	case PIN_CONFIG_IN_WO_PULLUP:
137*4882a593Smuzhiyun 	case PIN_CONFIG_IN_PULLUP:
138*4882a593Smuzhiyun 		/* Input: read out */
139*4882a593Smuzhiyun 		level = ts->read(ts->dev, 0x20 + offset) & 0x01;
140*4882a593Smuzhiyun 	}
141*4882a593Smuzhiyun 	mutex_unlock(&ts->lock);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	return level;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
max7301_set(struct gpio_chip * chip,unsigned offset,int value)146*4882a593Smuzhiyun static void max7301_set(struct gpio_chip *chip, unsigned offset, int value)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	struct max7301 *ts = gpiochip_get_data(chip);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	/* First 4 pins are unused in the controller */
151*4882a593Smuzhiyun 	offset += 4;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	mutex_lock(&ts->lock);
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	__max7301_set(ts, offset, value);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	mutex_unlock(&ts->lock);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
__max730x_probe(struct max7301 * ts)160*4882a593Smuzhiyun int __max730x_probe(struct max7301 *ts)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun 	struct device *dev = ts->dev;
163*4882a593Smuzhiyun 	struct max7301_platform_data *pdata;
164*4882a593Smuzhiyun 	int i, ret;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	pdata = dev_get_platdata(dev);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	mutex_init(&ts->lock);
169*4882a593Smuzhiyun 	dev_set_drvdata(dev, ts);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	/* Power up the chip and disable IRQ output */
172*4882a593Smuzhiyun 	ts->write(dev, 0x04, 0x01);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	if (pdata) {
175*4882a593Smuzhiyun 		ts->input_pullup_active = pdata->input_pullup_active;
176*4882a593Smuzhiyun 		ts->chip.base = pdata->base;
177*4882a593Smuzhiyun 	} else {
178*4882a593Smuzhiyun 		ts->chip.base = -1;
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun 	ts->chip.label = dev->driver->name;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	ts->chip.direction_input = max7301_direction_input;
183*4882a593Smuzhiyun 	ts->chip.get = max7301_get;
184*4882a593Smuzhiyun 	ts->chip.direction_output = max7301_direction_output;
185*4882a593Smuzhiyun 	ts->chip.set = max7301_set;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	ts->chip.ngpio = PIN_NUMBER;
188*4882a593Smuzhiyun 	ts->chip.can_sleep = true;
189*4882a593Smuzhiyun 	ts->chip.parent = dev;
190*4882a593Smuzhiyun 	ts->chip.owner = THIS_MODULE;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	/*
193*4882a593Smuzhiyun 	 * initialize pullups according to platform data and cache the
194*4882a593Smuzhiyun 	 * register values for later use.
195*4882a593Smuzhiyun 	 */
196*4882a593Smuzhiyun 	for (i = 1; i < 8; i++) {
197*4882a593Smuzhiyun 		int j;
198*4882a593Smuzhiyun 		/*
199*4882a593Smuzhiyun 		 * initialize port_config with "0xAA", which means
200*4882a593Smuzhiyun 		 * input with internal pullup disabled. This is needed
201*4882a593Smuzhiyun 		 * to avoid writing zeros (in the inner for loop),
202*4882a593Smuzhiyun 		 * which is not allowed according to the datasheet.
203*4882a593Smuzhiyun 		 */
204*4882a593Smuzhiyun 		ts->port_config[i] = 0xAA;
205*4882a593Smuzhiyun 		for (j = 0; j < 4; j++) {
206*4882a593Smuzhiyun 			int offset = (i - 1) * 4 + j;
207*4882a593Smuzhiyun 			ret = max7301_direction_input(&ts->chip, offset);
208*4882a593Smuzhiyun 			if (ret)
209*4882a593Smuzhiyun 				goto exit_destroy;
210*4882a593Smuzhiyun 		}
211*4882a593Smuzhiyun 	}
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	ret = gpiochip_add_data(&ts->chip, ts);
214*4882a593Smuzhiyun 	if (!ret)
215*4882a593Smuzhiyun 		return ret;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun exit_destroy:
218*4882a593Smuzhiyun 	mutex_destroy(&ts->lock);
219*4882a593Smuzhiyun 	return ret;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__max730x_probe);
222*4882a593Smuzhiyun 
__max730x_remove(struct device * dev)223*4882a593Smuzhiyun int __max730x_remove(struct device *dev)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun 	struct max7301 *ts = dev_get_drvdata(dev);
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	if (ts == NULL)
228*4882a593Smuzhiyun 		return -ENODEV;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	/* Power down the chip and disable IRQ output */
231*4882a593Smuzhiyun 	ts->write(dev, 0x04, 0x00);
232*4882a593Smuzhiyun 	gpiochip_remove(&ts->chip);
233*4882a593Smuzhiyun 	mutex_destroy(&ts->lock);
234*4882a593Smuzhiyun 	return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__max730x_remove);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun MODULE_AUTHOR("Juergen Beisert, Wolfram Sang");
239*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
240*4882a593Smuzhiyun MODULE_DESCRIPTION("MAX730x GPIO-Expanders, generic parts");
241