| /OK3568_Linux_fs/kernel/arch/arc/boot/dts/ |
| H A D | abilis_tb101.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
|
| H A D | abilis_tb100.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
|
| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpio/ |
| H A D | gpio.txt | 1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
[all …]
|
| H A D | socionext,uniphier-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier GPIO controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 pattern: "^gpio@[0-9a-f]+$"
17 const: socionext,uniphier-gpio
22 gpio-controller: true
24 "#gpio-cells":
[all …]
|
| H A D | gpio-atlas7.txt | 1 CSR SiRFatlas7 GPIO controller bindings
4 - compatible : "sirf,atlas7-gpio"
5 - reg : Address range of the pinctrl registers
6 - interrupts : Interrupts used by every GPIO group
7 - gpio-banks : How many gpio banks on this controller
8 - gpio-controller : Indicates this device is a GPIO controller
9 - interrupt-controller : Marks the device node as an interrupt controller
11 The GPIO controller also acts as an interrupt controller. It uses the default
13 interrupt-controller/interrupts.txt.
18 compatible = "sirf,atlas7-gpio";
[all …]
|
| H A D | abilis,tb10x-gpio.txt | 1 * Abilis TB10x GPIO controller
4 - compatible: Should be "abilis,tb10x-gpio"
5 - reg: Address and length of the register set for the device
6 - gpio-controller: Marks the device node as a gpio controller.
7 - #gpio-cells: Should be <2>. The first cell is the pin number and the
9 - bit 0 specifies polarity (0 for normal, 1 for inverted).
10 - abilis,ngpio: the number of GPIO pins this driver controls.
13 - interrupt-controller: Marks the device node as an interrupt controller.
14 - #interrupt-cells: Should be <1>. Interrupts are triggered on both edges.
15 - interrupts: Defines the interrupt line connecting this GPIO controller to
[all …]
|
| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/gpio/ |
| H A D | gpio.txt | 1 Specifying GPIO information for devices
5 -----------------
8 properties, each containing a 'gpio-list':
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17 of this GPIO for the device. While a non-existent <name> is considered valid
21 GPIO properties can contain one or more GPIO phandles, but only in exceptional
[all …]
|
| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/ |
| H A D | abilis,tb10x-iomux.txt | 5 -------------------
7 - compatible: should be "abilis,tb10x-iomux";
8 - reg: should contain the physical address and size of the pin controller's
13 --------------------
15 Functions are defined (and referenced) by sub-nodes of the pin controller.
16 Every sub-node defines exactly one function (implying a set of pins).
17 Every function is associated to one named pin group inside the pin controller
18 driver and these names are used to associate pin group predefinitions to pin
19 controller sub-nodes.
22 - abilis,function: should be set to the name of the function's pin group.
[all …]
|
| H A D | qcom,sm8150-pinctrl.txt | 6 - compatible:
9 Definition: must be "qcom,sm8150-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
17 - reg-names:
19 Value type: <prop-encoded-array>
20 Defintiion: names for the cells of reg, must contain "north", "south"
23 - interrupts:
25 Value type: <prop-encoded-array>
28 - interrupt-controller:
[all …]
|
| H A D | qcom,sc7180-pinctrl.txt | 6 - compatible:
9 Definition: must be "qcom,sc7180-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
17 - reg-names:
19 Value type: <prop-encoded-array>
20 Definition: names for the cells of reg, must contain "north", "south"
23 - interrupts:
25 Value type: <prop-encoded-array>
28 - interrupt-controller:
[all …]
|
| H A D | qcom,ipq8064-pinctrl.txt | 4 - compatible: "qcom,ipq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
|
| H A D | qcom,msm8660-pinctrl.txt | 4 - compatible: "qcom,msm8660-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
|
| H A D | qcom,apq8064-pinctrl.txt | 4 - compatible: "qcom,apq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
|
| H A D | qcom,qcs404-pinctrl.txt | 6 - compatible:
9 Definition: must be "qcom,qcs404-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
17 - reg-names:
20 Defintiion: names for the cells of reg, must contain "north", "south"
23 - interrupts:
25 Value type: <prop-encoded-array>
28 - interrupt-controller:
33 - #interrupt-cells:
[all …]
|
| H A D | qcom,msm8974-pinctrl.txt | 4 - compatible: "qcom,msm8974-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
11 The first cell is the gpio pin number and the
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
[all …]
|
| H A D | qcom,sdm660-pinctrl.txt | 6 - compatible:
9 Definition: must be "qcom,sdm660-pinctrl" or
10 "qcom,sdm630-pinctrl".
12 - reg:
14 Value type: <prop-encoded-array>
18 - reg-names:
21 Definition: names for the cells of reg, must contain "north", "center"
24 - interrupts:
26 Value type: <prop-encoded-array>
29 - interrupt-controller:
[all …]
|
| H A D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
25 [1] GPIO : ../gpio/gpio.txt
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
[all …]
|
| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | ls1021a.dtsi | 2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/thermal/thermal.h>
52 #address-cells = <2>;
53 #size-cells = <2>;
55 interrupt-parent = <&gic>;
73 #address-cells = <1>;
74 #size-cells = <0>;
[all …]
|
| H A D | atlas7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
28 #address-cells = <1>;
29 #size-cells = <0>;
33 compatible = "arm,cortex-a7";
38 compatible = "arm,cortex-a7";
45 compatible = "fixed-clock";
[all …]
|
| H A D | pxa168.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Marvell Technology Group Ltd.
7 #include <dt-bindings/clock/marvell,pxa168.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
26 ranges;
[all …]
|
| H A D | pxa910.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Marvell Technology Group Ltd.
7 #include <dt-bindings/clock/marvell,pxa910.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
26 ranges;
[all …]
|
| H A D | uniphier-sld8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-sld8";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
[all …]
|
| H A D | uniphier-ld4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-ld4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
[all …]
|
| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
|
| H A D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a72";
[all …]
|