1*4882a593SmuzhiyunAbilis Systems TB10x pin controller 2*4882a593Smuzhiyun=================================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties 5*4882a593Smuzhiyun------------------- 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun- compatible: should be "abilis,tb10x-iomux"; 8*4882a593Smuzhiyun- reg: should contain the physical address and size of the pin controller's 9*4882a593Smuzhiyun register range. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunFunction definitions 13*4882a593Smuzhiyun-------------------- 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunFunctions are defined (and referenced) by sub-nodes of the pin controller. 16*4882a593SmuzhiyunEvery sub-node defines exactly one function (implying a set of pins). 17*4882a593SmuzhiyunEvery function is associated to one named pin group inside the pin controller 18*4882a593Smuzhiyundriver and these names are used to associate pin group predefinitions to pin 19*4882a593Smuzhiyuncontroller sub-nodes. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunRequired function definition subnode properties: 22*4882a593Smuzhiyun - abilis,function: should be set to the name of the function's pin group. 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunThe following pin groups are available: 25*4882a593Smuzhiyun - GPIO ports: gpioa, gpiob, gpioc, gpiod, gpioe, gpiof, gpiog, 26*4882a593Smuzhiyun gpioh, gpioi, gpioj, gpiok, gpiol, gpiom, gpion 27*4882a593Smuzhiyun - Serial TS input ports: mis0, mis1, mis2, mis3, mis4, mis5, mis6, mis7 28*4882a593Smuzhiyun - Parallel TS input ports: mip1, mip3, mip5, mip7 29*4882a593Smuzhiyun - Serial TS output ports: mos0, mos1, mos2, mos3 30*4882a593Smuzhiyun - Parallel TS output port: mop 31*4882a593Smuzhiyun - CI+ port: ciplus 32*4882a593Smuzhiyun - CableCard (Mcard) port: mcard 33*4882a593Smuzhiyun - Smart card ports: stc0, stc1 34*4882a593Smuzhiyun - UART ports: uart0, uart1 35*4882a593Smuzhiyun - SPI ports: spi1, spi3 36*4882a593Smuzhiyun - JTAG: jtag 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunAll other ports of the chip are not multiplexed and thus not managed by this 39*4882a593Smuzhiyundriver. 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun 42*4882a593SmuzhiyunGPIO ranges definition 43*4882a593Smuzhiyun---------------------- 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunThe named pin groups of GPIO ports can be used to define GPIO ranges as 46*4882a593Smuzhiyunexplained in Documentation/devicetree/bindings/gpio/gpio.txt. 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun 49*4882a593SmuzhiyunExample 50*4882a593Smuzhiyun------- 51*4882a593Smuzhiyun 52*4882a593Smuzhiyuniomux: iomux@ff10601c { 53*4882a593Smuzhiyun compatible = "abilis,tb10x-iomux"; 54*4882a593Smuzhiyun reg = <0xFF10601c 0x4>; 55*4882a593Smuzhiyun pctl_gpio_a: pctl-gpio-a { 56*4882a593Smuzhiyun abilis,function = "gpioa"; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun pctl_uart0: pctl-uart0 { 59*4882a593Smuzhiyun abilis,function = "uart0"; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun}; 62*4882a593Smuzhiyunuart@ff100000 { 63*4882a593Smuzhiyun compatible = "snps,dw-apb-uart"; 64*4882a593Smuzhiyun reg = <0xFF100000 0x100>; 65*4882a593Smuzhiyun clock-frequency = <166666666>; 66*4882a593Smuzhiyun interrupts = <25 1>; 67*4882a593Smuzhiyun reg-shift = <2>; 68*4882a593Smuzhiyun reg-io-width = <4>; 69*4882a593Smuzhiyun pinctrl-names = "default"; 70*4882a593Smuzhiyun pinctrl-0 = <&pctl_uart0>; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyungpioa: gpio@ff140000 { 73*4882a593Smuzhiyun compatible = "abilis,tb10x-gpio"; 74*4882a593Smuzhiyun reg = <0xFF140000 0x1000>; 75*4882a593Smuzhiyun gpio-controller; 76*4882a593Smuzhiyun #gpio-cells = <2>; 77*4882a593Smuzhiyun ngpio = <3>; 78*4882a593Smuzhiyun gpio-ranges = <&iomux 0 0>; 79*4882a593Smuzhiyun gpio-ranges-group-names = "gpioa"; 80*4882a593Smuzhiyun}; 81