xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunQualcomm Technologies, Inc. SC7180 TLMM block
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThis binding describes the Top Level Mode Multiplexer block found in the
4*4882a593SmuzhiyunSC7180 platform.
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun- compatible:
7*4882a593Smuzhiyun	Usage: required
8*4882a593Smuzhiyun	Value type: <string>
9*4882a593Smuzhiyun	Definition: must be "qcom,sc7180-pinctrl"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun- reg:
12*4882a593Smuzhiyun	Usage: required
13*4882a593Smuzhiyun	Value type: <prop-encoded-array>
14*4882a593Smuzhiyun	Definition: the base address and size of the north, south and west
15*4882a593Smuzhiyun		    TLMM tiles
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun- reg-names:
18*4882a593Smuzhiyun	Usage: required
19*4882a593Smuzhiyun	Value type: <prop-encoded-array>
20*4882a593Smuzhiyun	Definition: names for the cells of reg, must contain "north", "south"
21*4882a593Smuzhiyun		    and "west".
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun- interrupts:
24*4882a593Smuzhiyun	Usage: required
25*4882a593Smuzhiyun	Value type: <prop-encoded-array>
26*4882a593Smuzhiyun	Definition: should specify the TLMM summary IRQ.
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun- interrupt-controller:
29*4882a593Smuzhiyun	Usage: required
30*4882a593Smuzhiyun	Value type: <none>
31*4882a593Smuzhiyun	Definition: identifies this node as an interrupt controller
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun- #interrupt-cells:
34*4882a593Smuzhiyun	Usage: required
35*4882a593Smuzhiyun	Value type: <u32>
36*4882a593Smuzhiyun	Definition: must be 2. Specifying the pin number and flags, as defined
37*4882a593Smuzhiyun		    in <dt-bindings/interrupt-controller/irq.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun- gpio-controller:
40*4882a593Smuzhiyun	Usage: required
41*4882a593Smuzhiyun	Value type: <none>
42*4882a593Smuzhiyun	Definition: identifies this node as a gpio controller
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun- #gpio-cells:
45*4882a593Smuzhiyun	Usage: required
46*4882a593Smuzhiyun	Value type: <u32>
47*4882a593Smuzhiyun	Definition: must be 2. Specifying the pin number and flags, as defined
48*4882a593Smuzhiyun		    in <dt-bindings/gpio/gpio.h>
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun- gpio-ranges:
51*4882a593Smuzhiyun	Usage: required
52*4882a593Smuzhiyun	Value type: <prop-encoded-array>
53*4882a593Smuzhiyun	Definition:  see ../gpio/gpio.txt
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun- gpio-reserved-ranges:
56*4882a593Smuzhiyun	Usage: optional
57*4882a593Smuzhiyun	Value type: <prop-encoded-array>
58*4882a593Smuzhiyun	Definition: see ../gpio/gpio.txt
59*4882a593Smuzhiyun
60*4882a593SmuzhiyunPlease refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
61*4882a593Smuzhiyuna general description of GPIO and interrupt bindings.
62*4882a593Smuzhiyun
63*4882a593SmuzhiyunPlease refer to pinctrl-bindings.txt in this directory for details of the
64*4882a593Smuzhiyuncommon pinctrl bindings used by client devices, including the meaning of the
65*4882a593Smuzhiyunphrase "pin configuration node".
66*4882a593Smuzhiyun
67*4882a593SmuzhiyunThe pin configuration nodes act as a container for an arbitrary number of
68*4882a593Smuzhiyunsubnodes. Each of these subnodes represents some desired configuration for a
69*4882a593Smuzhiyunpin, a group, or a list of pins or groups. This configuration can include the
70*4882a593Smuzhiyunmux function to select on those pin(s)/group(s), and various pin configuration
71*4882a593Smuzhiyunparameters, such as pull-up, drive strength, etc.
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun
74*4882a593SmuzhiyunPIN CONFIGURATION NODES:
75*4882a593Smuzhiyun
76*4882a593SmuzhiyunThe name of each subnode is not important; all subnodes should be enumerated
77*4882a593Smuzhiyunand processed purely based on their content.
78*4882a593Smuzhiyun
79*4882a593SmuzhiyunEach subnode only affects those parameters that are explicitly listed. In
80*4882a593Smuzhiyunother words, a subnode that lists a mux function but no pin configuration
81*4882a593Smuzhiyunparameters implies no information about any pin configuration parameters.
82*4882a593SmuzhiyunSimilarly, a pin subnode that describes a pullup parameter implies no
83*4882a593Smuzhiyuninformation about e.g. the mux function.
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun
86*4882a593SmuzhiyunThe following generic properties as defined in pinctrl-bindings.txt are valid
87*4882a593Smuzhiyunto specify in a pin configuration subnode:
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun- pins:
90*4882a593Smuzhiyun	Usage: required
91*4882a593Smuzhiyun	Value type: <string-array>
92*4882a593Smuzhiyun	Definition: List of gpio pins affected by the properties specified in
93*4882a593Smuzhiyun		    this subnode.
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun		    Valid pins are:
96*4882a593Smuzhiyun		      gpio0-gpio118
97*4882a593Smuzhiyun		        Supports mux, bias and drive-strength
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		      sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd,
100*4882a593Smuzhiyun		      sdc2_data sdc1_rclk
101*4882a593Smuzhiyun		        Supports bias and drive-strength
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun		      ufs_reset
104*4882a593Smuzhiyun			Supports bias and drive-strength
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun- function:
107*4882a593Smuzhiyun	Usage: required
108*4882a593Smuzhiyun	Value type: <string>
109*4882a593Smuzhiyun	Definition: Specify the alternative function to be configured for the
110*4882a593Smuzhiyun		    specified pins. Functions are only valid for gpio pins.
111*4882a593Smuzhiyun		    Valid values are:
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun		    adsp_ext, agera_pll, aoss_cti, atest_char, atest_char0,
114*4882a593Smuzhiyun		    atest_char1, atest_char2, atest_char3, atest_tsens,
115*4882a593Smuzhiyun		    atest_tsens2, atest_usb1, atest_usb10, atest_usb11,
116*4882a593Smuzhiyun		    atest_usb12, atest_usb13, atest_usb2, atest_usb20,
117*4882a593Smuzhiyun		    atest_usb21, atest_usb22, atest_usb23, audio_ref,
118*4882a593Smuzhiyun		    btfm_slimbus, cam_mclk, cci_async, cci_i2c, cci_timer0,
119*4882a593Smuzhiyun		    cci_timer1, cci_timer2, cci_timer3, cci_timer4,
120*4882a593Smuzhiyun		    cri_trng, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,
121*4882a593Smuzhiyun		    ddr_pxi2, ddr_pxi3, dp_hot, edp_lcd, gcc_gp1, gcc_gp2,
122*4882a593Smuzhiyun		    gcc_gp3, gpio, gp_pdm0, gp_pdm1, gp_pdm2, gps_tx,
123*4882a593Smuzhiyun		    jitter_bist, ldo_en, ldo_update, lpass_ext, mdp_vsync,
124*4882a593Smuzhiyun		    mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s_0,
125*4882a593Smuzhiyun		    mi2s_1, mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag,
126*4882a593Smuzhiyun		    PLL_BIST, pll_bypassnl, pll_reset, prng_rosc, qdss,
127*4882a593Smuzhiyun		    qdss_cti, qlink_enable, qlink_request, qspi_clk, qspi_cs,
128*4882a593Smuzhiyun		    qspi_data, qup00, qup01, qup02_i2c, qup02_uart, qup03,
129*4882a593Smuzhiyun		    qup04_i2c, qup04_uart, qup05, qup10, qup11_i2c, qup11_uart,
130*4882a593Smuzhiyun		    qup12, qup13_i2c, qup13_uart, qup14, qup15, sdc1_tb,
131*4882a593Smuzhiyun		    sdc2_tb, sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2,
132*4882a593Smuzhiyun		    tgu_ch3, tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt,
133*4882a593Smuzhiyun		    usb_phy, vfr_1, _V_GPIO, _V_PPS_IN, _V_PPS_OUT,
134*4882a593Smuzhiyun		    vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0,
135*4882a593Smuzhiyun		    wlan2_adc1,
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun- bias-disable:
138*4882a593Smuzhiyun	Usage: optional
139*4882a593Smuzhiyun	Value type: <none>
140*4882a593Smuzhiyun	Definition: The specified pins should be configured as no pull.
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun- bias-pull-down:
143*4882a593Smuzhiyun	Usage: optional
144*4882a593Smuzhiyun	Value type: <none>
145*4882a593Smuzhiyun	Definition: The specified pins should be configured as pull down.
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun- bias-pull-up:
148*4882a593Smuzhiyun	Usage: optional
149*4882a593Smuzhiyun	Value type: <none>
150*4882a593Smuzhiyun	Definition: The specified pins should be configured as pull up.
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun- output-high:
153*4882a593Smuzhiyun	Usage: optional
154*4882a593Smuzhiyun	Value type: <none>
155*4882a593Smuzhiyun	Definition: The specified pins are configured in output mode, driven
156*4882a593Smuzhiyun		    high.
157*4882a593Smuzhiyun		    Not valid for sdc pins.
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun- output-low:
160*4882a593Smuzhiyun	Usage: optional
161*4882a593Smuzhiyun	Value type: <none>
162*4882a593Smuzhiyun	Definition: The specified pins are configured in output mode, driven
163*4882a593Smuzhiyun		    low.
164*4882a593Smuzhiyun		    Not valid for sdc pins.
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun- drive-strength:
167*4882a593Smuzhiyun	Usage: optional
168*4882a593Smuzhiyun	Value type: <u32>
169*4882a593Smuzhiyun	Definition: Selects the drive strength for the specified pins, in mA.
170*4882a593Smuzhiyun		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
171*4882a593Smuzhiyun
172*4882a593SmuzhiyunExample:
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	tlmm: pinctrl@3500000 {
175*4882a593Smuzhiyun		compatible = "qcom,sc7180-pinctrl";
176*4882a593Smuzhiyun		reg = <0x3500000 0x300000>,
177*4882a593Smuzhiyun		      <0x3900000 0x300000>,
178*4882a593Smuzhiyun		      <0x3D00000 0x300000>;
179*4882a593Smuzhiyun		reg-names = "west", "north", "south";
180*4882a593Smuzhiyun		interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
181*4882a593Smuzhiyun		gpio-controller;
182*4882a593Smuzhiyun		#gpio-cells = <2>;
183*4882a593Smuzhiyun		gpio-ranges = <&tlmm 0 0 119>;
184*4882a593Smuzhiyun		gpio-reserved-ranges = <0 4>, <106 4>;
185*4882a593Smuzhiyun		interrupt-controller;
186*4882a593Smuzhiyun		#interrupt-cells = <2>;
187*4882a593Smuzhiyun	};
188