| /OK3568_Linux_fs/kernel/drivers/irqchip/ |
| H A D | irq-mvebu-pic.c | 35 static void mvebu_pic_reset(struct mvebu_pic *pic) in mvebu_pic_reset() argument 38 writel(0, pic->base + PIC_MASK); in mvebu_pic_reset() 39 writel(PIC_MAX_IRQ_MASK, pic->base + PIC_CAUSE); in mvebu_pic_reset() 44 struct mvebu_pic *pic = irq_data_get_irq_chip_data(d); in mvebu_pic_eoi_irq() local 46 writel(1 << d->hwirq, pic->base + PIC_CAUSE); in mvebu_pic_eoi_irq() 51 struct mvebu_pic *pic = irq_data_get_irq_chip_data(d); in mvebu_pic_mask_irq() local 54 reg = readl(pic->base + PIC_MASK); in mvebu_pic_mask_irq() 56 writel(reg, pic->base + PIC_MASK); in mvebu_pic_mask_irq() 61 struct mvebu_pic *pic = irq_data_get_irq_chip_data(d); in mvebu_pic_unmask_irq() local 64 reg = readl(pic->base + PIC_MASK); in mvebu_pic_unmask_irq() [all …]
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| H A D | irq-or1k-pic.c | 13 /* OR1K PIC implementation */ 48 * There are two oddities with the OR1200 PIC implementation: 66 .name = "or1k-PIC-level", 76 .name = "or1k-PIC-edge", 88 .name = "or1200-PIC", 123 struct or1k_pic_dev *pic = d->host_data; in or1k_map() local 125 irq_set_chip_and_handler(irq, &pic->chip, pic->handle); in or1k_map() 126 irq_set_status_flags(irq, pic->flags); in or1k_map() 137 * This sets up the IRQ domain for the PIC built in to the OpenRISC 142 struct or1k_pic_dev *pic) in or1k_pic_init() argument [all …]
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| /OK3568_Linux_fs/external/mpp/mpp/codec/dec/vp9/ |
| H A D | vp9d_parser2_syntax.c | 71 static int vp9d_fill_picparams(Vp9CodecContext *ctx, DXVA_PicParams_VP9 *pic) in vp9d_fill_picparams() argument 77 DXVA_prob_vp9* prob_flag = &pic->prob_flag_delta.p_flag; in vp9d_fill_picparams() 78 DXVA_prob_vp9* prob_delta = &pic->prob_flag_delta.p_delta; in vp9d_fill_picparams() 81 pic->profile = ctx->profile; in vp9d_fill_picparams() 82 pic->show_existing_frame = s->show_existing_frame; in vp9d_fill_picparams() 83 pic->frame_type = !s->keyframe; in vp9d_fill_picparams() 84 pic->show_frame = !s->invisible; in vp9d_fill_picparams() 85 pic->error_resilient_mode = s->errorres; in vp9d_fill_picparams() 86 pic->subsampling_x = s->ss_h; in vp9d_fill_picparams() 87 pic->subsampling_y = s->ss_v; in vp9d_fill_picparams() [all …]
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| /OK3568_Linux_fs/kernel/arch/c6x/platforms/ |
| H A D | megamod-pic.c | 16 #include <asm/megamod-pic.h> 59 struct megamod_pic *pic; member 67 struct megamod_pic *pic = irq_data_get_irq_chip_data(data); in mask_megamod() local 69 u32 __iomem *evtmask = &pic->regs->evtmask[src / 32]; in mask_megamod() 71 raw_spin_lock(&pic->lock); in mask_megamod() 73 raw_spin_unlock(&pic->lock); in mask_megamod() 78 struct megamod_pic *pic = irq_data_get_irq_chip_data(data); in unmask_megamod() local 80 u32 __iomem *evtmask = &pic->regs->evtmask[src / 32]; in unmask_megamod() 82 raw_spin_lock(&pic->lock); in unmask_megamod() 84 raw_spin_unlock(&pic->lock); in unmask_megamod() [all …]
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| /OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | interrupts.c | 25 ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR; in interrupt_init_cpu() local 29 * The POST word is stored in the PIC's TFRR register which gets in interrupt_init_cpu() 30 * cleared when the PIC is reset. Save it off so we can restore it in interrupt_init_cpu() 36 out_be32(&pic->gcr, MPC85xx_PICGCR_RST); in interrupt_init_cpu() 37 while (in_be32(&pic->gcr) & MPC85xx_PICGCR_RST) in interrupt_init_cpu() 39 out_be32(&pic->gcr, MPC85xx_PICGCR_M); in interrupt_init_cpu() 40 in_be32(&pic->gcr); in interrupt_init_cpu() 48 pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */ in interrupt_init_cpu() 49 debug("iivpr1@%x = %x\n", (uint)&pic->iivpr1, pic->iivpr1); in interrupt_init_cpu() 51 pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */ in interrupt_init_cpu() [all …]
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| /OK3568_Linux_fs/kernel/arch/mips/boot/dts/loongson/ |
| H A D | ls7a-pch.dtsi | 13 pic: interrupt-controller@10000000 { label 14 compatible = "loongson,pch-pic-1.0"; 18 loongson,pic-base-vec = <0>; 26 interrupt-parent = <&pic>; 36 interrupt-parent = <&pic>; 46 interrupt-parent = <&pic>; 56 interrupt-parent = <&pic>; 83 interrupt-parent = <&pic>; 94 interrupt-parent = <&pic>; 105 interrupt-parent = <&pic>; [all …]
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| /OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc86xx/ |
| H A D | interrupts.c | 29 volatile ccsr_pic_t *pic = &immr->im_pic; in interrupt_init_cpu() local 33 * The POST word is stored in the PIC's TFRR register which gets in interrupt_init_cpu() 34 * cleared when the PIC is reset. Save it off so we can restore it in interrupt_init_cpu() 40 pic->gcr = MPC86xx_PICGCR_RST; in interrupt_init_cpu() 41 while (pic->gcr & MPC86xx_PICGCR_RST) in interrupt_init_cpu() 43 pic->gcr = MPC86xx_PICGCR_MODE; in interrupt_init_cpu() 52 pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */ in interrupt_init_cpu() 53 debug("iivpr1@%p = %x\n", &pic->iivpr1, pic->iivpr1); in interrupt_init_cpu() 55 pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */ in interrupt_init_cpu() 56 debug("iivpr2@%p = %x\n", &pic->iivpr2, pic->iivpr2); in interrupt_init_cpu() [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/platforms/cell/ |
| H A D | spider-pic.c | 63 static void __iomem *spider_get_irq_config(struct spider_pic *pic, in spider_get_irq_config() argument 66 return pic->regs + TIR_CFGA + 8 * src; in spider_get_irq_config() 71 struct spider_pic *pic = spider_irq_data_to_pic(d); in spider_unmask_irq() local 72 void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d)); in spider_unmask_irq() 79 struct spider_pic *pic = spider_irq_data_to_pic(d); in spider_mask_irq() local 80 void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d)); in spider_mask_irq() 87 struct spider_pic *pic = spider_irq_data_to_pic(d); in spider_ack_irq() local 100 out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf)); in spider_ack_irq() 106 struct spider_pic *pic = spider_irq_data_to_pic(d); in spider_set_irq_type() local 108 void __iomem *cfg = spider_get_irq_config(pic, hw); in spider_set_irq_type() [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | open-pic.txt | 1 * Open PIC Binding 4 representation of an Open PIC compliant interrupt controller. This binding is 5 based on the binding defined for Open PIC in [1] and is a superset of that 13 - compatible: Specifies the compatibility list for the PIC. The type 14 shall be <string> and the value shall include "open-pic". 17 PIC's addressable register space. The type shall be <prop-encoded-array>. 20 as an Open PIC. No property value shall be defined. 31 - pic-no-reset: The presence of this property indicates that the PIC 55 * An Open PIC interrupt controller 57 mpic: pic@40000 { [all …]
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| H A D | loongson,pch-pic.yaml | 4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#" 7 title: Loongson PCH PIC Controller 19 const: loongson,pch-pic-1.0 24 loongson,pic-base-vec: 27 to PCH PIC. 40 - loongson,pic-base-vec 49 pic: interrupt-controller@10000000 { 50 compatible = "loongson,pch-pic-1.0"; 54 loongson,pic-base-vec = <64>;
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| H A D | ti,c64x+megamod-pic.txt | 13 - compatible: Should be "ti,c64x+core-pic"; 26 compatible = "ti,c64x+core-pic"; 33 The megamodule PIC consists of four interrupt mupliplexers each of which 35 may be cascaded into the core interrupt controller. The megamodule PIC 45 - compatible: "ti,c64x+megamod-pic" 55 - ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core 68 interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will 75 compatible = "ti,c64x+megamod-pic"; 89 compatible = "ti,c64x+megamod-pic"; 95 ti,c64x+megamod-pic-mux = < 0 0 0 0
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| H A D | opencores,or1k-pic.txt | 5 - compatible : should be "opencores,or1k-pic-level" for variants with 6 level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with 7 edge triggered interrupt lines or "opencores,or1200-pic" for machines 10 "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic", 20 compatible = "opencores,or1k-pic-level";
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pci/ |
| H A D | v3-v360epc-pci.txt | 39 interrupt-parent = <&pic>; 56 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */ 57 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */ 58 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */ 59 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */ 61 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */ 62 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */ 63 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */ 64 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */ 66 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */ [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | integratorap.dts | 150 pic: pic@14000000 { label 162 interrupt-parent = <&pic>; 179 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */ 180 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */ 181 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */ 182 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */ 184 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */ 185 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */ 186 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */ 187 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */ [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/ |
| H A D | mpc8272ads.dts | 69 compatible = "fsl,mpc8272ads-pci-pic", 70 "fsl,pq2ads-pci-pic"; 74 interrupt-parent = <&PIC>; 108 interrupt-parent = <&PIC>; 156 interrupt-parent = <&PIC>; 167 interrupt-parent = <&PIC>; 176 interrupt-parent = <&PIC>; 191 interrupt-parent = <&PIC>; 197 interrupt-parent = <&PIC>; 210 interrupt-parent = <&PIC>; [all …]
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| H A D | pq2fads.dts | 68 PCI_PIC: pic@8,0 { 72 compatible = "fsl,pq2ads-pci-pic"; 73 interrupt-parent = <&PIC>; 106 interrupt-parent = <&PIC>; 155 interrupt-parent = <&PIC>; 166 interrupt-parent = <&PIC>; 177 interrupt-parent = <&PIC>; 189 interrupt-parent = <&PIC>; 207 interrupt-parent = <&PIC>; 213 interrupt-parent = <&PIC>; [all …]
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| H A D | tqm8xx.dts | 39 interrupt-parent = <&PIC>; 73 interrupt-parent = <&PIC>; 85 interrupt-parent = <&PIC>; 115 interrupt-parent = <&PIC>; 120 PIC: pic@0 { label 124 compatible = "fsl,mpc860-pic", "fsl,pq1-pic"; 156 CPM_PIC: pic@930 { 161 interrupt-parent = <&PIC>; 163 compatible = "fsl,mpc860-cpm-pic", 164 "fsl,cpm1-pic";
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| H A D | mpc866ads.dts | 32 interrupt-parent = <&PIC>; 83 interrupt-parent = <&PIC>; 88 PIC: pic@0 { label 92 compatible = "fsl,mpc866-pic", "fsl,pq1-pic"; 124 CPM_PIC: pic@930 { 129 interrupt-parent = <&PIC>; 131 compatible = "fsl,mpc866-cpm-pic", 132 "fsl,cpm1-pic";
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| /OK3568_Linux_fs/buildroot/package/mbedtls/ |
| H A D | 0001-bn_mul.h-fix-x86-PIC-inline-ASM-compilation-with-GCC.patch | 4 Subject: [PATCH] bn_mul.h: fix x86 PIC inline ASM compilation with GCC < 5 12 assembly fails to build with GCC < 5 in PIC mode with the following error: 14 include/mbedtls/bn_mul.h:46:13: error: PIC register clobbered by ‘ebx’ in ‘asm’ 17 used for the GOT) as a fixed reserved register when building as PIC. 22 Register allocation improvements: Reuse of the PIC hard register, instead of 24 improves generated PIC code performance as more hard registers can be used. 47 + * fixed reserved register when building as PIC, leading to errors 48 + * like: bn_mul.h:46:13: error: PIC register clobbered by ‘ebx’ in ‘asm’ 52 + * Register allocation improvements: Reuse of the PIC hard register, 54 + * targets. This improves generated PIC code performance as more hard
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| /OK3568_Linux_fs/yocto/meta-openembedded/meta-networking/recipes-daemons/cyrus-sasl/cyrus-sasl/ |
| H A D | debian_patches_0014_avoid_pic_overwrite.diff | 6 Description: This patch makes sure the non-PIC version of libsasldb.a, which 7 is created out of non-PIC objects, is not going to overwrite the PIC version, 8 which is created out of PIC objects. The PIC version is placed in .libs, and 9 the non-PIC version in the current directory. This ensures that both non-PIC 10 and PIC versions are available in the correct locations.
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| /OK3568_Linux_fs/kernel/arch/powerpc/platforms/52xx/ |
| H A D | lite5200_pm.c | 13 static struct mpc52xx_intr __iomem *pic; variable 79 pic = mbar + 0x500; in lite5200_pm_prepare() 101 _memcpy_fromio(&spic, pic, sizeof(*pic)); in lite5200_save_regs() 189 /* PIC */ in lite5200_restore_regs() 190 out_be32(&pic->per_pri1, spic.per_pri1); in lite5200_restore_regs() 191 out_be32(&pic->per_pri2, spic.per_pri2); in lite5200_restore_regs() 192 out_be32(&pic->per_pri3, spic.per_pri3); in lite5200_restore_regs() 194 out_be32(&pic->main_pri1, spic.main_pri1); in lite5200_restore_regs() 195 out_be32(&pic->main_pri2, spic.main_pri2); in lite5200_restore_regs() 197 out_be32(&pic->enc_status, spic.enc_status); in lite5200_restore_regs() [all …]
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| /OK3568_Linux_fs/kernel/arch/xtensa/boot/dts/ |
| H A D | virt.dts | 8 interrupt-parent = <&pic>; 37 pic: pic { label 38 compatible = "cdns,xtensa-pic"; 64 0x0000 0x0 0x0 0x1 &pic 0x0 0x1 65 0x0800 0x0 0x0 0x1 &pic 0x1 0x1 66 0x1000 0x0 0x0 0x1 &pic 0x2 0x1 67 0x1800 0x0 0x0 0x1 &pic 0x3 0x1
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| /OK3568_Linux_fs/kernel/arch/sparc/include/uapi/asm/ |
| H A D | perfctr.h | 26 * to 64-bit accumulator for D0 counter in PIC, ARG1 is pointer 38 /* Add current D0 and D1 PIC values into user pointers given 39 * in PERFCTR_ON operation. The PIC is cleared before returning. 43 /* Clear the PIC register. */ 47 * in ARG0. The PIC is also cleared after the new PCR value is 62 /* Pic.S0 Selection Bit Field Encoding, Ultra-I/II */ 76 /* Pic.S0 Selection Bit Field Encoding, Ultra-III */ 107 /* Pic.S1 Selection Bit Field Encoding, Ultra-I/II */ 121 /* Pic.S1 Selection Bit Field Encoding, Ultra-III */
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| /OK3568_Linux_fs/kernel/arch/alpha/kernel/ |
| H A D | irq_i8259.c | 76 .name = "XT-PIC", 124 * Generate a PCI interrupt acknowledge cycle. The PIC will in isa_device_interrupt() 139 unsigned long pic; in isa_no_iack_sc_device_interrupt() local 154 pic = inb(0x20) | (inb(0xA0) << 8); /* read isr */ in isa_no_iack_sc_device_interrupt() 155 pic &= 0xFFFB; /* mask out cascade & hibits */ in isa_no_iack_sc_device_interrupt() 157 while (pic) { in isa_no_iack_sc_device_interrupt() 158 int j = ffz(~pic); in isa_no_iack_sc_device_interrupt() 159 pic &= pic - 1; in isa_no_iack_sc_device_interrupt()
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| /OK3568_Linux_fs/kernel/drivers/media/platform/mtk-vcodec/vdec/ |
| H A D | vdec_h264_if.c | 103 * @pic : picture information (AP-R, VPU-W) 113 struct vdec_pic_info pic; member 167 static int alloc_mv_buf(struct vdec_h264_inst *inst, struct vdec_pic_info *pic) in alloc_mv_buf() argument 172 unsigned int buf_sz = get_mv_buf_size(pic->buf_w, pic->buf_h); in alloc_mv_buf() 246 struct vdec_pic_info *pic) in get_pic_info() argument 248 *pic = inst->vsi->pic; in get_pic_info() 249 mtk_vcodec_debug(inst, "pic(%d, %d), buf(%d, %d)", in get_pic_info() 250 pic->pic_w, pic->pic_h, pic->buf_w, pic->buf_h); in get_pic_info() 252 pic->fb_sz[0], pic->fb_sz[1]); in get_pic_info() 400 struct vdec_pic_info pic; in vdec_h264_decode() local [all …]
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