1*4882a593SmuzhiyunV3 Semiconductor V360 EPC PCI bridge 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis bridge is found in the ARM Integrator/AP (Application Platform) 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun- compatible: should be one of: 7*4882a593Smuzhiyun "v3,v360epc-pci" 8*4882a593Smuzhiyun "arm,integrator-ap-pci", "v3,v360epc-pci" 9*4882a593Smuzhiyun- reg: should contain two register areas: 10*4882a593Smuzhiyun first the base address of the V3 host bridge controller, 64KB 11*4882a593Smuzhiyun second the configuration area register space, 16MB 12*4882a593Smuzhiyun- interrupts: should contain a reference to the V3 error interrupt 13*4882a593Smuzhiyun as routed on the system. 14*4882a593Smuzhiyun- bus-range: see pci.txt 15*4882a593Smuzhiyun- ranges: this follows the standard PCI bindings in the IEEE Std 16*4882a593Smuzhiyun 1275-1994 (see pci.txt) with the following restriction: 17*4882a593Smuzhiyun - The non-prefetchable and prefetchable memory windows must 18*4882a593Smuzhiyun each be exactly 256MB (0x10000000) in size. 19*4882a593Smuzhiyun - The prefetchable memory window must be immediately adjacent 20*4882a593Smuzhiyun to the non-prefetcable memory window 21*4882a593Smuzhiyun- dma-ranges: three ranges for the inbound memory region. The ranges must 22*4882a593Smuzhiyun be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 23*4882a593Smuzhiyun 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked 24*4882a593Smuzhiyun as pre-fetchable. Two ranges are supported by the hardware. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunIntegrator-specific required properties: 27*4882a593Smuzhiyun- syscon: should contain a link to the syscon device node, since 28*4882a593Smuzhiyun on the Integrator, some registers in the syscon are required to 29*4882a593Smuzhiyun operate the V3 host bridge. 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunExample: 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunpci: pciv3@62000000 { 34*4882a593Smuzhiyun compatible = "arm,integrator-ap-pci", "v3,v360epc-pci"; 35*4882a593Smuzhiyun #interrupt-cells = <1>; 36*4882a593Smuzhiyun #size-cells = <2>; 37*4882a593Smuzhiyun #address-cells = <3>; 38*4882a593Smuzhiyun reg = <0x62000000 0x10000>, <0x61000000 0x01000000>; 39*4882a593Smuzhiyun interrupt-parent = <&pic>; 40*4882a593Smuzhiyun interrupts = <17>; /* Bus error IRQ */ 41*4882a593Smuzhiyun clocks = <&pciclk>; 42*4882a593Smuzhiyun bus-range = <0x00 0xff>; 43*4882a593Smuzhiyun ranges = 0x01000000 0 0x00000000 /* I/O space @00000000 */ 44*4882a593Smuzhiyun 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */ 45*4882a593Smuzhiyun 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */ 46*4882a593Smuzhiyun 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */ 47*4882a593Smuzhiyun 0x42000000 0 0x50000000 /* prefetchable memory @50000000 */ 48*4882a593Smuzhiyun 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */ 49*4882a593Smuzhiyun dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */ 50*4882a593Smuzhiyun 0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */ 51*4882a593Smuzhiyun 0x02000000 0 0x80000000 /* Core module alias memory */ 52*4882a593Smuzhiyun 0x80000000 0 0x40000000>; /* 1GB @ LB 80000000 */ 53*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0 0 0x7>; 54*4882a593Smuzhiyun interrupt-map = < 55*4882a593Smuzhiyun /* IDSEL 9 */ 56*4882a593Smuzhiyun 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */ 57*4882a593Smuzhiyun 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */ 58*4882a593Smuzhiyun 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */ 59*4882a593Smuzhiyun 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */ 60*4882a593Smuzhiyun /* IDSEL 10 */ 61*4882a593Smuzhiyun 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */ 62*4882a593Smuzhiyun 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */ 63*4882a593Smuzhiyun 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */ 64*4882a593Smuzhiyun 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */ 65*4882a593Smuzhiyun /* IDSEL 11 */ 66*4882a593Smuzhiyun 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */ 67*4882a593Smuzhiyun 0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */ 68*4882a593Smuzhiyun 0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */ 69*4882a593Smuzhiyun 0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */ 70*4882a593Smuzhiyun /* IDSEL 12 */ 71*4882a593Smuzhiyun 0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */ 72*4882a593Smuzhiyun 0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */ 73*4882a593Smuzhiyun 0x6000 0 0 3 &pic 14 /* INT C on slot 12 is irq 14 */ 74*4882a593Smuzhiyun 0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */ 75*4882a593Smuzhiyun >; 76*4882a593Smuzhiyun}; 77