xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/pq2fads.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2007,2008 Freescale Semiconductor Inc.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "pq2fads";
12*4882a593Smuzhiyun	compatible = "fsl,pq2fads";
13*4882a593Smuzhiyun	#address-cells = <1>;
14*4882a593Smuzhiyun	#size-cells = <1>;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	aliases {
17*4882a593Smuzhiyun		ethernet0 = &enet0;
18*4882a593Smuzhiyun		ethernet1 = &enet1;
19*4882a593Smuzhiyun		serial0 = &serial0;
20*4882a593Smuzhiyun		serial1 = &serial1;
21*4882a593Smuzhiyun		pci0 = &pci0;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	cpus {
25*4882a593Smuzhiyun		#address-cells = <1>;
26*4882a593Smuzhiyun		#size-cells = <0>;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		cpu@0 {
29*4882a593Smuzhiyun			device_type = "cpu";
30*4882a593Smuzhiyun			reg = <0x0>;
31*4882a593Smuzhiyun			d-cache-line-size = <32>;
32*4882a593Smuzhiyun			i-cache-line-size = <32>;
33*4882a593Smuzhiyun			d-cache-size = <16384>;
34*4882a593Smuzhiyun			i-cache-size = <16384>;
35*4882a593Smuzhiyun			timebase-frequency = <0>;
36*4882a593Smuzhiyun			clock-frequency = <0>;
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	memory {
41*4882a593Smuzhiyun		device_type = "memory";
42*4882a593Smuzhiyun		reg = <0x0 0x0>;
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	localbus@f0010100 {
46*4882a593Smuzhiyun		compatible = "fsl,mpc8280-localbus",
47*4882a593Smuzhiyun		             "fsl,pq2-localbus";
48*4882a593Smuzhiyun		#address-cells = <2>;
49*4882a593Smuzhiyun		#size-cells = <1>;
50*4882a593Smuzhiyun		reg = <0xf0010100 0x60>;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun		ranges = <0x0 0x0 0xff800000 0x800000
53*4882a593Smuzhiyun		          0x1 0x0 0xf4500000 0x8000
54*4882a593Smuzhiyun		          0x8 0x0 0xf8200000 0x8000>;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun		flash@0,0 {
57*4882a593Smuzhiyun			compatible = "jedec-flash";
58*4882a593Smuzhiyun			reg = <0x0 0x0 0x800000>;
59*4882a593Smuzhiyun			bank-width = <4>;
60*4882a593Smuzhiyun			device-width = <1>;
61*4882a593Smuzhiyun		};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun		bcsr@1,0 {
64*4882a593Smuzhiyun			reg = <0x1 0x0 0x20>;
65*4882a593Smuzhiyun			compatible = "fsl,pq2fads-bcsr";
66*4882a593Smuzhiyun		};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun		PCI_PIC: pic@8,0 {
69*4882a593Smuzhiyun			#interrupt-cells = <1>;
70*4882a593Smuzhiyun			interrupt-controller;
71*4882a593Smuzhiyun			reg = <0x8 0x0 0x8>;
72*4882a593Smuzhiyun			compatible = "fsl,pq2ads-pci-pic";
73*4882a593Smuzhiyun			interrupt-parent = <&PIC>;
74*4882a593Smuzhiyun			interrupts = <24 8>;
75*4882a593Smuzhiyun		};
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	pci0: pci@f0010800 {
79*4882a593Smuzhiyun		device_type = "pci";
80*4882a593Smuzhiyun		reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
81*4882a593Smuzhiyun		compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
82*4882a593Smuzhiyun		#interrupt-cells = <1>;
83*4882a593Smuzhiyun		#size-cells = <2>;
84*4882a593Smuzhiyun		#address-cells = <3>;
85*4882a593Smuzhiyun		clock-frequency = <66000000>;
86*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
87*4882a593Smuzhiyun		interrupt-map = <
88*4882a593Smuzhiyun		                /* IDSEL 0x16 */
89*4882a593Smuzhiyun		                 0xb000 0x0 0x0 0x1 &PCI_PIC 0
90*4882a593Smuzhiyun		                 0xb000 0x0 0x0 0x2 &PCI_PIC 1
91*4882a593Smuzhiyun		                 0xb000 0x0 0x0 0x3 &PCI_PIC 2
92*4882a593Smuzhiyun		                 0xb000 0x0 0x0 0x4 &PCI_PIC 3
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		                /* IDSEL 0x17 */
95*4882a593Smuzhiyun		                 0xb800 0x0 0x0 0x1 &PCI_PIC 4
96*4882a593Smuzhiyun		                 0xb800 0x0 0x0 0x2 &PCI_PIC 5
97*4882a593Smuzhiyun		                 0xb800 0x0 0x0 0x3 &PCI_PIC 6
98*4882a593Smuzhiyun		                 0xb800 0x0 0x0 0x4 &PCI_PIC 7
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun		                /* IDSEL 0x18 */
101*4882a593Smuzhiyun		                 0xc000 0x0 0x0 0x1 &PCI_PIC 8
102*4882a593Smuzhiyun		                 0xc000 0x0 0x0 0x2 &PCI_PIC 9
103*4882a593Smuzhiyun		                 0xc000 0x0 0x0 0x3 &PCI_PIC 10
104*4882a593Smuzhiyun		                 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun		interrupt-parent = <&PIC>;
107*4882a593Smuzhiyun		interrupts = <18 8>;
108*4882a593Smuzhiyun		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
109*4882a593Smuzhiyun		          0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
110*4882a593Smuzhiyun		          0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
111*4882a593Smuzhiyun	};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	soc@f0000000 {
114*4882a593Smuzhiyun		#address-cells = <1>;
115*4882a593Smuzhiyun		#size-cells = <1>;
116*4882a593Smuzhiyun		device_type = "soc";
117*4882a593Smuzhiyun		compatible = "fsl,mpc8280", "fsl,pq2-soc";
118*4882a593Smuzhiyun		ranges = <0x0 0xf0000000 0x53000>;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		// Temporary -- will go away once kernel uses ranges for get_immrbase().
121*4882a593Smuzhiyun		reg = <0xf0000000 0x53000>;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		cpm@119c0 {
124*4882a593Smuzhiyun			#address-cells = <1>;
125*4882a593Smuzhiyun			#size-cells = <1>;
126*4882a593Smuzhiyun			#interrupt-cells = <2>;
127*4882a593Smuzhiyun			compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
128*4882a593Smuzhiyun			reg = <0x119c0 0x30>;
129*4882a593Smuzhiyun			ranges;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun			muram@0 {
132*4882a593Smuzhiyun				#address-cells = <1>;
133*4882a593Smuzhiyun				#size-cells = <1>;
134*4882a593Smuzhiyun				ranges = <0x0 0x0 0x10000>;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun				data@0 {
137*4882a593Smuzhiyun					compatible = "fsl,cpm-muram-data";
138*4882a593Smuzhiyun					reg = <0x0 0x2000 0x9800 0x800>;
139*4882a593Smuzhiyun				};
140*4882a593Smuzhiyun			};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun			brg@119f0 {
143*4882a593Smuzhiyun				compatible = "fsl,mpc8280-brg",
144*4882a593Smuzhiyun				             "fsl,cpm2-brg",
145*4882a593Smuzhiyun				             "fsl,cpm-brg";
146*4882a593Smuzhiyun				reg = <0x119f0 0x10 0x115f0 0x10>;
147*4882a593Smuzhiyun			};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun			serial0: serial@11a00 {
150*4882a593Smuzhiyun				device_type = "serial";
151*4882a593Smuzhiyun				compatible = "fsl,mpc8280-scc-uart",
152*4882a593Smuzhiyun				             "fsl,cpm2-scc-uart";
153*4882a593Smuzhiyun				reg = <0x11a00 0x20 0x8000 0x100>;
154*4882a593Smuzhiyun				interrupts = <40 8>;
155*4882a593Smuzhiyun				interrupt-parent = <&PIC>;
156*4882a593Smuzhiyun				fsl,cpm-brg = <1>;
157*4882a593Smuzhiyun				fsl,cpm-command = <0x800000>;
158*4882a593Smuzhiyun			};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun			serial1: serial@11a20 {
161*4882a593Smuzhiyun				device_type = "serial";
162*4882a593Smuzhiyun				compatible = "fsl,mpc8280-scc-uart",
163*4882a593Smuzhiyun				             "fsl,cpm2-scc-uart";
164*4882a593Smuzhiyun				reg = <0x11a20 0x20 0x8100 0x100>;
165*4882a593Smuzhiyun				interrupts = <41 8>;
166*4882a593Smuzhiyun				interrupt-parent = <&PIC>;
167*4882a593Smuzhiyun				fsl,cpm-brg = <2>;
168*4882a593Smuzhiyun				fsl,cpm-command = <0x4a00000>;
169*4882a593Smuzhiyun			};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun			enet0: ethernet@11320 {
172*4882a593Smuzhiyun				device_type = "network";
173*4882a593Smuzhiyun				compatible = "fsl,mpc8280-fcc-enet",
174*4882a593Smuzhiyun				             "fsl,cpm2-fcc-enet";
175*4882a593Smuzhiyun				reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
176*4882a593Smuzhiyun				interrupts = <33 8>;
177*4882a593Smuzhiyun				interrupt-parent = <&PIC>;
178*4882a593Smuzhiyun				phy-handle = <&PHY0>;
179*4882a593Smuzhiyun				linux,network-index = <0>;
180*4882a593Smuzhiyun				fsl,cpm-command = <0x16200300>;
181*4882a593Smuzhiyun			};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun			enet1: ethernet@11340 {
184*4882a593Smuzhiyun				device_type = "network";
185*4882a593Smuzhiyun				compatible = "fsl,mpc8280-fcc-enet",
186*4882a593Smuzhiyun				             "fsl,cpm2-fcc-enet";
187*4882a593Smuzhiyun				reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
188*4882a593Smuzhiyun				interrupts = <34 8>;
189*4882a593Smuzhiyun				interrupt-parent = <&PIC>;
190*4882a593Smuzhiyun				phy-handle = <&PHY1>;
191*4882a593Smuzhiyun				linux,network-index = <1>;
192*4882a593Smuzhiyun				fsl,cpm-command = <0x1a400300>;
193*4882a593Smuzhiyun				local-mac-address = [00 e0 0c 00 79 01];
194*4882a593Smuzhiyun			};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun			mdio@10d40 {
197*4882a593Smuzhiyun				compatible = "fsl,pq2fads-mdio-bitbang",
198*4882a593Smuzhiyun				             "fsl,mpc8280-mdio-bitbang",
199*4882a593Smuzhiyun				             "fsl,cpm2-mdio-bitbang";
200*4882a593Smuzhiyun				#address-cells = <1>;
201*4882a593Smuzhiyun				#size-cells = <0>;
202*4882a593Smuzhiyun				reg = <0x10d40 0x14>;
203*4882a593Smuzhiyun				fsl,mdio-pin = <9>;
204*4882a593Smuzhiyun				fsl,mdc-pin = <10>;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun				PHY0: ethernet-phy@0 {
207*4882a593Smuzhiyun					interrupt-parent = <&PIC>;
208*4882a593Smuzhiyun					interrupts = <25 2>;
209*4882a593Smuzhiyun					reg = <0x0>;
210*4882a593Smuzhiyun				};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun				PHY1: ethernet-phy@1 {
213*4882a593Smuzhiyun					interrupt-parent = <&PIC>;
214*4882a593Smuzhiyun					interrupts = <25 2>;
215*4882a593Smuzhiyun					reg = <0x3>;
216*4882a593Smuzhiyun				};
217*4882a593Smuzhiyun			};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun			usb@11b60 {
220*4882a593Smuzhiyun				#address-cells = <1>;
221*4882a593Smuzhiyun				#size-cells = <0>;
222*4882a593Smuzhiyun				compatible = "fsl,mpc8280-usb",
223*4882a593Smuzhiyun				             "fsl,cpm2-usb";
224*4882a593Smuzhiyun				reg = <0x11b60 0x18 0x8b00 0x100>;
225*4882a593Smuzhiyun				interrupt-parent = <&PIC>;
226*4882a593Smuzhiyun				interrupts = <11 8>;
227*4882a593Smuzhiyun				fsl,cpm-command = <0x2e600000>;
228*4882a593Smuzhiyun			};
229*4882a593Smuzhiyun		};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun		PIC: interrupt-controller@10c00 {
232*4882a593Smuzhiyun			#interrupt-cells = <2>;
233*4882a593Smuzhiyun			interrupt-controller;
234*4882a593Smuzhiyun			reg = <0x10c00 0x80>;
235*4882a593Smuzhiyun			compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
236*4882a593Smuzhiyun		};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun	};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun	chosen {
241*4882a593Smuzhiyun		stdout-path = "/soc/cpm/serial@11a00";
242*4882a593Smuzhiyun	};
243*4882a593Smuzhiyun};
244